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basic_routine.lst
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Argv = .\basic_routine.asm
0 error(s) found
00001:; This now the start of some real code
00002:; This routine will test the ALU ADC function
00003:; 01 setups the locations
00004:; 02 display operands
00005:; 03 adds the 16 bit value
00006: 0000 ORG 0X000
00007: 0000 81 00 01 JMP START
00008: 0003 47 00 VAL1 DW 0X47 ;dividend
00009: 0005 46 00 VAL2 DW 0X46 ;divisor
00010: 0007 00 HLT ;should not stop
00011: 0008 ORG 0X0100 ; this is a test
00012: 0100 37 ff ff START LD SP,0XFFFF ;Setup sp
00013: 0103 5e MOV SP,CB ;Copy sp to BC
00014:;The next section does a basic sanity check on computer
00015:;if it halts here you have a very basic issue in program control flow
00016:;Uses minimal instructions just in case problems are deep.
00017: 0104 81 08 01 JMP NB
00018: 0107 00 HLT ;Halt here if jmp fails
00019: 0108 c2 0d 01 NB LD DA,N1
00020: 010b 84 JMP (DA)
00021: 010c 00 HLT ;Halt here if jump DA failed.
00022: 010d 30 01 N1 LD A,01 ; start valueA
00023: 010f 10 DEC A ;should be zero
00024: 0110 83 14 01 JPZ N2 ;test
00025: 0113 00 HLT ;Jump zero test failed
00026: 0114 10 N2 DEC A ; should be neg and not zero
00027: 0115 85 19 01 JNZ N3 ;
00028: 0118 00 HLT ; Jump not zero failed
00029: 0119 8a 1d 01 N3 JNEG N4 ;
00030: 011c 00 HLT ; If here neg jump failed
00031: 011d 51 N4 MOV A,C ; save A
00032: 011e 4a ff CMP A,0XFF ; should be equal
00033: 0120 88 24 01 JEQ N5
00034: 0123 00 HLT ;Jump equal failed
00035: 0124 56 N5 MOV C,A ;restore a
00036: 0125 4a 01 CMP A,0X01 ;
00037: 0127 87 2b 01 JGT N6
00038: 012a 00 HLT ; Jump greater than failed
00039: 012b 10 N6 DEC A
00040: 012c 4a ff CMP A,0XFF ; Compare A with FF
00041: 012e 86 32 01 JLT N7
00042: 0131 00 HLT ;Jmp less than failed
00043: 0132 41 03 N7 ADD A,0X3 ;should generate carry
00044: 0134 89 38 01 JPC N8
00045: 0137 00 HLT ;Jump carry failed
00046: 0138 38 82 05 N8 LD X,JMPPASS ; Here basic jump tests passed
00047: 013b 80 e6 03 CALL WRITE_STR
00048: 013e 38 30 06 LD X,CRLF
00049: 0141 80 e6 03 CALL WRITE_STR
00050: 0144 30 00 LD A,00 ;should be 0
00051: 0146 12 INC A ;Alu operation should set flags
00052: 0147 83 6c 01 JPZ FAIL ;test
00053: 014a 10 N9 DEC A ; should be zero
00054: 014b 85 6c 01 JNZ FAIL ;
00055: 014e 8a 6c 01 N10 JNEG FAIL
00056: 0151 51 N11 MOV A,C ; save A
00057: 0152 4a ff CMP A,0XFF ; should be not equal
00058: 0154 88 6c 01 JEQ FAIL
00059: 0157 56 N12 MOV C,A ;restore a
00060: 0158 4a 00 CMP A,0X00
00061: 015a 87 6c 01 JGT FAIL
00062: 015d 30 04 LD A,0X04
00063: 015f 4a 02 N13 CMP A,0X02
00064: 0161 86 6c 01 JLT FAIL
00065: 0164 41 03 N14 ADD A,0X3 ;should not generate carry
00066: 0166 89 6c 01 JPC FAIL
00067: 0169 81 6d 01 JMP N15
00068: 016c 00 FAIL HLT
00069: 016d 38 c6 05 N15 LD X,JMPPASS1
00070: 0170 80 e6 03 CALL WRITE_STR
00071: 0173 38 30 06 LD X,CRLF
00072: 0176 80 e6 03 CALL WRITE_STR
00073: 0179 38 59 05 LD X,WEL ;Load msg address
00074: 017c 80 e6 03 CALL WRITE_STR
00075: 017f 38 30 06 LD X,CRLF
00076: 0182 80 e6 03 CALL WRITE_STR
00077: 0185 30 99 LD A,0X99
00078: 0187 80 20 02 CALL DUMP_REG
00079: 018a 80 32 03 CALL PRINT256
00080: 018d c1 23 21 LD HL,0X2123 ; first value
00081: 0190 bc PUSH HL
00082: 0191 0c MOV HL,DA
00083: 0192 80 7c 03 CALL CONV16
00084: 0195 38 fb 05 LD X,MULMSG
00085: 0198 80 e6 03 CALL WRITE_STR
00086: 019b 38 77 03 LD X,CBUF16
00087: 019e 80 e6 03 CALL WRITE_STR
00088: 01a1 c1 46 00 LD HL,0X0046 ; second value
00089: 01a4 bc PUSH HL ; stack setup
00090: 01a5 0c MOV HL,DA
00091: 01a6 80 7c 03 CALL CONV16
00092: 01a9 38 07 06 LD X,MULMSG2
00093: 01ac 80 e6 03 CALL WRITE_STR
00094: 01af 38 77 03 LD X,CBUF16
00095: 01b2 80 e6 03 CALL WRITE_STR
00096: 01b5 80 ff 03 CALL MUL16 ;multiply
00097:; call dump_reg ; see what is returned LSB in DA
00098: 01b8 38 0b 06 LD X,MULMSG3
00099: 01bb 80 e6 03 CALL WRITE_STR
00100: 01be 73 PUSH D
00101: 01bf 70 PUSH A
00102: 01c0 0c MOV HL,DA
00103: 01c1 80 7c 03 CALL CONV16
00104: 01c4 38 77 03 LD X,CBUF16
00105: 01c7 80 e6 03 CALL WRITE_STR
00106: 01ca 78 POP A
00107: 01cb 7d POP D
00108: 01cc 80 7c 03 CALL CONV16
00109: 01cf 38 77 03 LD X,CBUF16
00110: 01d2 80 e6 03 CALL WRITE_STR
00111: 01d5 38 30 06 LD X,CRLF
00112: 01d8 80 e6 03 CALL WRITE_STR
00113:;Division test
00114: 01db 39 03 00 LD Y,VAL1
00115: 01de c4 LD HL,(Y+) ; first value dividend
00116: 01df bc PUSH HL
00117: 01e0 0c MOV HL,DA
00118: 01e1 80 7c 03 CALL CONV16
00119: 01e4 38 77 03 LD X,CBUF16
00120: 01e7 80 e6 03 CALL WRITE_STR
00121: 01ea c4 LD HL,(Y+) ; second value divisor
00122: 01eb bc PUSH HL ; stack setup
00123: 01ec 0c MOV HL,DA
00124: 01ed 80 7c 03 CALL CONV16
00125: 01f0 38 0f 06 LD X,DIVMSG
00126: 01f3 80 e6 03 CALL WRITE_STR
00127: 01f6 38 77 03 LD X,CBUF16
00128: 01f9 80 e6 03 CALL WRITE_STR
00129: 01fc 80 20 02 CALL DUMP_REG
00130: 01ff 80 73 04 CALL DIV16
00131: 0202 80 20 02 CALL DUMP_REG
00132:; values return result in DA and the remainder in HL
00133: 0205 80 7c 03 CALL CONV16
00134: 0208 38 77 03 LD X,CBUF16
00135: 020b 80 e6 03 CALL WRITE_STR
00136: 020e 0c MOV HL,DA
00137: 020f 80 7c 03 CALL CONV16
00138: 0212 38 13 06 LD X,REMAIN
00139: 0215 80 e6 03 CALL WRITE_STR
00140: 0218 38 77 03 LD X,CBUF16
00141: 021b 80 e6 03 CALL WRITE_STR
00142: 021e 00 HLT
00143: 021f 8f RET
00144:;This routine dumps basic register set to the screen
00145: 0220 0e DUMP_REG PUSHALL ; Save All
00146: 0221 38 30 06 LD X,CRLF
00147: 0224 80 e6 03 CALL WRITE_STR ; tidy up screen
00148: 0227 38 73 05 LD X,DU
00149: 022a 80 e6 03 CALL WRITE_STR
00150: 022d 38 30 06 LD X,CRLF
00151: 0230 80 e6 03 CALL WRITE_STR
00152: 0233 5d MOV SP,Y ; Grab current stack pointer.
00153: 0234 17 INC Y ; Point to Y LSB
00154: 0235 6d LD A,(Y+) ; Load Y LSB
00155: 0236 50 MOV A,B
00156: 0237 6d LD A,(Y+)
00157: 0238 80 6a 03 CALL CONV
00158: 023b 38 25 06 LD X,MSGY
00159: 023e 80 e6 03 CALL WRITE_STR
00160: 0241 38 67 03 LD X,CBUF
00161: 0244 80 e6 03 CALL WRITE_STR
00162: 0247 53 MOV B,A
00163: 0248 80 6a 03 CALL CONV
00164: 024b 38 67 03 LD X,CBUF
00165: 024e 80 e6 03 CALL WRITE_STR
00166: 0251 38 32 06 LD X,SPACE
00167: 0254 80 e6 03 CALL WRITE_STR
00168: 0257 6d LD A,(Y+) ; Load X LSB
00169: 0258 50 MOV A,B
00170: 0259 6d LD A,(Y+)
00171: 025a 80 6a 03 CALL CONV
00172: 025d 38 22 06 LD X,MSGX
00173: 0260 80 e6 03 CALL WRITE_STR
00174: 0263 38 67 03 LD X,CBUF
00175: 0266 80 e6 03 CALL WRITE_STR
00176: 0269 53 MOV B,A
00177: 026a 80 6a 03 CALL CONV
00178: 026d 38 67 03 LD X,CBUF
00179: 0270 80 e6 03 CALL WRITE_STR
00180: 0273 38 32 06 LD X,SPACE
00181: 0276 80 e6 03 CALL WRITE_STR
00182: 0279 6d LD A,(Y+) ; Load L LSB
00183: 027a 50 MOV A,B
00184: 027b 6d LD A,(Y+)
00185: 027c 80 6a 03 CALL CONV
00186: 027f 38 ef 05 LD X,MSGHL
00187: 0282 80 e6 03 CALL WRITE_STR
00188: 0285 38 67 03 LD X,CBUF
00189: 0288 80 e6 03 CALL WRITE_STR
00190: 028b 53 MOV B,A
00191: 028c 80 6a 03 CALL CONV
00192: 028f 38 67 03 LD X,CBUF
00193: 0292 80 e6 03 CALL WRITE_STR
00194: 0295 38 32 06 LD X,SPACE
00195: 0298 80 e6 03 CALL WRITE_STR
00196: 029b 6d LD A,(Y+) ; Load B LSB
00197: 029c 50 MOV A,B
00198: 029d 6d LD A, (Y+)
00199: 029e 80 6a 03 CALL CONV
00200: 02a1 38 eb 05 LD X,MSGCB
00201: 02a4 80 e6 03 CALL WRITE_STR
00202: 02a7 38 67 03 LD X,CBUF
00203: 02aa 80 e6 03 CALL WRITE_STR
00204: 02ad 53 MOV B,A
00205: 02ae 80 6a 03 CALL CONV
00206: 02b1 38 67 03 LD X,CBUF
00207: 02b4 80 e6 03 CALL WRITE_STR
00208: 02b7 38 32 06 LD X,SPACE
00209: 02ba 80 e6 03 CALL WRITE_STR
00210: 02bd 6d LD A,(Y+) ; Load DA LSB
00211: 02be 50 MOV A,B
00212: 02bf 6d LD A,(Y+)
00213: 02c0 80 6a 03 CALL CONV
00214: 02c3 38 e7 05 LD X,MSGDA
00215: 02c6 80 e6 03 CALL WRITE_STR
00216: 02c9 38 67 03 LD X,CBUF
00217: 02cc 80 e6 03 CALL WRITE_STR
00218: 02cf 53 MOV B,A
00219: 02d0 80 6a 03 CALL CONV
00220: 02d3 38 67 03 LD X,CBUF
00221: 02d6 80 e6 03 CALL WRITE_STR
00222: 02d9 38 32 06 LD X,SPACE
00223: 02dc 80 e6 03 CALL WRITE_STR
00224: 02df 6d LD A,(Y+) ; Load FLAGS
00225: 02e0 70 PUSH A
00226: 02e1 80 6a 03 CALL CONV
00227: 02e4 38 1f 06 LD X,MSGF
00228: 02e7 80 e6 03 CALL WRITE_STR
00229: 02ea 38 67 03 LD X,CBUF
00230: 02ed 80 e6 03 CALL WRITE_STR
00231: 02f0 38 32 06 LD X,SPACE
00232: 02f3 80 e6 03 CALL WRITE_STR
00233: 02f6 78 POP A
00234: 02f7 80 b5 03 CALL DSPFLAGS ; CONVERT VALUE IN A TO FLAGS VALUES
00235: 02fa 68 LD DA,(Y+) ; Load PC into DA
00236: 02fb 40 01 00 ADD DA,0X0001 ;Adjust to reflect return location
00237: 02fe 80 7c 03 CALL CONV16
00238: 0301 38 28 06 LD X,MSGPC
00239: 0304 80 e6 03 CALL WRITE_STR
00240: 0307 38 77 03 LD X,CBUF16
00241: 030a 80 e6 03 CALL WRITE_STR
00242: 030d 38 32 06 LD X,SPACE
00243: 0310 80 e6 03 CALL WRITE_STR
00244:; this should be the top of stack before call to the dump routine.
00245: 0313 15 DEC Y ;Adjust for correct TOP of stack
00246: 0314 bb MOV Y,DA ; copy y into da
00247: 0315 80 7c 03 CALL CONV16
00248: 0318 38 2c 06 LD X,MSGSP
00249: 031b 80 e6 03 CALL WRITE_STR
00250: 031e 38 77 03 LD X,CBUF16
00251: 0321 80 e6 03 CALL WRITE_STR
00252: 0324 38 32 06 LD X,SPACE
00253: 0327 80 e6 03 CALL WRITE_STR
00254: 032a 38 30 06 LD X,CRLF
00255: 032d 80 e6 03 CALL WRITE_STR
00256:; LD DA,0x9999 ;test value
00257:; CALL conv16
00258:; LD X,MSGtst
00259:; CALL WRITE_STR
00260:; LD X,CBUF16
00261:; CALL WRITE_STR
00262:; ld x,crlf
00263:; call WRITE_STR
00264: 0330 0f POPALL
00265: 0331 8f RET
00266:;
00267:; Print from ff to zero
00268: 0332 0e PRINT256 PUSHALL
00269: 0333 30 ff LD A,0XFF
00270: 0335 33 10 LD D, 16 ; 16 hex characters to a line
00271: 0337 80 6a 03 PNRT1 CALL CONV
00272: 033a 38 67 03 LD X,CBUF
00273: 033d 80 e6 03 CALL WRITE_STR
00274: 0340 38 32 06 LD X,SPACE
00275: 0343 80 e6 03 CALL WRITE_STR
00276: 0346 11 DEC D
00277: 0347 85 52 03 JNZ CONT
00278: 034a 38 30 06 LD X,CRLF
00279: 034d 80 e6 03 CALL WRITE_STR
00280: 0350 33 10 LD D,16 ;reload count value
00281: 0352 10 CONT DEC A
00282: 0353 85 37 03 JNZ PNRT1
00283: 0356 80 6a 03 CALL CONV
00284: 0359 38 67 03 LD X,CBUF
00285: 035c 80 e6 03 CALL WRITE_STR
00286: 035f 38 30 06 LD X,CRLF
00287: 0362 80 e6 03 CALL WRITE_STR
00288: 0365 0f POPALL
00289: 0366 8f RET
00290:;Convert value in A to hex and print
00291:;Will rewirte when more instructions implemented.
00292: 0367 00 00 CBUF DW 0X0 ; temp store
00293: 0369 00 DB 0X0 ;
00294: 036a 75 CONV PUSH X ; save X
00295: 036b 71 PUSH B ; save B
00296: 036c 70 PUSH A ; save A
00297: 036d 38 67 03 LD X,CBUF
00298: 0370 80 92 03 CALL CONVRTASC ;does the work
00299: 0373 78 POP A
00300: 0374 79 POP B
00301: 0375 7c POP X
00302: 0376 8f RET
00303:;Convert value in DA to hex and print
00304:;Will rewirte when more instructions implemented.
00305: 0377 00 00 CBUF16 DW 0X0 ; temp store
00306: 0379 00 00 CBUF16L DW 0X0 ; LSB
00307: 037b 00 DB 0X0 ;
00308: 037c 75 CONV16 PUSH X ; save X
00309: 037d 71 PUSH B ; save B
00310: 037e 73 PUSH D ; Save DA no push DA yet
00311: 037f 70 PUSH A ; save A
00312: 0380 38 79 03 LD X,CBUF16L
00313: 0383 80 92 03 CALL CONVRTASC ;
00314: 0386 59 MOV D,A ; Load A with MSB
00315: 0387 38 77 03 LD X,CBUF16
00316: 038a 80 92 03 CALL CONVRTASC
00317: 038d 78 POP A
00318: 038e 7d POP D
00319: 038f 79 POP B
00320: 0390 7c POP X
00321: 0391 8f RET
00322:;This routine takes the value in A and coverts to a hex ascii pointed to by X
00323:;X = pointer to where character sting to stored
00324:;A = binary value to convert
00325:;Modifies A, X, B
00326: 0392 70 CONVRTASC PUSH A
00327: 0393 31 04 LD B,04 ;4 bit positions
00328: 0395 28 SLR A
00329: 0396 4a 09 CMP A,0X9 ;Is 0-9
00330: 0398 87 a0 03 JGT HEXA16
00331: 039b 41 30 ADD A,'0'
00332: 039d 81 a2 03 JMP STR16MSB
00333: 03a0 41 37 HEXA16 ADD A,0X37
00334: 03a2 60 STR16MSB ST A,(X)
00335: 03a3 16 INC X
00336: 03a4 78 POP A
00337: 03a5 20 0f AND A,0XF ; Mask low bits
00338: 03a7 4a 09 CMP A,0X9 ;Is 0-9
00339: 03a9 87 b1 03 JGT HEXB16
00340: 03ac 41 30 ADD A,'0'
00341: 03ae 81 b3 03 JMP STR16LSB
00342: 03b1 41 37 HEXB16 ADD A,0X37
00343: 03b3 60 STR16LSB ST A,(X)
00344: 03b4 8f RET
00345:;This routine takes the 8 bit value passed in A and converts to the flags
00346:; 128 64 32 16 8 4 2 1
00347:; +---+---+---+---+---+---+---+---+
00348:; | S | M | - | < | > | = | C | Z |
00349:; +---+---+---+---+---+---+---+---+
00350:; all registers are saved upon entry and restored on exit
00351:;
00352:;
00353:;
00354: 03b5 0e DSPFLAGS PUSHALL ;SAVE REG
00355: 03b6 39 00 fe LD Y,LED1
00356: 03b9 3e 07 LD H,0X7 ; COUNT
00357: 03bb 52 MOV A,D
00358: 03bc 38 dd 03 LD X,FLAGASC
00359: 03bf 32 01 LD C,0X1 ;SHIFT AMOUNT - new shifter is 0 = no shift.
00360: 03c1 2a LOOP1 SLR D
00361: 03c2 89 c9 03 JPC FLAGFOUND
00362: 03c5 16 INC X
00363: 03c6 81 d0 03 JMP PRINTSPC
00364: 03c9 6c FLAGFOUND LD A,(X+)
00365: 03ca 80 f3 04 CALL WRITEA
00366: 03cd 81 d5 03 JMP CHECKEND
00367: 03d0 30 20 PRINTSPC LD A,0X20
00368: 03d2 80 f3 04 CALL WRITEA
00369: 03d5 07 CHECKEND MOV H,A
00370: 03d6 10 DEC A
00371: 03d7 05 MOV A,H
00372: 03d8 85 c1 03 JNZ LOOP1
00373: 03db 0f POPALL
00374: 03dc 8f RET
00375: 03dd 5a 43 3d FLAGASC DS "ZC=><-MS"
00376:;
00377:;
00378:; Write string requires X to point to string. String is standard null terminated
00379: 03e6 70 WRITE_STR PUSH A
00380: 03e7 76 PUSH Y
00381: 03e8 39 00 fe LD Y,LED1
00382: 03eb 6c WRITE2 LD A,(X+)
00383: 03ec 80 f3 04 CALL WRITEA
00384: 03ef 41 00 ADD A,0 ;Test for zero CMP not yet implemented
00385: 03f1 85 eb 03 JNZ WRITE2
00386: 03f4 7b POP Y
00387: 03f5 78 POP A
00388: 03f6 8f RET
00389:; Mul16 does a simple add x not optimised just a test for now.
00390: 03f7 00 00 MUL16S1 DW 0 ; lsb of result
00391: 03f9 00 00 MUL16S2 DW 0 ; may need storage * 10
00392: 03fb 00 00 MUL16S3 DW 0 ; MSB of result *10
00393: 03fd 00 00 MUL16S4 DW 0 ; storage sum of products * 100
00394: 03ff be MUL16 MOV SP,DA ; get current sp we have old stack frame
00395: 0400 71 PUSH B
00396: 0401 72 PUSH C
00397: 0402 75 PUSH X
00398: 0403 76 PUSH Y
00399:; call dump_reg
00400: 0404 39 f7 03 LD Y,MUL16S1
00401: 0407 40 03 00 ADD DA,0X03 ; Adjust bottom var list
00402: 040a b5 MOV DA,X ; Put into address ret
00403: 040b c7 LD CB,(X+) ; first param
00404: 040c 69 LD DA,(X+) ; second param
00405:; call dump_reg ;Are we set up correctly
00406: 040d 73 PUSH D
00407: 040e 52 MOV A,D
00408:; call dump_reg
00409: 040f 80 4b 04 CALL MUL ; do 8 bit mul B * A
00410: 0412 7d POP D
00411: 0413 f0 ST HL,(Y) ;save partil products
00412:; call dump_reg ;Check values correct
00413: 0414 80 4b 04 CALL MUL ; B * D
00414:; call dump_reg
00415: 0417 73 PUSH D
00416: 0418 70 PUSH A
00417: 0419 f6 LD DA,(Y) ; get old DA
00418: 041a e6 ADD D,L ; add hi bit
00419: 041b ce ST DA,(Y+) ; save result
00420: 041c 99 CLR A
00421: 041d 1d ADC A,H ; capture carry bit
00422: 041e 04 MOV A,L ; shift correct spot in 32 bit word
00423: 041f 99 CLR A
00424: 0420 05 MOV A,H ; HL correct to MSB of 32 bit word
00425: 0421 f0 ST HL,(Y) ;
00426: 0422 15 DEC Y
00427: 0423 15 DEC Y ; point to lsb of 32 bit word
00428:; call dump_reg
00429: 0424 78 POP A
00430: 0425 57 MOV C,B
00431: 0426 52 MOV A,D
00432:; call dump_reg
00433: 0427 80 4b 04 CALL MUL ; C * A
00434: 042a 70 PUSH A
00435: 042b f6 LD DA,(Y) ; get old DA
00436: 042c e6 ADD D,L ; add hi bit
00437: 042d ce ST DA,(Y+) ; save result
00438: 042e 76 PUSH Y
00439: 042f 7c POP X ;mov y,x
00440: 0430 99 CLR A
00441: 0431 1d ADC A,H ; capture carry bit
00442: 0432 04 MOV A,L ; shift correct spot in 32 bit word
00443: 0433 99 CLR A
00444: 0434 05 MOV A,H ; HL correct to MSB of 32 bit word
00445: 0435 0c MOV HL,DA ;
00446: 0436 e0 ADD DA,(X+)
00447: 0437 f5 ST DA,(Y) ;
00448:; call dump_reg ;
00449: 0438 78 POP A ; clean up stack
00450: 0439 7d POP D ; C * D
00451:; call dump_reg
00452: 043a 80 4b 04 CALL MUL
00453: 043d 0d MOV HL,CB
00454: 043e f6 LD DA,(Y)
00455: 043f 45 ADD DA,CB ; MSB 32 bit
00456: 0440 f5 ST DA,(Y)
00457:; call dump_reg
00458: 0441 39 f7 03 MUL16E LD Y,MUL16S1
00459:; call dump_reg
00460: 0444 c0 MOV DA,HL ; hl msb
00461:; call dump_reg
00462: 0445 f6 LD DA,(Y) ; DA lsb
00463:; call dump_reg
00464: 0446 7b POP Y
00465: 0447 7c POP X
00466: 0448 7a POP C
00467: 0449 79 POP B
00468: 044a 8f RET
00469: ;Simple 8 bit multiply a is temp reg HL is result of B * D
00470:
00471: 044b 70 MUL PUSH A
00472: 044c 72 PUSH C
00473: 044d 71 PUSH B
00474: 044e 73 PUSH D
00475: 044f 99 CLR A ; Clear a register
00476: 0450 51 MOV A,C ;
00477: 0451 05 MOV A,H
00478: 0452 04 MOV A,L ;clear result
00479: 0453 9f OR D,C ;set flags check if zero if zero we are done
00480: 0454 83 67 04 JPZ MUL_E
00481: 0457 43 MUL1 ADD A,B ;
00482: 0458 89 5e 04 JPC MUL3
00483: 045b 81 63 04 JMP MUL2
00484: 045e 73 MUL3 PUSH D
00485: 045f 58 MOV C,D
00486: 0460 13 INC D
00487: 0461 5b MOV D,C
00488: 0462 7d POP D
00489: 0463 11 MUL2 DEC D
00490: 0464 85 57 04 JNZ MUL1
00491: 0467 04 MUL_E MOV A,L
00492: 0468 57 MOV C,B ; limitation
00493: 0469 08 MOV B,H ; store result in hl
00494: 046a 7d POP D
00495: 046b 79 POP B
00496: 046c 7a POP C
00497: 046d 78 POP A
00498: 046e 8f RET
00499:;
00500:; Div 16 passed on stack p2 is top p1 is next
00501:; CB holds the divisor
00502:; DA holds dividend (number to be divided)
00503:; return DA result and HL remainder
00504:;
00505: 046f 23 01 DIV16S1 DW 0X123 ; result
00506: 0471 56 04 DIV16S2 DW 0X456 ; internal temp storage remainder
00507: 0473 be DIV16 MOV SP,DA ; get current sp we have old stack frame
00508: 0474 71 PUSH B
00509: 0475 72 PUSH C
00510: 0476 75 PUSH X
00511: 0477 76 PUSH Y
00512: 0478 39 6f 04 LD Y,DIV16S1
00513: 047b 40 03 00 ADD DA,0X03 ; Adjust bottom var list
00514: 047e b5 MOV DA,X ; Put into address ret
00515: 047f c7 LD CB,(X+) ; p2 param and divisor
00516: 0480 69 LD DA,(X+) ; p1 param dividend
00517:; call dump_reg ;Are we set up correctly
00518: 0481 73 PUSH D
00519: 0482 70 PUSH A ; save DA
00520: 0483 b2 MOV CB,DA ; get ready to compare
00521: 0484 af 00 CMP D,0 ; zero
00522:; call dump_reg
00523: 0486 82 98 04 JNEQ DIV16_1
00524: 0489 4a 00 CMP A,0
00525:; call dump_reg
00526: 048b 82 98 04 JNEQ DIV16_1 ; divisor not zero this is ok
00527: 048e c1 ff ff DIV_ERROR LD HL,0XFFFF
00528: 0491 c8 ST HL,(Y+)
00529: 0492 c8 ST HL,(Y+)
00530: 0493 78 POP A
00531: 0494 7d POP D
00532: 0495 81 e3 04 JMP DIV16E ; return all ones this value should be imposible for a divide
00533: 0498 72 DIV16_1 PUSH C ; stack has DA so push CB dividend and divisor
00534: 0499 71 PUSH B ;
00535: 049a 80 f7 04 CALL COMPARE ; compare DA to CB
00536: 049d 79 POP B ; clean stack
00537: 049e 7a POP C
00538: 049f 78 POP A
00539: 04a0 7d POP D
00540:; call dump_reg
00541: 04a1 88 ad 04 JEQ DIV16_12 ; dividend and divisor are equal so its 1 and zero
00542:; call dump_reg
00543: 04a4 87 be 04 JGT DIV16_2 ; divisor is smaller OK lets do divide
00544: 04a7 c1 00 00 LD HL,0
00545: 04aa 81 b9 04 JMP DIV16_13 ; divisor bigger so we are done
00546: 04ad c1 01 00 DIV16_12 LD HL,1 ; it is equal
00547: 04b0 c3 00 00 LD CB,0 ; done
00548: 04b3 81 b9 04 JMP DIV16_13
00549: 04b6 c1 00 00 LD HL,0 ;
00550: 04b9 c8 DIV16_13 ST HL,(Y+) ; zero is the result
00551: 04ba ca ST CB,(Y+) ; remainder
00552: 04bb 81 e3 04 JMP DIV16E
00553: 04be 01 DIV16_2 NOP ; place holder need to error conditions first
00554: ; We arrive here we have checked for the basic cases and errors
00555: ; so we actual divide DA holds dividend and CB the divisor
00556: 04bf c1 00 00 LD HL,0 ;setup stack variables
00557: 04c2 bc PUSH HL
00558: 04c3 bc PUSH HL
00559: 04c4 5f MOV SP,HL;
00560: 04c5 73 PUSH D
00561: 04c6 70 PUSH A
00562: 04c7 0c MOV HL,DA ;
00563: 04c8 b5 MOV DA,X ; set variable X
00564: 04c9 b6 MOV DA,Y
00565: 04ca 17 INC Y
00566: 04cb 17 INC Y ;set up up Y
00567: 04cc 78 POP A
00568: 04cd 7d POP D
00569: 04ce f5 ST DA,(Y) ;
00570: 04cf 80 15 05 DIV16SH CALL SLL16
00571: 04d2 f5 ST DA,(Y) ; shifted dividend
00572: 04d3 f7 LD DA,(X) ; test
00573: 04d4 80 20 02 CALL DUMP_REG ;
00574: 04d7 89 dc 04 JPC DIV16MERGE ; we had carry out so we have one in divisor
00575: 04da 95 01 OR A,1 ; low order safe
00576: 04dc 80 0c 05 DIV16MERGE CALL COMP16 ; is da bigger than cb
00577: 04df 86 e3 04 JLT DIV16SH_1 ;
00578: 04e2 ad SUB DA,CB ; time to sub
00579:
00580:DIV16SH_1
00581: 04e3 38 6f 04 DIV16E LD X,DIV16S1
00582: 04e6 69 LD DA,(X+)
00583: 04e7 c5 LD HL,(X+)
00584: 04e8 80 20 02 CALL DUMP_REG
00585: 04eb 7b POP Y
00586: 04ec 7c POP X
00587: 04ed 7a POP C
00588: 04ee 79 POP B
00589: 04ef 80 20 02 CALL DUMP_REG
00590: 04f2 8f RET
00591:; Write asumes Y reg is pointing to the terminal address
00592:;
00593: 04f3 70 WRITEA PUSH A
00594: 04f4 fa OUT A
00595: 04f5 78 POP A
00596: 04f6 8f RET
00597:;
00598:; comapre P1 and P2 returns flags gt,lt or eq
00599:;
00600: 04f7 73 COMPARE PUSH D
00601: 04f8 70 PUSH A
00602: 04f9 be MOV SP,DA ; get current sp we have old stack frame
00603: 04fa 71 PUSH B
00604: 04fb 72 PUSH C
00605: 04fc 75 PUSH X
00606: 04fd 40 05 00 ADD DA,0X05 ; Adjust bottom var list
00607: 0500 b5 MOV DA,X ; Put into address ret
00608: 0501 c7 LD CB,(X+) ; p2
00609: 0502 69 LD DA,(X+) ; p1 param
00610: 0503 80 0c 05 CALL COMP16
00611: 0506 7c COMPARE_E POP X
00612: 0507 7a POP C
00613: 0508 79 POP B
00614: 0509 78 POP A
00615: 050a 7d POP D
00616: 050b 8f RET
00617:;
00618:; simple 16 bit compare da to cb values in registers
00619:;
00620: 050c 4c COMP16 CMP D,C ; check hi byte if neq we are done
00621: 050d 82 11 05 JNEQ COMP16_E
00622: 0510 4b CMP A,B ; low byte determines <> =
00623: 0511 80 20 02 COMP16_E CALL DUMP_REG
00624: 0514 8f RET
00625:;
00626:; simple 16 bit shift of DA result returned in DA
00627:;
00628: 0515 71 SLL16 PUSH B ;save CB
00629: 0516 72 PUSH C
00630: 0517 31 01 LD B,0X1
00631: 0519 32 01 LD C,01
00632: 051b 27 SLL A ;shift a one bit left
00633: 051c 80 20 02 CALL DUMP_REG
00634: 051f 89 26 05 JPC SLL2 ;carry so need to adjust for carry
00635: 0522 29 SLL D ; shift d
00636: 0523 81 29 05 JMP SLL16E
00637: 0526 29 SLL2 SLL D
00638: 0527 9e 01 OR D,0X1 ; merge carry bit
00639: 0529 80 20 02 SLL16E CALL DUMP_REG
00640: 052c 7a POP C
00641: 052d 79 POP B
00642: 052e 8f RET
00643:;shift 16 bit p1 left by one return in HL carry flag set if shift out
00644: 052f 73 SHIFTLEFT16 PUSH D
00645: 0530 70 PUSH A
00646: 0531 be MOV SP,DA
00647: 0532 71 PUSH B
00648: 0533 72 PUSH C
00649: 0534 75 PUSH X
00650: 0535 40 05 00 ADD DA,0X5 ;we have only one parameter
00651: 0538 b5 MOV DA, X
00652: 0539 f7 LD DA,(X)
00653: 053a 80 20 02 CALL DUMP_REG
00654: 053d 31 01 LD B,0X1
00655: 053f 32 01 LD C,01
00656: 0541 27 SLL A ;shift a one bit left
00657: 0542 80 20 02 CALL DUMP_REG
00658: 0545 89 4c 05 JPC SHIFTL2 ;carry so need to adjust for carry
00659: 0548 29 SLL D ; shift d
00660: 0549 81 4f 05 JMP SHIFTLE
00661: 054c 29 SHIFTL2 SLL D
00662: 054d 9e 01 OR D,0X1 ; merge carry bit
00663: 054f c0 SHIFTLE MOV DA,HL
00664: 0550 80 20 02 CALL DUMP_REG
00665: 0553 7c POP X
00666: 0554 7a POP C
00667: 0555 79 POP B
00668: 0556 78 POP A
00669: 0557 7d POP D
00670: 0558 8f RET
00671:
00672: 0559 LED1 EQU 0XFE00 ;led location
00673: 0559 56 65 72 .. WEL DS "Version 1.0 test routines"
00674: 0573 44 75 6d .. DU DS "Dump registers"
00675: 0582 4a 75 6d .. JMPPASS DS "Jump tests passed in test and jump also includes basic instructions"
00676: 05c6 4a 75 6d .. JMPPASS1 DS "Jump tests passed negitive tests"
00677: 05e7 44 41 3d MSGDA DS "DA="
00678: 05eb 43 42 3d MSGCB DS "CB="
00679: 05ef 48 4c 3d MSGHL DS "HL="
00680: 05f3 74 65 73 MSGTST DS "test99="
00681: 05fb 4d 75 6c .. MULMSG DS "Multipling "
00682: 0607 20 58 20 MULMSG2 DS " X "
00683: 060b 20 3d 20 MULMSG3 DS " = "
00684: 060f 20 2f 20 DIVMSG DS " / "
00685: 0613 20 52 65 .. REMAIN DS " Remainder "
00686: 061f 46 MSGF DB 'F'
00687: 0620 3d DB '='
00688: 0621 00 DB 0X0
00689: 0622 58 MSGX DB 'X'
00690: 0623 3d DB '='
00691: 0624 00 DB 0X0
00692: 0625 59 MSGY DB 'Y'
00693: 0626 3d DB '='
00694: 0627 00 DB 0X0
00695: 0628 50 MSGPC DB 'P'
00696: 0629 43 DB 'C'
00697: 062a 3d DB '='
00698: 062b 00 DB 0X0
00699: 062c 53 MSGSP DB 'S'
00700: 062d 50 DB 'P'
00701: 062e 3d DB '='
00702: 062f 00 DB 0X0
00703: 0630 0a CRLF DB '\n'
00704: 0631 00 DB '\0'
00705: 0632 20 SPACE DB ' '
00706: 0633 00 DB 0X0
0 error(s) found
START: 0100 line: 12
Address: 0000
line: 0007
VAL1: 0003 line: 8
Address: 01db
line: 0114
VAL2: 0005 line: 9
NB: 0108 line: 19
Address: 0104
line: 0017
N1: 010d line: 22
Address: 0108
line: 0019
N2: 0114 line: 26
Address: 0110
line: 0024
N3: 0119 line: 29
Address: 0115
line: 0027
N4: 011d line: 31
Address: 0119
line: 0029
N5: 0124 line: 35
Address: 0120
line: 0033
N6: 012b line: 39
Address: 0127
line: 0037
N7: 0132 line: 43
Address: 012e
line: 0041
N8: 0138 line: 46
Address: 0134
line: 0044
JMPPASS: 0582 line: 675
Address: 0138
line: 0046
WRITE_STR: 03e6 line: 379
Address: 013b 0141 0170 0176 017c 0182 0198 019e 01ac 01b2 01bb 01c7 01d2 01d8 01e7 01f3 01f9 020b 0215 021b 0224 022a 0230 023e 0244 024e 0254 0260 0266 0270 0276 0282 0288 0292 0298 02a4 02aa 02b4 02ba 02c6 02cc 02d6 02dc 02e7 02ed 02f3 0304 030a 0310 031b 0321 0327 032d 033d 0343 034d 035c 0362
line: 0047 0031 0046 0048 004a 004c 0055 0057 005d 005f 0063 0069 006e 0070 0078 007e 0080 0087 008b 008d 0093 0095 0097 009f 00a1 00a5 00a7 00ad 00af 00b3 00b5 00bb 00bd 00c1 00c3 00c9 00cb 00cf 00d1 00d7 00d9 00dd 00df 00e4 00e6 00e8 00ef 00f1 00f3 00f9 00fb 00fd 00ff 0111 0113 0117 011d 011f
CRLF: 0630 line: 703
Address: 013e 0173 017f 01d5 0221 022d 032a 034a 035f
line: 0048 0047 004b 006f 0092 0096 00fe 0116 011e
FAIL: 016c line: 68
Address: 0147 014b 014e 0154 015a 0161 0166
line: 0052 0036 0037 003a 003d 0040 0042
N9: 014a line: 53
N10: 014e line: 55
N11: 0151 line: 56
N12: 0157 line: 59
N13: 015f line: 63
N14: 0164 line: 65
N15: 016d line: 69
Address: 0169
line: 0067
JMPPASS1: 05c6 line: 676
Address: 016d
line: 0069
WEL: 0559 line: 673
Address: 0179
line: 0073
DUMP_REG: 0220 line: 145
Address: 0187 01fc 0202 04d4 04e8 04ef 0511 051c 0529 053a 0542 0550
line: 0078 0081 0083 023d 0248 024d 026f 0279 027f 028d 0291 0298
PRINT256: 0332 line: 268
Address: 018a
line: 0079
CONV16: 037c line: 308
Address: 0192 01a6 01c1 01cc 01e1 01ed 0205 020f 02fe 0315
line: 0083 005b 0067 006c 0076 007c 0085 0089 00ed 00f7
MULMSG: 05fb line: 681
Address: 0195
line: 0084
CBUF16: 0377 line: 305
Address: 019b 01af 01c4 01cf 01e4 01f6 0208 0218 0307 031e 0387
line: 0086 005e 0068 006d 0077 007f 0086 008c 00f0 00fa 013b
MULMSG2: 0607 line: 682
Address: 01a9
line: 0092
MUL16: 03ff line: 394
Address: 01b5
line: 0096
MULMSG3: 060b line: 683
Address: 01b8
line: 0098
DIVMSG: 060f line: 684
Address: 01f0
line: 0125
DIV16: 0473 line: 507
Address: 01ff
line: 0130
REMAIN: 0613 line: 685
Address: 0212
line: 0138
DU: 0573 line: 674
Address: 0227
line: 0148
CONV: 036a line: 294
Address: 0238 0248 025a 026a 027c 028c 029e 02ae 02c0 02d0 02e1 0337 0356
line: 0157 00a3 00ab 00b1 00b9 00bf 00c7 00cd 00d5 00db 00e2 010f 011b
MSGY: 0625 line: 692
Address: 023b
line: 0158
CBUF: 0367 line: 292
Address: 0241 024b 0263 026d 0285 028f 02a7 02b1 02c9 02d3 02ea 033a 0359 036d
line: 0160 00a4 00ae 00b2 00bc 00c0 00ca 00ce 00d8 00dc 00e5 0110 011c 0129
SPACE: 0632 line: 705
Address: 0251 0273 0295 02b7 02d9 02f0 030d 0324 0340
line: 0166 00b4 00c2 00d0 00de 00e7 00f2 00fc 0112
MSGX: 0622 line: 689
Address: 025d
line: 0172
MSGHL: 05ef line: 679
Address: 027f
line: 0186
MSGCB: 05eb line: 678
Address: 02a1
line: 0200
MSGDA: 05e7 line: 677
Address: 02c3
line: 0214
MSGF: 061f line: 686
Address: 02e4
line: 0227
DSPFLAGS: 03b5 line: 354
Address: 02f7
line: 0234
MSGPC: 0628 line: 695
Address: 0301
line: 0238
MSGSP: 062c line: 699
Address: 0318
line: 0248
PNRT1: 0337 line: 271
Address: 0353
line: 0282
CONT: 0352 line: 281
Address: 0347
line: 0277
CONVRTASC: 0392 line: 326
Address: 0370 0383 038a
line: 0298 0139 013c
CBUF16L: 0379 line: 306
Address: 0380
line: 0312
HEXA16: 03a0 line: 333
Address: 0398
line: 0330
STR16MSB: 03a2 line: 334
Address: 039d
line: 0332
HEXB16: 03b1 line: 342
Address: 03a9
line: 0339
STR16LSB: 03b3 line: 343
Address: 03ae
line: 0341
LED1: fe00 line: 672
Address: 03b6 03e8
line: 0355 017d
FLAGASC: 03dd line: 375
Address: 03bc
line: 0358
LOOP1: 03c1 line: 360
Address: 03d8
line: 0372
FLAGFOUND: 03c9 line: 364
Address: 03c2
line: 0361
PRINTSPC: 03d0 line: 367
Address: 03c6
line: 0363
WRITEA: 04f3 line: 593
Address: 03ca 03d2 03ec
line: 0365 0170 017f
CHECKEND: 03d5 line: 369
Address: 03cd
line: 0366
WRITE2: 03eb line: 382
Address: 03f1
line: 0385
MUL16S1: 03f7 line: 390
Address: 0404 0441
line: 0400 01ca
MUL16S2: 03f9 line: 391
MUL16S3: 03fb line: 392
MUL16S4: 03fd line: 393
MUL: 044b line: 471
Address: 040f 0414 0427 043a
line: 0409 019d 01b1 01c4
MUL16E: 0441 line: 458
MUL_E: 0467 line: 491
Address: 0454
line: 0480
MUL1: 0457 line: 481
Address: 0464
line: 0490
MUL3: 045e line: 484
Address: 0458
line: 0482
MUL2: 0463 line: 489
Address: 045b
line: 0483
DIV16S1: 046f line: 505
Address: 0478 04e3
line: 0512 0245
DIV16S2: 0471 line: 506
DIV16_1: 0498 line: 533
Address: 0486 048b
line: 0523 020e
DIV_ERROR: 048e line: 527
DIV16E: 04e3 line: 581