From f0917e1e576555255657f6f6910ba02bfd301b11 Mon Sep 17 00:00:00 2001 From: Justin Smith Date: Tue, 5 Nov 2024 14:11:10 -0500 Subject: [PATCH] Revert "Trim some redundant Arm feature detection files" This reverts commit d36bf857472525c5c8b794c32ad3f117445547ca. --- crypto/fipsmodule/bcm.c | 2 + .../fipsmodule/cpucap/cpu_aarch64_freebsd.c | 61 +++++++++++++++++++ .../fipsmodule/cpucap/cpu_aarch64_openbsd.c | 58 ++++++++++++++++++ crypto/fipsmodule/cpucap/cpu_aarch64_sysreg.c | 8 +-- crypto/fipsmodule/cpucap/internal.h | 10 +-- 5 files changed, 126 insertions(+), 13 deletions(-) create mode 100644 crypto/fipsmodule/cpucap/cpu_aarch64_freebsd.c create mode 100644 crypto/fipsmodule/cpucap/cpu_aarch64_openbsd.c diff --git a/crypto/fipsmodule/bcm.c b/crypto/fipsmodule/bcm.c index 0b0fa81202..ce8a3462d0 100644 --- a/crypto/fipsmodule/bcm.c +++ b/crypto/fipsmodule/bcm.c @@ -75,8 +75,10 @@ #include "cpucap/cpu_aarch64.c" #include "cpucap/cpu_aarch64_sysreg.c" #include "cpucap/cpu_aarch64_apple.c" +#include "cpucap/cpu_aarch64_freebsd.c" #include "cpucap/cpu_aarch64_fuchsia.c" #include "cpucap/cpu_aarch64_linux.c" +#include "cpucap/cpu_aarch64_openbsd.c" #include "cpucap/cpu_aarch64_win.c" #include "cpucap/cpu_arm_freebsd.c" #include "cpucap/cpu_arm_linux.c" diff --git a/crypto/fipsmodule/cpucap/cpu_aarch64_freebsd.c b/crypto/fipsmodule/cpucap/cpu_aarch64_freebsd.c new file mode 100644 index 0000000000..9910261abf --- /dev/null +++ b/crypto/fipsmodule/cpucap/cpu_aarch64_freebsd.c @@ -0,0 +1,61 @@ +/* Copyright (c) 2022, Google Inc. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ + +#include "internal.h" + +#if defined(OPENSSL_AARCH64) && defined(OPENSSL_FREEBSD) && \ + !defined(OPENSSL_STATIC_ARMCAP) + +#include +#include + +#include + + +// ID_AA64ISAR0_*_VAL are defined starting FreeBSD 13.0. When FreeBSD +// 12.x is out of support, these compatibility macros can be removed. + +#ifndef ID_AA64ISAR0_AES_VAL +#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES +#endif +#ifndef ID_AA64ISAR0_SHA1_VAL +#define ID_AA64ISAR0_SHA1_VAL ID_AA64ISAR0_SHA1 +#endif +#ifndef ID_AA64ISAR0_SHA2_VAL +#define ID_AA64ISAR0_SHA2_VAL ID_AA64ISAR0_SHA2 +#endif + +void OPENSSL_cpuid_setup(void) { + uint64_t id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1); + + OPENSSL_armcap_P |= ARMV7_NEON; + + if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) >= ID_AA64ISAR0_AES_BASE) { + OPENSSL_armcap_P |= ARMV8_AES; + } + if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) >= ID_AA64ISAR0_AES_PMULL) { + OPENSSL_armcap_P |= ARMV8_PMULL; + } + if (ID_AA64ISAR0_SHA1_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA1_BASE) { + OPENSSL_armcap_P |= ARMV8_SHA1; + } + if (ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA2_BASE) { + OPENSSL_armcap_P |= ARMV8_SHA256; + } + if (ID_AA64ISAR0_SHA2_VAL(id_aa64isar0) >= ID_AA64ISAR0_SHA2_512) { + OPENSSL_armcap_P |= ARMV8_SHA512; + } +} + +#endif // OPENSSL_AARCH64 && OPENSSL_FREEBSD && !OPENSSL_STATIC_ARMCAP diff --git a/crypto/fipsmodule/cpucap/cpu_aarch64_openbsd.c b/crypto/fipsmodule/cpucap/cpu_aarch64_openbsd.c new file mode 100644 index 0000000000..6ceb636430 --- /dev/null +++ b/crypto/fipsmodule/cpucap/cpu_aarch64_openbsd.c @@ -0,0 +1,58 @@ +/* Copyright (c) 2022, Robert Nagy + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ + +#include + +#if defined(OPENSSL_AARCH64) && defined(OPENSSL_OPENBSD) && \ + !defined(OPENSSL_STATIC_ARMCAP) + +#include +#include +#include +#include + +#include + +#include "internal.h" + + +void OPENSSL_cpuid_setup(void) { + // CTL_MACHDEP from sys/sysctl.h + // CPU_ID_AA64ISAR0 from machine/cpu.h + int isar0_mib[] = { CTL_MACHDEP, CPU_ID_AA64ISAR0 }; + size_t len = sizeof(uint64_t); + uint64_t cpu_id = 0; + + if (sysctl(isar0_mib, 2, &cpu_id, &len, NULL, 0) < 0) + return; + + OPENSSL_armcap_P |= ARMV7_NEON; + + if (ID_AA64ISAR0_AES(cpu_id) >= ID_AA64ISAR0_AES_BASE) + OPENSSL_armcap_P |= ARMV8_AES; + + if (ID_AA64ISAR0_AES(cpu_id) >= ID_AA64ISAR0_AES_PMULL) + OPENSSL_armcap_P |= ARMV8_PMULL; + + if (ID_AA64ISAR0_SHA1(cpu_id) >= ID_AA64ISAR0_SHA1_BASE) + OPENSSL_armcap_P |= ARMV8_SHA1; + + if (ID_AA64ISAR0_SHA2(cpu_id) >= ID_AA64ISAR0_SHA2_BASE) + OPENSSL_armcap_P |= ARMV8_SHA256; + + if (ID_AA64ISAR0_SHA2(cpu_id) >= ID_AA64ISAR0_SHA2_512) + OPENSSL_armcap_P |= ARMV8_SHA512; +} + +#endif // OPENSSL_AARCH64 && OPENSSL_OPENBSD && !OPENSSL_STATIC_ARMCAP diff --git a/crypto/fipsmodule/cpucap/cpu_aarch64_sysreg.c b/crypto/fipsmodule/cpucap/cpu_aarch64_sysreg.c index 6564f1145a..c8ea296fd1 100644 --- a/crypto/fipsmodule/cpucap/cpu_aarch64_sysreg.c +++ b/crypto/fipsmodule/cpucap/cpu_aarch64_sysreg.c @@ -14,11 +14,8 @@ #include "../../internal.h" -// While Arm system registers are normally not available to userspace, FreeBSD -// expects userspace to simply read them. It traps the reads and fills in CPU -// capabilities. #if defined(OPENSSL_AARCH64) && !defined(OPENSSL_STATIC_ARMCAP) && \ - (defined(ANDROID_BAREMETAL) || defined(OPENSSL_FREEBSD)) + defined(ANDROID_BAREMETAL) #include @@ -89,5 +86,4 @@ static uint32_t read_armcap(void) { void OPENSSL_cpuid_setup(void) { OPENSSL_armcap_P |= read_armcap(); } -#endif // OPENSSL_AARCH64 && !OPENSSL_STATIC_ARMCAP && - // (ANDROID_BAREMETAL || OPENSSL_FREEBSD) +#endif // OPENSSL_AARCH64 && !OPENSSL_STATIC_ARMCAP && ANDROID_BAREMETAL diff --git a/crypto/fipsmodule/cpucap/internal.h b/crypto/fipsmodule/cpucap/internal.h index 784698a873..bccb8260c6 100644 --- a/crypto/fipsmodule/cpucap/internal.h +++ b/crypto/fipsmodule/cpucap/internal.h @@ -180,13 +180,9 @@ OPENSSL_INLINE int CRYPTO_cpu_perf_is_like_silvermont(void) { #if defined(OPENSSL_ARM) || defined(OPENSSL_AARCH64) -// We do not detect any features at runtime on several 32-bit Arm platforms. -// Apple platforms and OpenBSD require NEON and moved to 64-bit to pick up Armv8 -// extensions. Android baremetal does not aim to support 32-bit Arm at all, but -// it simplifies things to make it build. -#if defined(OPENSSL_ARM) && !defined(OPENSSL_STATIC_ARMCAP) && \ - (defined(OPENSSL_APPLE) || defined(OPENSSL_OPENBSD) || \ - defined(ANDROID_BAREMETAL)) +#if defined(OPENSSL_APPLE) && defined(OPENSSL_ARM) +// We do not detect any features at runtime for Apple's 32-bit ARM platforms. On +// 64-bit ARM, we detect some post-ARMv8.0 features. #define OPENSSL_STATIC_ARMCAP #endif