diff --git a/patches/coreboot-4.8.1/0000-measuredboot.patch b/patches/coreboot-4.8.1/0000-measuredboot.patch index 7731a5aef..7e3cce95b 100644 --- a/patches/coreboot-4.8.1/0000-measuredboot.patch +++ b/patches/coreboot-4.8.1/0000-measuredboot.patch @@ -167,7 +167,7 @@ index 6fd55d7..b5b7d91 100644 +{ + if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE)) + { -+ tlcl_measure(3, (const void*) start, size); ++ tlcl_measure(2, (const void*) start, size); + } +} + diff --git a/patches/coreboot-4.8.1/0009-Add-heads-TPM-measurements-to-Skylake-Kabylake.patch b/patches/coreboot-4.8.1/0009-Add-heads-TPM-measurements-to-Skylake-Kabylake.patch index 9b3898e72..1d53f90ca 100644 --- a/patches/coreboot-4.8.1/0009-Add-heads-TPM-measurements-to-Skylake-Kabylake.patch +++ b/patches/coreboot-4.8.1/0009-Add-heads-TPM-measurements-to-Skylake-Kabylake.patch @@ -51,9 +51,9 @@ index 30987ce..4957bc0 100644 + tlcl_lib_init(); + const void * const bootblock = (const void*) 0xFFFFF800; + const unsigned bootblock_size = 0x800; -+ tlcl_measure(0, bootblock, bootblock_size); ++ tlcl_measure(2, bootblock, bootblock_size); + -+ tlcl_measure(1, _romstage, _eromstage - _romstage); ++ tlcl_measure(2, _romstage, _eromstage - _romstage); + } + /* Signal that FSP component has been loaded. */ @@ -66,7 +66,7 @@ index 30987ce..4957bc0 100644 +void platform_segment_loaded(uintptr_t start, size_t size, int flags) +{ + if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE)) { -+ tlcl_measure(1, (const void*) start, size); ++ tlcl_measure(2, (const void*) start, size); + } +} + @@ -87,7 +87,7 @@ index bda88d1..49568f6 100644 die("Failed to read FSPS!\n"); + if (IS_ENABLED(CONFIG_MEASURED_BOOT)) { -+ tlcl_measure(1, (const void*) dest, size); ++ tlcl_measure(2, (const void*) dest, size); + } + if (fsp_component_relocate((uintptr_t)dest, dest, size) < 0) diff --git a/patches/coreboot-4.8.1/0030-sandybridge.patch b/patches/coreboot-4.8.1/0030-sandybridge.patch index 8559b4090..b6083f085 100644 --- a/patches/coreboot-4.8.1/0030-sandybridge.patch +++ b/patches/coreboot-4.8.1/0030-sandybridge.patch @@ -22,10 +22,10 @@ index 0426b83..d348b9e 100644 + tlcl_lib_init(); + const void * const bootblock = (const void*) 0xFFFFF800; + const unsigned bootblock_size = 0x800; -+ tlcl_measure(0, bootblock, bootblock_size); ++ tlcl_measure(2, bootblock, bootblock_size); + + extern char _romstage, _eromstage; -+ tlcl_measure(1, &_romstage, &_eromstage - &_romstage); ++ tlcl_measure(2, &_romstage, &_eromstage - &_romstage); + } + /* USB is initialized in MRC if MRC is used. */