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The CGA status register (io port 0x03DA) should be implemented correctly.
Many demos check the status of the following bits to sync screen updates:
Bit 0 - horizontal retrace in progress Bit 3 - in vertical retrace
Currently, we hack around this by changing the bits over time in https://github.com/martinlindhe/dustbox-rs/blob/master/src/cpu.rs#L3586
The text was updated successfully, but these errors were encountered:
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The CGA status register (io port 0x03DA) should be implemented correctly.
Many demos check the status of the following bits to sync screen updates:
Currently, we hack around this by changing the bits over time in https://github.com/martinlindhe/dustbox-rs/blob/master/src/cpu.rs#L3586
The text was updated successfully, but these errors were encountered: