Xilinx zcu106 image is not booting

[Apollo27]

Hi,

I tried all these three branches of this repository to build an image for Xilinx zcu106 board:

mathworks_zynq_R22.1.0
mathworks_zynq_R20.2.1
mathworks_zynq_R19.2.1

I created the folder/catalog structure needed for zcu106 build and I managed to make buildroot works, to build the Linux image successfully, but it is not working.

When I copy the generated image files (from 'buildroot/output/zcu106_linux_linaro/images/sdcard') to a SD card and boot my zcu106 board, I am getting the following error via serial port:

Xilinx Zynq MP First Stage Boot Loader
Release 2020.2 Jun 29 2022 - 12:55:33
NOTICE: ATF running on XCZU7EG/EV/silicon v4/RTL5.1 at 0xfffea000
NOTICE: BL31: Secure code at 0x0
NOTICE: BL31: Non secure code at 0x8000000
NOTICE: BL31: v1.4(release):mathworks_zynq_R20.2.1-dirty
NOTICE: BL31: Built : 16:52:16, Jun 29 2022
PMUFW: v1.1
PMUFW version error. Expected: v0.3

ERROR ### Please RESET the board

According to Mathworks buildroot documents, I have created the zcu106 folder at 'buildroot/board/mathworks/zynqmp/boards/zcu106' :

|-- zcu106/
| |-- catalog.xml
| |-- defconfig
| |-- boot/
| | |-- axilite.bit
| | |-- fsbl.elf
| | |-- pmufw.elf
| | |-- handoff/
| | | |-- psu_init_gpl.c
| | | |-- psu_init_gpl.h
| |-- dts/
| | |-- axilite.dts
| | |-- axistream.dts
| | |-- axistream_64.dts
| | |-- base.dtsi
| |-- sdcard/
| | |-- boot.scr

The ‘defconfig’ file contains:

###########################################

ZCU106 Options

###########################################
BR2_TARGET_UBOOT_BOARD_DEFCONFIG="xilinx_zynqmp_zcu106_revA"
BR2_PACKAGE_XILINX_BOOTLOADER_UBOOT_TARGET_DIR="board/xilinx/zynqmp/zynqmp-zcu106-revA"

Those files in 'zcu106/boot' folder are copied from 'xilinx-zcu106-2020.2/images/linux':

system.bit renamed to axilite.bit
zynqmp_fsbl.elf renamed to fsbl.elf
pmufw.elf (no rename required)

(There is a pmufw.bin for zcu102 but none for zcu106)

Also, I copied the 'boot.scr' to 'zcu106/sdcard' folder as well.

Those files (psu_init_gpl.c and psu_init_gpl.h) in 'zcu106/boot/handoff' folder are copied from 'xilinx-zcu106-2020.2/project-spec/hw-description' folder.

This is not working and shows the error message mentioned above.

I also tried those files from 'xilinx-zcu106-2020.2/pre-built/linux/images' with no success.

In my third attempt, I created fsbl.elf and pmufw.elf myself in Vitis 2020.2 and test them on my zcu106 board successfully, but still the images from buildroot are generating the same error as mentioned above.

[abre2183]

Hi Apollo27,
Only just seen this - you've got further than me.
You know this only supports Version 1 of the ZCU106 right? Most of the boards Xilinx sold since VisionHDL toolbox started to support this have a different SO-DIMM DDR4 module than Ver 1. I have been trying to obtain a compatible SODIMM module and in parallel trying to rebuild the firmware to support the flexible memory configurator via DDR4 I2C interface (not sure where that Memory controller configuration lies at the moment (FSBL, PMUFW or BLXX) or if that fails just configuring the memory controller with the new parameters of the current DDR4 SODIMM.
regards,
Andrew Brennan