diff --git a/docs/index.rst b/docs/index.rst
index 9bfb25adbd..0e3050ff1c 100644
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -190,7 +190,7 @@ For API clients and LLVM developers.
 
 :doc:`CodeGenerator`
    The design and implementation of the LLVM code generator.  Useful if you are
-   working on retargetting LLVM to a new architecture, designing a new codegen
+   working on retargeting LLVM to a new architecture, designing a new codegen
    pass, or enhancing existing components.
 
 :doc:`TableGen <TableGen/index>`
diff --git a/tools/clang/lib/SPIRV/EmitVisitor.h b/tools/clang/lib/SPIRV/EmitVisitor.h
index b6da5bc16e..2f5d99b89d 100644
--- a/tools/clang/lib/SPIRV/EmitVisitor.h
+++ b/tools/clang/lib/SPIRV/EmitVisitor.h
@@ -78,7 +78,7 @@ class EmitTypeHandler {
   uint32_t emitType(const SpirvType *);
 
   // Emits OpDecorate (or OpMemberDecorate if memberIndex is non-zero)
-  // targetting the given type. Uses the given decoration kind and its
+  // targeting the given type. Uses the given decoration kind and its
   // parameters.
   void emitDecoration(uint32_t typeResultId, spv::Decoration,
                       llvm::ArrayRef<uint32_t> decorationParams,
diff --git a/tools/clang/lib/SPIRV/SpirvEmitter.cpp b/tools/clang/lib/SPIRV/SpirvEmitter.cpp
index 94952b3c34..466a59c9b5 100644
--- a/tools/clang/lib/SPIRV/SpirvEmitter.cpp
+++ b/tools/clang/lib/SPIRV/SpirvEmitter.cpp
@@ -9444,7 +9444,7 @@ SpirvEmitter::processIntrinsicFirstbit(const CallExpr *callExpr,
       astContext, argType, spirvOptions.enable16BitTypes);
   if (bitwidth != 32) {
     emitError("%0 is currently limited to 32-bit width components when "
-              "targetting SPIR-V",
+              "targeting SPIR-V",
               srcLoc)
         << getFunctionOrOperatorName(callee, true);
     return nullptr;
diff --git a/tools/clang/test/CodeGenSPIRV/intrinsics.firstbithigh.64bit.hlsl b/tools/clang/test/CodeGenSPIRV/intrinsics.firstbithigh.64bit.hlsl
index c1ac8c5207..b729500908 100644
--- a/tools/clang/test/CodeGenSPIRV/intrinsics.firstbithigh.64bit.hlsl
+++ b/tools/clang/test/CodeGenSPIRV/intrinsics.firstbithigh.64bit.hlsl
@@ -3,8 +3,8 @@
 void main() {
   uint64_t   uint_1;
   int64_t2   int_2;
-// CHECK: error: firstbithigh is currently limited to 32-bit width components when targetting SPIR-V
+// CHECK: error: firstbithigh is currently limited to 32-bit width components when targeting SPIR-V
   int fbh = firstbithigh(uint_1);
-// CHECK: error: firstbithigh is currently limited to 32-bit width components when targetting SPIR-V
+// CHECK: error: firstbithigh is currently limited to 32-bit width components when targeting SPIR-V
   int64_t2 fbh2 = firstbithigh(int_2);
 }
diff --git a/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl b/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl
index c907f2a946..96ae8845f5 100644
--- a/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl
+++ b/tools/clang/test/CodeGenSPIRV/intrinsics.firstbitlow.64bit.hlsl
@@ -2,6 +2,6 @@
 
 void main() {
   uint64_t   uint_1;
-// CHECK: error: firstbitlow is currently limited to 32-bit width components when targetting SPIR-V
+// CHECK: error: firstbitlow is currently limited to 32-bit width components when targeting SPIR-V
   int fbl = firstbitlow(uint_1);
 }