From efd3a34a608094993f1160a2a7e99b881620b9a7 Mon Sep 17 00:00:00 2001 From: Jack Leightcap Date: Thu, 11 Apr 2024 11:31:12 -0400 Subject: [PATCH] libresoc: verilog init Signed-off-by: Jack Leightcap --- pkgs/default.nix | 3 ++ pkgs/libresoc/nmutil.nix | 2 - .../prefixed-openpower-isa-tools.patch | 23 +++++++++ pkgs/libresoc/remove-gitignore-check.patch | 25 ++++++++++ .../soc-nmigen-soc-no-implicit-arg.patch | 12 +++++ .../use-vendored-git-dependencies.patch | 49 +++++++++++++++++++ pkgs/libresoc/verilog.nix | 21 ++++++++ 7 files changed, 133 insertions(+), 2 deletions(-) create mode 100644 pkgs/libresoc/prefixed-openpower-isa-tools.patch create mode 100644 pkgs/libresoc/remove-gitignore-check.patch create mode 100644 pkgs/libresoc/soc-nmigen-soc-no-implicit-arg.patch create mode 100644 pkgs/libresoc/use-vendored-git-dependencies.patch create mode 100644 pkgs/libresoc/verilog.nix diff --git a/pkgs/default.nix b/pkgs/default.nix index 99c6d076..ef58fde5 100644 --- a/pkgs/default.nix +++ b/pkgs/default.nix @@ -66,6 +66,9 @@ pytest-output-to-files ; }; + + # SoC synthesized to Verilog + verilog = callPackage ./libresoc/verilog.nix {inherit pinmux soc;}; }; }; in diff --git a/pkgs/libresoc/nmutil.nix b/pkgs/libresoc/nmutil.nix index b36367d2..baba65fb 100644 --- a/pkgs/libresoc/nmutil.nix +++ b/pkgs/libresoc/nmutil.nix @@ -33,6 +33,4 @@ with python39Packages; ]; pythonImportsCheck = ["nmutil"]; - - doCheck = false; # FIXME: working, annoying while debugging } diff --git a/pkgs/libresoc/prefixed-openpower-isa-tools.patch b/pkgs/libresoc/prefixed-openpower-isa-tools.patch new file mode 100644 index 00000000..64c815f0 --- /dev/null +++ b/pkgs/libresoc/prefixed-openpower-isa-tools.patch @@ -0,0 +1,23 @@ +diff --git a/Makefile b/Makefile +index ccc0a0ba..c31dd2ee 100644 +--- a/Makefile ++++ b/Makefile +@@ -11,15 +11,15 @@ gitupdate: + + # now installed as a command (/usr/local/bin/svanalysis) by setup.py + svanalysis: +- sv_analysis ++ $(OPENPOWER)/bin/sv_analysis + + # now installed as a command (/usr/local/bin/pywriter) by setup.py + pywriter: | svanalysis +- pywriter ++ $(OPENPOWER)/bin/pywriter + + # likewise + pyfnwriter: | pywriter +- pyfnwriter ++ $(OPENPOWER)/bin/pyfnwriter + + develop: + python3 setup.py develop # yes, develop, not install diff --git a/pkgs/libresoc/remove-gitignore-check.patch b/pkgs/libresoc/remove-gitignore-check.patch new file mode 100644 index 00000000..1a56c944 --- /dev/null +++ b/pkgs/libresoc/remove-gitignore-check.patch @@ -0,0 +1,25 @@ +diff --git a/src/openpower/decoder/power_pseudo.py b/src/openpower/decoder/power_pseudo.py +index f0504a2..a84b4e6 100644 +--- a/src/openpower/decoder/power_pseudo.py ++++ b/src/openpower/decoder/power_pseudo.py +@@ -284,19 +284,7 @@ def convert_to_python(pcode, form, incl_carry, helper=False, filename="string"): + + + def check_in_gitignore(output_file): +- gitignore_file = os.path.join(os.path.dirname(output_file), ".gitignore") +- base_name = os.path.basename(output_file) +- with open(gitignore_file, "r") as f: +- for l in f.readlines(): +- l = l.strip() +- if "/" + base_name == l: +- return +- if l == "*.py": +- if base_name.endswith(".py"): +- return +- raise ValueError(f"generated output file not in .gitignore:\n" +- f"output file: {output_file}\n" +- f".gitignore file: {gitignore_file}") ++ return + + + def test(): diff --git a/pkgs/libresoc/soc-nmigen-soc-no-implicit-arg.patch b/pkgs/libresoc/soc-nmigen-soc-no-implicit-arg.patch new file mode 100644 index 00000000..bd2172e6 --- /dev/null +++ b/pkgs/libresoc/soc-nmigen-soc-no-implicit-arg.patch @@ -0,0 +1,12 @@ +diff --git a/src/soc/bus/SPBlock512W64B8W.py b/src/soc/bus/SPBlock512W64B8W.py +index 0a0d483b..24f2cf01 100644 +--- a/src/soc/bus/SPBlock512W64B8W.py ++++ b/src/soc/bus/SPBlock512W64B8W.py +@@ -25,7 +25,6 @@ class SPBlock512W64B8W(Elaboratable): + data_width=64, # 64 bit + granularity=8, # at 8-bit granularity + features=features, +- alignment=0, + name=name+"_wb") + self.bus = bus + self.granularity = bus.granularity diff --git a/pkgs/libresoc/use-vendored-git-dependencies.patch b/pkgs/libresoc/use-vendored-git-dependencies.patch new file mode 100644 index 00000000..231f1857 --- /dev/null +++ b/pkgs/libresoc/use-vendored-git-dependencies.patch @@ -0,0 +1,49 @@ +diff --git a/setup.py b/setup.py +index ca38ef9..d80d297 100644 +--- a/setup.py ++++ b/setup.py +@@ -8,19 +8,6 @@ NEWS = open(os.path.join(here, 'NEWS.txt')).read() + + version = '0.0.3' + +-# the only reason this is added is because it's become a part of python 3.9. +-# the project standard is python 3.7 however in future that will be updated. +-# for now, cached_property is RELUCTANTLY added but a *copy* is added so +-# that the generation of HDL is not critically dependent on random crap +-# off the internet. you're spending USD 16 *MILLION* on masks, you better +-# be absolutely paranoid-level certain you know where every piece of the +-# chain creating the HDL comes from. +-cprop = "git+https://git.libre-soc.org/git/cached-property.git@1.5.2" \ +- "#egg=cached-property-1.5.2" +- +-pyelftools = "git+https://git.libre-soc.org/git/pyelftools.git@v0.30" \ +- "#egg=pyelftools-0.30" +- + # using pip3 for ongoing development is a royal pain. seriously not + # recommended. therefore a number of these dependencies have been + # commented out. *they are still required* - they will need installing +@@ -39,14 +26,8 @@ install_requires = [ + 'cffi', # LuaJIT-style C FFI for Python + + # git url needed for having `pip3 install -e .` install from libre-soc git +- 'cached-property@'+cprop, +- "pyelftools@" + pyelftools, +-] +- +-# git url needed for having `setup.py develop` install from libre-soc git +-dependency_links = [ +- cprop, +- pyelftools, ++ 'cached-property', ++ "pyelftools", + ] + + test_requires = [ +@@ -78,7 +59,6 @@ setup( + include_package_data=True, + zip_safe=False, + install_requires=install_requires, +- dependency_links=dependency_links, + tests_require=test_requires, + test_suite='nose.collector', + entry_points={ diff --git a/pkgs/libresoc/verilog.nix b/pkgs/libresoc/verilog.nix new file mode 100644 index 00000000..9b3a92f4 --- /dev/null +++ b/pkgs/libresoc/verilog.nix @@ -0,0 +1,21 @@ +{ + runCommand, + pinmux, + soc, +}: +runCommand "libresoc.v" { + version = "unstable-2024-03-31"; + + nativeBuildInputs = [ + soc + pinmux + ]; +} '' + mkdir pinmux + ln -s ${pinmux} pinmux/ls180 + export PINMUX="$(realpath ./pinmux)" + python3.9 -m soc.simple.issuer_verilog \ + --debug=jtag --enable-core --enable-pll \ + --enable-xics --enable-sram4x4kblock --disable-svp64 \ + $out +''