From 0cf26fe4f92829b0daa8250870af2dac4489bda9 Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Sat, 15 Jun 2024 21:44:50 +0200 Subject: [PATCH] Prepare for release --- .github/workflows/openlane.yml | 2 +- NEWS | 16 ++++++++++++++++ README.md | 2 +- doc/servant.rst | 10 +++++----- serv.core | 2 +- servant.core | 2 +- serving.core | 2 +- verif/plugin-serv/riscof_serv.py | 4 ++-- 8 files changed, 28 insertions(+), 12 deletions(-) diff --git a/.github/workflows/openlane.yml b/.github/workflows/openlane.yml index fb0dc7c3..1c3324f8 100644 --- a/.github/workflows/openlane.yml +++ b/.github/workflows/openlane.yml @@ -17,4 +17,4 @@ jobs: uses: actions/upload-artifact@v2 with: name: serv.gds - path: /home/runner/work/serv/serv/build/serv_1.2.1/sky130-openlane/gds/serv_synth_wrapper.gds + path: /home/runner/work/serv/serv/build/serv_1.3.0/sky130-openlane/gds/serv_synth_wrapper.gds diff --git a/NEWS b/NEWS index 2e09b3b6..b2cf95a5 100644 --- a/NEWS +++ b/NEWS @@ -1,3 +1,19 @@ +1.3.0 2024-07-05 Olof Kindgren +====================================================== + +* Zephyr BSP: Port to Zephyr 3.5.0 + support tickless timer +* Make RF RAM IF work with single-port RAM +* Add PC tracing +* Make most modules width-independent +* Avoid releasing trap signal too early +* Improve timer wraparound behavior +* Overhaul documentation +* Add Servile convenience wrapper component +* Base Serving and Serving on Servile +* Add simulation cycle counter to testbench +* Add Hello world ASM example for Servant +* New Servant ports: Arty S7-50, PolarFire Splash Kit, Machdyne Kolibri, GMM-7550, Alchistry AU, ECP5 Evaluation board, Terasic DE1 SoC + 1.2.1 2022-12-25 Olof Kindgren ====================================================== diff --git a/README.md b/README.md index 1d8a6dab..bded0062 100644 --- a/README.md +++ b/README.md @@ -76,7 +76,7 @@ We are now ready to do our first exercises with SERV. If everything above is don If everything worked, the output should look like - INFO: Preparing ::serv:1.2.1 + INFO: Preparing ::serv:1.3.0 INFO: Setting up project INFO: Building simulation model diff --git a/doc/servant.rst b/doc/servant.rst index 86cdd55c..b188a243 100644 --- a/doc/servant.rst +++ b/doc/servant.rst @@ -144,7 +144,7 @@ iCEstick Pin 95 is used as the GPIO output which is connected to the board's green LED. Due to this board's limited Embedded BRAM, programs with a maximum of 7168 bytes can be loaded. The default program for this board is blinky.hex. fusesoc run --target=icestick servant - iceprog build/servant_1.2.1/icestick-icestorm/servant_1.2.1.bin + iceprog build/servant_1.3.0/icestick-icestorm/servant_1.3.0.bin iCESugar ^^^^^^^^ @@ -162,7 +162,7 @@ Pin 9 is used for UART output with 57600 baud rate. fusesoc run --target=icev_wireless servant - iceprog build/servant_1.2.1/icestick-icestorm/servant_1.2.1.bin + iceprog build/servant_1.3.0/icestick-icestorm/servant_1.3.0.bin GMM7550 ^^^^^^^ @@ -181,7 +181,7 @@ Pin B1 is used for UART output with 115200 baud rate. The serial port on Kolibri fusesoc run --target=machdyne_kolibri servant - ldprog -Ks build/servant_1.2.1/machdyne_kolibri-icestorm/servant_1.2.1.bin + ldprog -Ks build/servant_1.3.0/machdyne_kolibri-icestorm/servant_1.3.0.bin MAX10 10M08 Evaluation Kit ^^^^^^^^^^^^^^^^^^^^ @@ -196,7 +196,7 @@ Nandland Go Board Pin 56 is used as the GPIO output which is connected to the board's LED1. Due to this board's limited Embedded BRAM, programs with a maximum of 7168 bytes can be loaded. The default program for this board is blinky.hex. fusesoc run --target=go_board servant - iceprog build/servant_1.2.1/go_board-icestorm/servant_1.2.1.bin + iceprog build/servant_1.3.0/go_board-icestorm/servant_1.3.0.bin Nexys 2 ^^^^^^^ @@ -218,7 +218,7 @@ OrangeCrab R0.2 Pin D1 is used for UART output with 115200 baud rate. fusesoc run --target=orangecrab_r0.2 servant - dfu-util -d 1209:5af0 -D build/servant_1.2.1/orangecrab_r0.2-trellis/servant_1.2.1.bit + dfu-util -d 1209:5af0 -D build/servant_1.3.0/orangecrab_r0.2-trellis/servant_1.3.0.bit PolarFire Splash Kit ^^^^^^^^^^^^^^^^^^^^ diff --git a/serv.core b/serv.core index c8ec1d37..6385058d 100644 --- a/serv.core +++ b/serv.core @@ -1,6 +1,6 @@ CAPI=2: -name : ::serv:1.2.1 +name : ::serv:1.3.0 filesets: core: diff --git a/servant.core b/servant.core index c55b0136..cf1d47eb 100644 --- a/servant.core +++ b/servant.core @@ -1,6 +1,6 @@ CAPI=2: -name : ::servant:1.2.1 +name : ::servant:1.3.0 description: Simple reference system for SERV filesets: diff --git a/serving.core b/serving.core index 1d66234f..f80f0b69 100644 --- a/serving.core +++ b/serving.core @@ -1,6 +1,6 @@ CAPI=2: -name : ::serving:1.2.1 +name : ::serving:1.3.0 description: SERV-based subsystem for FPGAs filesets: diff --git a/verif/plugin-serv/riscof_serv.py b/verif/plugin-serv/riscof_serv.py index b68bf364..938b27c4 100644 --- a/verif/plugin-serv/riscof_serv.py +++ b/verif/plugin-serv/riscof_serv.py @@ -8,7 +8,7 @@ class serv(pluginTemplate): __model__ = "serv" - __version__ = "1.2.1" + __version__ = "1.3.0" def __init__(self, *args, **kwargs): sclass = super().__init__(*args, **kwargs) @@ -78,7 +78,7 @@ def runTests(self, testList): #to the old one exe = 'servant_test/verilator_tb/Vservant_sim' if not os.path.exists(exe): - exe = 'servant_test/servant_1.2.1/verilator_tb/Vservant_sim' + exe = 'servant_test/servant_1.3.0/verilator_tb/Vservant_sim' sigdump_run = [exe, "+timeout=1000000000",