Power optimization on CSR operations in a shadow of a TAKEN branch

[davideschiavone]

When a branch is taken and a CSR operation is in the ID stage, the csr_access_ex_o flip flop gets updated to 1 as it is not gated by the deassert signal:

https://github.com/openhwgroup/cv32e40p/blob/master/rtl/cv32e40p_id_stage.sv#L1573

Even if this does not happen in any functional bug, it wastes dynamic power as it changes the csr_address in the CSR register file and the multiplexer in the Ex stage.

By only gating the csr_access_o in the decoder with

assign csr_access_o = (deassert_we_i) ? 1'b0: csr_access;

causes a non-LEC, as the ex_valid_o signal in the ex_stage does not rise 1 due to the following condition

https://github.com/openhwgroup/cv32e40p/blob/master/rtl/cv32e40p_ex_stage.sv#L427

(csr_access_i is not 1 anymore)

However, the cycle later ex_valid_o goes to 1 as the alu_en_i is by default set to 1

https://github.com/openhwgroup/cv32e40p/blob/master/rtl/cv32e40p_id_stage.sv#L1620

This cause a difference when, for example, an illegal CSR instruction is executed, as such instruction stays in the FLUSH_EX state in the controller for 2 cycles, one as before, plus another one because ex_valid_o is equal to 0 in the first cycle.