From 6cc6f98e748878e62836df29733680a26202dc82 Mon Sep 17 00:00:00 2001 From: Zach Langley Date: Wed, 8 Jan 2025 13:43:59 -0500 Subject: [PATCH] feat: Change execute to take &Instruction (#1196) It seems wrong to take Instruction, since InstructionExecutor doesn't take ownership of the instruction; it just borrows it to execute. Should also reduce the amount of data cloned (some copying still takes place because of record creation). --- crates/circuits/mod-builder/src/core_chip.rs | 2 +- crates/toolchain/instructions/src/program.rs | 5 +- crates/vm/derive/src/lib.rs | 4 +- crates/vm/src/arch/execution.rs | 6 +- crates/vm/src/arch/integration_api.rs | 8 +- crates/vm/src/arch/segment.rs | 149 ++++++++++-------- crates/vm/src/arch/testing/mod.rs | 6 +- crates/vm/src/arch/testing/program/mod.rs | 2 +- crates/vm/src/system/phantom/mod.rs | 4 +- crates/vm/src/system/phantom/tests.rs | 2 +- crates/vm/src/system/program/mod.rs | 2 +- docs/crates/vm.md | 2 +- .../algebra/circuit/src/fp2_chip/addsub.rs | 4 +- .../algebra/circuit/src/fp2_chip/muldiv.rs | 4 +- .../circuit/src/modular_chip/addsub.rs | 2 +- .../circuit/src/modular_chip/muldiv.rs | 2 +- .../algebra/circuit/src/modular_chip/tests.rs | 10 +- extensions/bigint/circuit/src/tests.rs | 4 +- .../ecc/circuit/src/weierstrass_chip/tests.rs | 12 +- extensions/keccak256/circuit/src/lib.rs | 4 +- extensions/keccak256/circuit/src/tests.rs | 2 +- extensions/native/circuit/src/castf/core.rs | 2 +- extensions/native/circuit/src/castf/tests.rs | 2 +- .../circuit/src/field_arithmetic/tests.rs | 6 +- .../circuit/src/field_extension/tests.rs | 2 +- extensions/native/circuit/src/fri/mod.rs | 6 +- extensions/native/circuit/src/fri/tests.rs | 2 +- extensions/native/circuit/src/jal/tests.rs | 2 +- .../native/circuit/src/loadstore/tests.rs | 2 +- .../native/circuit/src/poseidon2/chip.rs | 4 +- .../native/circuit/src/poseidon2/mod.rs | 2 +- .../native/circuit/src/poseidon2/tests.rs | 2 +- .../pairing/circuit/src/fp12_chip/mul.rs | 2 +- .../pairing/circuit/src/fp12_chip/tests.rs | 2 +- .../src/pairing_chip/line/d_type/tests.rs | 6 +- .../src/pairing_chip/line/m_type/tests.rs | 4 +- .../miller_double_and_add_step.rs | 2 +- .../src/pairing_chip/miller_double_step.rs | 4 +- extensions/rv32im/circuit/src/auipc/tests.rs | 2 +- .../rv32im/circuit/src/base_alu/tests.rs | 4 +- .../rv32im/circuit/src/branch_eq/tests.rs | 4 +- .../rv32im/circuit/src/branch_lt/tests.rs | 4 +- extensions/rv32im/circuit/src/divrem/tests.rs | 6 +- .../rv32im/circuit/src/hintstore/tests.rs | 2 +- .../rv32im/circuit/src/jal_lui/tests.rs | 2 +- extensions/rv32im/circuit/src/jalr/tests.rs | 2 +- .../rv32im/circuit/src/less_than/tests.rs | 8 +- .../circuit/src/load_sign_extend/tests.rs | 2 +- .../rv32im/circuit/src/loadstore/tests.rs | 2 +- extensions/rv32im/circuit/src/mul/tests.rs | 4 +- extensions/rv32im/circuit/src/mulh/tests.rs | 4 +- extensions/rv32im/circuit/src/shift/tests.rs | 4 +- .../sha256/circuit/src/sha256_chip/mod.rs | 4 +- .../sha256/circuit/src/sha256_chip/tests.rs | 2 +- 54 files changed, 181 insertions(+), 163 deletions(-) diff --git a/crates/circuits/mod-builder/src/core_chip.rs b/crates/circuits/mod-builder/src/core_chip.rs index c90f70cf75..fd244592e9 100644 --- a/crates/circuits/mod-builder/src/core_chip.rs +++ b/crates/circuits/mod-builder/src/core_chip.rs @@ -231,7 +231,7 @@ where inputs.push(input); } - let Instruction { opcode, .. } = instruction.clone(); + let Instruction { opcode, .. } = instruction; let local_opcode_idx = opcode.local_opcode_idx(self.air.offset); let mut flags = vec![]; diff --git a/crates/toolchain/instructions/src/program.rs b/crates/toolchain/instructions/src/program.rs index 750a45e463..a59c8cf409 100644 --- a/crates/toolchain/instructions/src/program.rs +++ b/crates/toolchain/instructions/src/program.rs @@ -167,11 +167,10 @@ impl Program { pub fn get_instruction_and_debug_info( &self, index: usize, - ) -> Option<(Instruction, Option)> { + ) -> Option<&(Instruction, Option)> { self.instructions_and_debug_infos .get(index) - .cloned() - .flatten() + .and_then(|x| x.as_ref()) } pub fn push_instruction_and_debug_info( diff --git a/crates/vm/derive/src/lib.rs b/crates/vm/derive/src/lib.rs index 8b354de3b2..8c09c43f07 100644 --- a/crates/vm/derive/src/lib.rs +++ b/crates/vm/derive/src/lib.rs @@ -38,7 +38,7 @@ pub fn instruction_executor_derive(input: TokenStream) -> TokenStream { fn execute( &mut self, memory: &mut ::openvm_circuit::system::memory::MemoryController, - instruction: ::openvm_circuit::arch::instructions::instruction::Instruction, + instruction: &::openvm_circuit::arch::instructions::instruction::Instruction, from_state: ::openvm_circuit::arch::ExecutionState, ) -> ::openvm_circuit::arch::Result<::openvm_circuit::arch::ExecutionState> { self.0.execute(memory, instruction, from_state) @@ -92,7 +92,7 @@ pub fn instruction_executor_derive(input: TokenStream) -> TokenStream { fn execute( &mut self, memory: &mut ::openvm_circuit::system::memory::MemoryController<#first_ty_generic>, - instruction: ::openvm_circuit::arch::instructions::instruction::Instruction<#first_ty_generic>, + instruction: &::openvm_circuit::arch::instructions::instruction::Instruction<#first_ty_generic>, from_state: ::openvm_circuit::arch::ExecutionState, ) -> ::openvm_circuit::arch::Result<::openvm_circuit::arch::ExecutionState> { match self { diff --git a/crates/vm/src/arch/execution.rs b/crates/vm/src/arch/execution.rs index fc33405688..63dbb58c92 100644 --- a/crates/vm/src/arch/execution.rs +++ b/crates/vm/src/arch/execution.rs @@ -66,7 +66,7 @@ pub trait InstructionExecutor { fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, from_state: ExecutionState, ) -> Result>; @@ -79,7 +79,7 @@ impl> InstructionExecutor for RefCell { fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, prev_state: ExecutionState, ) -> Result> { self.borrow_mut().execute(memory, instruction, prev_state) @@ -94,7 +94,7 @@ impl> InstructionExecutor for Rc> { fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, prev_state: ExecutionState, ) -> Result> { self.borrow_mut().execute(memory, instruction, prev_state) diff --git a/crates/vm/src/arch/integration_api.rs b/crates/vm/src/arch/integration_api.rs index 5d7bb6707f..87b5538aab 100644 --- a/crates/vm/src/arch/integration_api.rs +++ b/crates/vm/src/arch/integration_api.rs @@ -214,16 +214,16 @@ where fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, from_state: ExecutionState, ) -> Result> { - let (reads, read_record) = self.adapter.preprocess(memory, &instruction)?; + let (reads, read_record) = self.adapter.preprocess(memory, instruction)?; let (output, core_record) = self.core - .execute_instruction(&instruction, from_state.pc, reads)?; + .execute_instruction(instruction, from_state.pc, reads)?; let (to_state, write_record) = self.adapter - .postprocess(memory, &instruction, from_state, output, &read_record)?; + .postprocess(memory, instruction, from_state, output, &read_record)?; self.records.push((read_record, write_record, core_record)); Ok(to_state) } diff --git a/crates/vm/src/arch/segment.rs b/crates/vm/src/arch/segment.rs index a812f63499..c95a921101 100644 --- a/crates/vm/src/arch/segment.rs +++ b/crates/vm/src/arch/segment.rs @@ -1,5 +1,9 @@ use backtrace::Backtrace; -use openvm_instructions::{exe::FnBounds, instruction::DebugInfo, program::Program}; +use openvm_instructions::{ + exe::FnBounds, + instruction::{DebugInfo, Instruction}, + program::Program, +}; use openvm_stark_backend::{ config::{Domain, StarkGenericConfig}, p3_commit::PolynomialSpace, @@ -10,7 +14,8 @@ use openvm_stark_backend::{ }; use super::{ - ExecutionError, Streams, SystemConfig, VmChipComplex, VmComplexTraceHeights, VmConfig, + ExecutionError, Streams, SystemBase, SystemConfig, VmChipComplex, VmComplexTraceHeights, + VmConfig, }; #[cfg(feature = "bench-metrics")] use crate::metrics::VmMetrics; @@ -106,77 +111,91 @@ impl> ExecutionSegment { let mut did_terminate = false; loop { - let (instruction, debug_info) = - self.chip_complex.program_chip_mut().get_instruction(pc)?; - tracing::trace!("pc: {pc:#x} | time: {timestamp} | {:?}", instruction); - #[allow(unused_variables)] - let (dsl_instr, trace) = debug_info.map_or( - (None, None), - |DebugInfo { - dsl_instruction, - trace, - }| (Some(dsl_instruction), trace), - ); + let (opcode, dsl_instr) = { + let Self { + chip_complex, + #[cfg(feature = "bench-metrics")] + metrics, + .. + } = self; + let SystemBase { + program_chip, + memory_controller, + .. + } = &mut chip_complex.base; + + let (instruction, debug_info) = program_chip.get_instruction(pc)?; + tracing::trace!("pc: {pc:#x} | time: {timestamp} | {:?}", instruction); - let opcode = instruction.opcode; - if opcode == VmOpcode::with_default_offset(SystemOpcode::TERMINATE) { - did_terminate = true; - self.chip_complex.connector_chip_mut().end( - ExecutionState::new(pc, timestamp), - Some(instruction.c.as_canonical_u32()), + #[allow(unused_variables)] + let (dsl_instr, trace) = debug_info.as_ref().map_or( + (None, None), + |DebugInfo { + dsl_instruction, + trace, + }| (Some(dsl_instruction), trace.as_ref()), ); - break; - } - // Some phantom instruction handling is more convenient to do here than in PhantomChip. - if opcode == VmOpcode::with_default_offset(SystemOpcode::PHANTOM) { - // Note: the discriminant is the lower 16 bits of the c operand. - let discriminant = instruction.c.as_canonical_u32() as u16; - let phantom = SysPhantom::from_repr(discriminant); - tracing::trace!("pc: {pc:#x} | system phantom: {phantom:?}"); - match phantom { - Some(SysPhantom::DebugPanic) => { - if let Some(mut backtrace) = prev_backtrace { - backtrace.resolve(); - eprintln!("openvm program failure; backtrace:\n{:?}", backtrace); - } else { - eprintln!("openvm program failure; no backtrace"); + let &Instruction { opcode, c, .. } = instruction; + if opcode == VmOpcode::with_default_offset(SystemOpcode::TERMINATE) { + did_terminate = true; + self.chip_complex.connector_chip_mut().end( + ExecutionState::new(pc, timestamp), + Some(c.as_canonical_u32()), + ); + break; + } + + // Some phantom instruction handling is more convenient to do here than in PhantomChip. + if opcode == VmOpcode::with_default_offset(SystemOpcode::PHANTOM) { + // Note: the discriminant is the lower 16 bits of the c operand. + let discriminant = c.as_canonical_u32() as u16; + let phantom = SysPhantom::from_repr(discriminant); + tracing::trace!("pc: {pc:#x} | system phantom: {phantom:?}"); + match phantom { + Some(SysPhantom::DebugPanic) => { + if let Some(mut backtrace) = prev_backtrace { + backtrace.resolve(); + eprintln!("openvm program failure; backtrace:\n{:?}", backtrace); + } else { + eprintln!("openvm program failure; no backtrace"); + } + return Err(ExecutionError::Fail { pc }); } - return Err(ExecutionError::Fail { pc }); - } - Some(SysPhantom::CtStart) => - { - #[cfg(feature = "bench-metrics")] - self.metrics - .cycle_tracker - .start(dsl_instr.clone().unwrap_or("Default".to_string())) - } - Some(SysPhantom::CtEnd) => - { - #[cfg(feature = "bench-metrics")] - self.metrics - .cycle_tracker - .end(dsl_instr.clone().unwrap_or("Default".to_string())) + Some(SysPhantom::CtStart) => + { + #[cfg(feature = "bench-metrics")] + metrics + .cycle_tracker + .start(dsl_instr.cloned().unwrap_or("Default".to_string())) + } + Some(SysPhantom::CtEnd) => + { + #[cfg(feature = "bench-metrics")] + metrics + .cycle_tracker + .end(dsl_instr.cloned().unwrap_or("Default".to_string())) + } + _ => {} } - _ => {} } - } - prev_backtrace = trace; + prev_backtrace = trace.cloned(); - let memory_controller = &mut self.chip_complex.base.memory_controller; - if let Some(executor) = self.chip_complex.inventory.get_mut_executor(&opcode) { - let next_state = InstructionExecutor::execute( - executor, - memory_controller, - instruction, - ExecutionState::new(pc, timestamp), - )?; - assert!(next_state.timestamp > timestamp); - pc = next_state.pc; - timestamp = next_state.timestamp; - } else { - return Err(ExecutionError::DisabledOperation { pc, opcode }); + if let Some(executor) = chip_complex.inventory.get_mut_executor(&opcode) { + let next_state = InstructionExecutor::execute( + executor, + memory_controller, + instruction, + ExecutionState::new(pc, timestamp), + )?; + assert!(next_state.timestamp > timestamp); + pc = next_state.pc; + timestamp = next_state.timestamp; + } else { + return Err(ExecutionError::DisabledOperation { pc, opcode }); + }; + (opcode, dsl_instr.cloned()) }; #[cfg(feature = "bench-metrics")] diff --git a/crates/vm/src/arch/testing/mod.rs b/crates/vm/src/arch/testing/mod.rs index 960a0e50ce..99bf3feb93 100644 --- a/crates/vm/src/arch/testing/mod.rs +++ b/crates/vm/src/arch/testing/mod.rs @@ -93,7 +93,7 @@ impl VmChipTestBuilder { pub fn execute>( &mut self, executor: &mut E, - instruction: Instruction, + instruction: &Instruction, ) { let initial_pc = self.next_elem_size_u32(); self.execute_with_pc(executor, instruction, initial_pc); @@ -102,7 +102,7 @@ impl VmChipTestBuilder { pub fn execute_with_pc>( &mut self, executor: &mut E, - instruction: Instruction, + instruction: &Instruction, initial_pc: u32, ) { let initial_state = ExecutionState { @@ -114,7 +114,7 @@ impl VmChipTestBuilder { let final_state = executor .execute( &mut *self.memory.controller.borrow_mut(), - instruction.clone(), + instruction, initial_state, ) .expect("Expected the execution not to fail"); diff --git a/crates/vm/src/arch/testing/program/mod.rs b/crates/vm/src/arch/testing/program/mod.rs index 947dae45e8..03619e30eb 100644 --- a/crates/vm/src/arch/testing/program/mod.rs +++ b/crates/vm/src/arch/testing/program/mod.rs @@ -32,7 +32,7 @@ impl ProgramTester { } } - pub fn execute(&mut self, instruction: Instruction, initial_state: &ExecutionState) { + pub fn execute(&mut self, instruction: &Instruction, initial_state: &ExecutionState) { self.records.push(ProgramExecutionCols { pc: F::from_canonical_u32(initial_state.pc), opcode: instruction.opcode.to_field(), diff --git a/crates/vm/src/system/phantom/mod.rs b/crates/vm/src/system/phantom/mod.rs index ea66098426..84c9ce763a 100644 --- a/crates/vm/src/system/phantom/mod.rs +++ b/crates/vm/src/system/phantom/mod.rs @@ -123,10 +123,10 @@ impl InstructionExecutor for PhantomChip { fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, from_state: ExecutionState, ) -> Result, ExecutionError> { - let Instruction { + let &Instruction { opcode, a, b, c, .. } = instruction; assert_eq!(opcode, self.air.phantom_opcode); diff --git a/crates/vm/src/system/phantom/tests.rs b/crates/vm/src/system/phantom/tests.rs index b18a85d691..7787d28f93 100644 --- a/crates/vm/src/system/phantom/tests.rs +++ b/crates/vm/src/system/phantom/tests.rs @@ -29,7 +29,7 @@ fn test_nops_and_terminate() { let mut state: ExecutionState = ExecutionState::new(F::ZERO, F::ONE); let num_nops = 5; for _ in 0..num_nops { - tester.execute_with_pc(&mut chip, nop.clone(), state.pc.as_canonical_u32()); + tester.execute_with_pc(&mut chip, &nop, state.pc.as_canonical_u32()); let new_state = tester.execution.records.last().unwrap().final_state; assert_eq!(state.pc + F::from_canonical_usize(4), new_state.pc); assert_eq!(state.timestamp + F::ONE, new_state.timestamp); diff --git a/crates/vm/src/system/program/mod.rs b/crates/vm/src/system/program/mod.rs index db83444ce8..3d68632d0f 100644 --- a/crates/vm/src/system/program/mod.rs +++ b/crates/vm/src/system/program/mod.rs @@ -72,7 +72,7 @@ impl ProgramChip { pub fn get_instruction( &mut self, pc: u32, - ) -> Result<(Instruction, Option), ExecutionError> { + ) -> Result<&(Instruction, Option), ExecutionError> { let pc_index = self.get_pc_index(pc)?; self.execution_frequencies[pc_index] += 1; self.program diff --git a/docs/crates/vm.md b/docs/crates/vm.md index 52c3599657..989e9c8a88 100644 --- a/docs/crates/vm.md +++ b/docs/crates/vm.md @@ -11,7 +11,7 @@ pub trait InstructionExecutor { /// current instance. May internally store records of this call for later trace generation. fn execute( &mut self, - instruction: Instruction, + instruction: &Instruction, from_state: ExecutionState, ) -> Result>; } diff --git a/extensions/algebra/circuit/src/fp2_chip/addsub.rs b/extensions/algebra/circuit/src/fp2_chip/addsub.rs index b2cef06d10..5a6416d94f 100644 --- a/extensions/algebra/circuit/src/fp2_chip/addsub.rs +++ b/extensions/algebra/circuit/src/fp2_chip/addsub.rs @@ -189,8 +189,8 @@ mod tests { y_limbs, chip.0.core.air.offset + Fp2Opcode::SUB as usize, ); - tester.execute(&mut chip, instruction1); - tester.execute(&mut chip, instruction2); + tester.execute(&mut chip, &instruction1); + tester.execute(&mut chip, &instruction2); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } diff --git a/extensions/algebra/circuit/src/fp2_chip/muldiv.rs b/extensions/algebra/circuit/src/fp2_chip/muldiv.rs index e8a7e3b532..3aff2c2f20 100644 --- a/extensions/algebra/circuit/src/fp2_chip/muldiv.rs +++ b/extensions/algebra/circuit/src/fp2_chip/muldiv.rs @@ -233,8 +233,8 @@ mod tests { y_limbs, chip.0.core.air.offset + Fp2Opcode::DIV as usize, ); - tester.execute(&mut chip, instruction1); - tester.execute(&mut chip, instruction2); + tester.execute(&mut chip, &instruction1); + tester.execute(&mut chip, &instruction2); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } diff --git a/extensions/algebra/circuit/src/modular_chip/addsub.rs b/extensions/algebra/circuit/src/modular_chip/addsub.rs index 091907aa06..4f0c685ba5 100644 --- a/extensions/algebra/circuit/src/modular_chip/addsub.rs +++ b/extensions/algebra/circuit/src/modular_chip/addsub.rs @@ -155,7 +155,7 @@ where ) -> Result<(AdapterRuntimeContext, Self::Record)> { let num_limbs = self.air.expr.canonical_num_limbs(); let limb_bits = self.air.expr.canonical_limb_bits(); - let Instruction { opcode, .. } = instruction.clone(); + let Instruction { opcode, .. } = instruction; let local_opcode_idx = opcode.local_opcode_idx(self.air.offset); let data: DynArray<_> = reads.into(); let data = data.0; diff --git a/extensions/algebra/circuit/src/modular_chip/muldiv.rs b/extensions/algebra/circuit/src/modular_chip/muldiv.rs index 61f51e9c03..a18e26ccb0 100644 --- a/extensions/algebra/circuit/src/modular_chip/muldiv.rs +++ b/extensions/algebra/circuit/src/modular_chip/muldiv.rs @@ -170,7 +170,7 @@ where ) -> Result<(AdapterRuntimeContext, Self::Record)> { let num_limbs = self.air.expr.canonical_num_limbs(); let limb_bits = self.air.expr.canonical_limb_bits(); - let Instruction { opcode, .. } = instruction.clone(); + let Instruction { opcode, .. } = instruction; let local_opcode_idx = opcode.local_opcode_idx(self.air.offset); let data: DynArray<_> = reads.into(); let data = data.0; diff --git a/extensions/algebra/circuit/src/modular_chip/tests.rs b/extensions/algebra/circuit/src/modular_chip/tests.rs index 6e77605a2a..b870fffebe 100644 --- a/extensions/algebra/circuit/src/modular_chip/tests.rs +++ b/extensions/algebra/circuit/src/modular_chip/tests.rs @@ -154,7 +154,7 @@ fn test_addsub(opcode_offset: usize, modulus: BigUint) { ptr_as as isize, data_as as isize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let expected_limbs = biguint_to_limbs::(expected_answer, LIMB_BITS); for (i, expected) in expected_limbs.into_iter().enumerate() { @@ -284,7 +284,7 @@ fn test_muldiv(opcode_offset: usize, modulus: BigUint) { ptr_as as isize, data_as as isize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let expected_limbs = biguint_to_limbs::(expected_answer, LIMB_BITS); for (i, expected) in expected_limbs.into_iter().enumerate() { @@ -336,7 +336,7 @@ fn test_is_equal(&modulus, &mut rng); @@ -352,7 +352,7 @@ fn test_is_equal>( tester.execute_with_pc( executor, - instruction, + &instruction, rng.gen_range((ABS_MAX_BRANCH as u32)..(1 << (PC_BITS - 1))), ); @@ -78,7 +78,7 @@ fn run_int_256_rand_execute>( vec![c.map(F::from_canonical_u32)], opcode, ); - tester.execute(executor, instruction); + tester.execute(executor, &instruction); } } } diff --git a/extensions/ecc/circuit/src/weierstrass_chip/tests.rs b/extensions/ecc/circuit/src/weierstrass_chip/tests.rs index bf6bb3933a..7662d5299d 100644 --- a/extensions/ecc/circuit/src/weierstrass_chip/tests.rs +++ b/extensions/ecc/circuit/src/weierstrass_chip/tests.rs @@ -138,7 +138,7 @@ fn test_add_ne() { vec![one_limbs, one_limbs], chip.0.core.air.offset + Rv32WeierstrassOpcode::SETUP_EC_ADD_NE as usize, ); - tester.execute(&mut chip, setup_instruction); + tester.execute(&mut chip, &setup_instruction); let instruction = rv32_write_heap_default( &mut tester, @@ -147,7 +147,7 @@ fn test_add_ne() { chip.0.core.air.offset + Rv32WeierstrassOpcode::EC_ADD_NE as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); @@ -204,7 +204,7 @@ fn test_double() { vec![], chip.0.core.air.offset + Rv32WeierstrassOpcode::SETUP_EC_DOUBLE as usize, ); - tester.execute(&mut chip, setup_instruction); + tester.execute(&mut chip, &setup_instruction); let instruction = rv32_write_heap_default( &mut tester, @@ -213,7 +213,7 @@ fn test_double() { chip.0.core.air.offset + Rv32WeierstrassOpcode::EC_DOUBLE as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); @@ -294,7 +294,7 @@ fn test_p256_double() { vec![], chip.0.core.air.offset + Rv32WeierstrassOpcode::SETUP_EC_DOUBLE as usize, ); - tester.execute(&mut chip, setup_instruction); + tester.execute(&mut chip, &setup_instruction); let instruction = rv32_write_heap_default( &mut tester, @@ -303,7 +303,7 @@ fn test_p256_double() { chip.0.core.air.offset + Rv32WeierstrassOpcode::EC_DOUBLE as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); diff --git a/extensions/keccak256/circuit/src/lib.rs b/extensions/keccak256/circuit/src/lib.rs index 97346886e9..93f4802457 100644 --- a/extensions/keccak256/circuit/src/lib.rs +++ b/extensions/keccak256/circuit/src/lib.rs @@ -132,10 +132,10 @@ impl InstructionExecutor for KeccakVmChip { fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, from_state: ExecutionState, ) -> Result, ExecutionError> { - let Instruction { + let &Instruction { opcode, a, b, diff --git a/extensions/keccak256/circuit/src/tests.rs b/extensions/keccak256/circuit/src/tests.rs index ef1ed0876c..4774a18da8 100644 --- a/extensions/keccak256/circuit/src/tests.rs +++ b/extensions/keccak256/circuit/src/tests.rs @@ -64,7 +64,7 @@ fn build_keccak256_test( tester.execute( &mut chip, - Instruction::from_isize( + &Instruction::from_isize( VmOpcode::from_usize(Rv32KeccakOpcode::KECCAK256 as usize), a as isize, b as isize, diff --git a/extensions/native/circuit/src/castf/core.rs b/extensions/native/circuit/src/castf/core.rs index 4da699aae7..68e8ca1c72 100644 --- a/extensions/native/circuit/src/castf/core.rs +++ b/extensions/native/circuit/src/castf/core.rs @@ -134,7 +134,7 @@ where _from_pc: u32, reads: I::Reads, ) -> Result<(AdapterRuntimeContext, Self::Record)> { - let Instruction { opcode, .. } = instruction.clone(); + let Instruction { opcode, .. } = instruction; assert_eq!( opcode.local_opcode_idx(self.air.offset), diff --git a/extensions/native/circuit/src/castf/tests.rs b/extensions/native/circuit/src/castf/tests.rs index 537b2e3171..61ddaa3bd9 100644 --- a/extensions/native/circuit/src/castf/tests.rs +++ b/extensions/native/circuit/src/castf/tests.rs @@ -44,7 +44,7 @@ fn prepare_castf_rand_write_execute( tester.execute( chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::from_usize(CastfOpcode::CASTF as usize), [address_x, address_y, 0, as_x, as_y], ), diff --git a/extensions/native/circuit/src/field_arithmetic/tests.rs b/extensions/native/circuit/src/field_arithmetic/tests.rs index 13dea4f955..f9653db86c 100644 --- a/extensions/native/circuit/src/field_arithmetic/tests.rs +++ b/extensions/native/circuit/src/field_arithmetic/tests.rs @@ -85,7 +85,7 @@ fn new_field_arithmetic_air_test() { } tester.execute( &mut chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::from_usize(opcode as usize), [result_address, address1, address2, result_as, as1, as2], ), @@ -135,7 +135,7 @@ fn new_field_arithmetic_air_zero_div_zero() { tester.execute( &mut chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::from_usize(FieldArithmeticOpcode::DIV as usize), [5, 6, 7, 1, 1, 1], ), @@ -179,7 +179,7 @@ fn new_field_arithmetic_air_test_panic() { // should panic tester.execute( &mut chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::from_usize(FieldArithmeticOpcode::DIV as usize), [0, 0, 0, 1, 1, 1], ), diff --git a/extensions/native/circuit/src/field_extension/tests.rs b/extensions/native/circuit/src/field_extension/tests.rs index 1a98a18bdc..d3c9d4e23f 100644 --- a/extensions/native/circuit/src/field_extension/tests.rs +++ b/extensions/native/circuit/src/field_extension/tests.rs @@ -65,7 +65,7 @@ fn new_field_extension_air_test() { tester.execute( &mut chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::from_usize(opcode as usize), [result_address, address1, address2, as_d, as_e], ), diff --git a/extensions/native/circuit/src/fri/mod.rs b/extensions/native/circuit/src/fri/mod.rs index 5e1ae284d8..0ddcb6002e 100644 --- a/extensions/native/circuit/src/fri/mod.rs +++ b/extensions/native/circuit/src/fri/mod.rs @@ -348,10 +348,10 @@ impl InstructionExecutor for FriReducedOpeningChip { fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, from_state: ExecutionState, ) -> Result, ExecutionError> { - let Instruction { + let &Instruction { a: a_ptr_ptr, b: b_ptr_ptr, c: result_ptr, @@ -401,7 +401,7 @@ impl InstructionExecutor for FriReducedOpeningChip { self.records.push(FriReducedOpeningRecord { pc: F::from_canonical_u32(from_state.pc), start_timestamp: F::from_canonical_u32(from_state.timestamp), - instruction, + instruction: instruction.clone(), alpha_read: alpha_read.0, length_read: length_read.0, a_ptr_read: a_ptr_read.0, diff --git a/extensions/native/circuit/src/fri/tests.rs b/extensions/native/circuit/src/fri/tests.rs index e81e01fc5b..321ae89b1c 100644 --- a/extensions/native/circuit/src/fri/tests.rs +++ b/extensions/native/circuit/src/fri/tests.rs @@ -111,7 +111,7 @@ fn fri_mat_opening_air_test() { tester.execute( &mut chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::from_usize(FRI_REDUCED_OPENING as usize + offset), [ a_pointer_pointer, diff --git a/extensions/native/circuit/src/jal/tests.rs b/extensions/native/circuit/src/jal/tests.rs index b430720de8..a5ca7eceaa 100644 --- a/extensions/native/circuit/src/jal/tests.rs +++ b/extensions/native/circuit/src/jal/tests.rs @@ -37,7 +37,7 @@ fn set_and_execute( tester.execute_with_pc( chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::with_default_offset(JAL), [a, imm as usize, 0, d, 0, 0, 0], ), diff --git a/extensions/native/circuit/src/loadstore/tests.rs b/extensions/native/circuit/src/loadstore/tests.rs index f25c1ea622..364e938d99 100644 --- a/extensions/native/circuit/src/loadstore/tests.rs +++ b/extensions/native/circuit/src/loadstore/tests.rs @@ -198,7 +198,7 @@ fn set_and_execute( tester.execute_with_pc( chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::with_default_offset(opcode), [data.a, data.b, data.c, data.d, data.e, data.f, data.g] .map(|x| x.as_canonical_u32() as usize), diff --git a/extensions/native/circuit/src/poseidon2/chip.rs b/extensions/native/circuit/src/poseidon2/chip.rs index 13fa601047..6ddf9067a3 100644 --- a/extensions/native/circuit/src/poseidon2/chip.rs +++ b/extensions/native/circuit/src/poseidon2/chip.rs @@ -79,10 +79,10 @@ impl InstructionExecutor fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, from_state: ExecutionState, ) -> Result, ExecutionError> { - let Instruction { + let &Instruction { opcode, a, b, diff --git a/extensions/native/circuit/src/poseidon2/mod.rs b/extensions/native/circuit/src/poseidon2/mod.rs index dd6ae912d3..2f319a9435 100644 --- a/extensions/native/circuit/src/poseidon2/mod.rs +++ b/extensions/native/circuit/src/poseidon2/mod.rs @@ -73,7 +73,7 @@ impl InstructionExecutor for NativePoseidon2Chip { fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, from_state: ExecutionState, ) -> Result, ExecutionError> { match self { diff --git a/extensions/native/circuit/src/poseidon2/tests.rs b/extensions/native/circuit/src/poseidon2/tests.rs index fae98642a1..7614b281e5 100644 --- a/extensions/native/circuit/src/poseidon2/tests.rs +++ b/extensions/native/circuit/src/poseidon2/tests.rs @@ -101,7 +101,7 @@ fn tester_with_random_poseidon2_ops( } } - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); match opcode { Poseidon2Opcode::COMP_POS2 => { diff --git a/extensions/pairing/circuit/src/fp12_chip/mul.rs b/extensions/pairing/circuit/src/fp12_chip/mul.rs index cbd4fca9c6..f7129c4244 100644 --- a/extensions/pairing/circuit/src/fp12_chip/mul.rs +++ b/extensions/pairing/circuit/src/fp12_chip/mul.rs @@ -170,7 +170,7 @@ mod tests { 512, chip.0.core.air.offset + Fp12Opcode::MUL as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } diff --git a/extensions/pairing/circuit/src/fp12_chip/tests.rs b/extensions/pairing/circuit/src/fp12_chip/tests.rs index f26fa548c7..747639475c 100644 --- a/extensions/pairing/circuit/src/fp12_chip/tests.rs +++ b/extensions/pairing/circuit/src/fp12_chip/tests.rs @@ -90,7 +90,7 @@ fn test_fp12_fn< y_limbs, chip.core.air.offset + local_opcode_idx, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let run_tester = tester.build().load(chip).load(bitwise_chip).finalize(); run_tester.simple_test().expect("Verification failed"); diff --git a/extensions/pairing/circuit/src/pairing_chip/line/d_type/tests.rs b/extensions/pairing/circuit/src/pairing_chip/line/d_type/tests.rs index b7efbdb85d..c05c45fa34 100644 --- a/extensions/pairing/circuit/src/pairing_chip/line/d_type/tests.rs +++ b/extensions/pairing/circuit/src/pairing_chip/line/d_type/tests.rs @@ -130,7 +130,7 @@ fn test_mul_013_by_013() { chip.0.core.air.offset + PairingOpcode::MUL_013_BY_013 as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } @@ -220,7 +220,7 @@ fn test_mul_by_01234() { chip.0.core.air.offset + PairingOpcode::MUL_BY_01234 as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } @@ -289,7 +289,7 @@ fn test_evaluate_line() { chip.0.core.air.offset + PairingOpcode::EVALUATE_LINE as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } diff --git a/extensions/pairing/circuit/src/pairing_chip/line/m_type/tests.rs b/extensions/pairing/circuit/src/pairing_chip/line/m_type/tests.rs index 394e4cfc27..2cba9b81da 100644 --- a/extensions/pairing/circuit/src/pairing_chip/line/m_type/tests.rs +++ b/extensions/pairing/circuit/src/pairing_chip/line/m_type/tests.rs @@ -125,7 +125,7 @@ fn test_mul_023_by_023() { chip.0.core.air.offset + PairingOpcode::MUL_023_BY_023 as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } @@ -217,7 +217,7 @@ fn test_mul_by_02345() { chip.0.core.air.offset + PairingOpcode::MUL_BY_02345 as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } diff --git a/extensions/pairing/circuit/src/pairing_chip/miller_double_and_add_step.rs b/extensions/pairing/circuit/src/pairing_chip/miller_double_and_add_step.rs index 61343fbcae..191ca7dc4f 100644 --- a/extensions/pairing/circuit/src/pairing_chip/miller_double_and_add_step.rs +++ b/extensions/pairing/circuit/src/pairing_chip/miller_double_and_add_step.rs @@ -209,7 +209,7 @@ mod tests { chip.0.core.air.offset + PairingOpcode::MILLER_DOUBLE_AND_ADD_STEP as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } diff --git a/extensions/pairing/circuit/src/pairing_chip/miller_double_step.rs b/extensions/pairing/circuit/src/pairing_chip/miller_double_step.rs index e648052287..d8daf258f1 100644 --- a/extensions/pairing/circuit/src/pairing_chip/miller_double_step.rs +++ b/extensions/pairing/circuit/src/pairing_chip/miller_double_step.rs @@ -181,7 +181,7 @@ mod tests { chip.0.core.air.offset + PairingOpcode::MILLER_DOUBLE_STEP as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } @@ -250,7 +250,7 @@ mod tests { chip.0.core.air.offset + PairingOpcode::MILLER_DOUBLE_STEP as usize, ); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); } diff --git a/extensions/rv32im/circuit/src/auipc/tests.rs b/extensions/rv32im/circuit/src/auipc/tests.rs index a78009c27a..3955a9e0b9 100644 --- a/extensions/rv32im/circuit/src/auipc/tests.rs +++ b/extensions/rv32im/circuit/src/auipc/tests.rs @@ -38,7 +38,7 @@ fn set_and_execute( tester.execute_with_pc( chip, - Instruction::from_usize(VmOpcode::with_default_offset(opcode), [a, 0, imm, 1, 0]), + &Instruction::from_usize(VmOpcode::with_default_offset(opcode), [a, 0, imm, 1, 0]), initial_pc.unwrap_or(rng.gen_range(0..(1 << PC_BITS))), ); let initial_pc = tester.execution.last_from_pc().as_canonical_u32(); diff --git a/extensions/rv32im/circuit/src/base_alu/tests.rs b/extensions/rv32im/circuit/src/base_alu/tests.rs index 02f68957c3..a691ac27ff 100644 --- a/extensions/rv32im/circuit/src/base_alu/tests.rs +++ b/extensions/rv32im/circuit/src/base_alu/tests.rs @@ -74,7 +74,7 @@ fn run_rv32_alu_rand_test(opcode: BaseAluOpcode, num_ops: usize) { let (instruction, rd) = rv32_rand_write_register_or_imm(&mut tester, b, c, c_imm, opcode as usize, &mut rng); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let a = run_alu::(opcode, &b, &c) .map(F::from_canonical_u32); @@ -147,7 +147,7 @@ fn run_rv32_alu_negative_test( tester.execute( &mut chip, - Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [0, 0, 0, 1, 1]), + &Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [0, 0, 0, 1, 1]), ); let trace_width = chip.trace_width(); diff --git a/extensions/rv32im/circuit/src/branch_eq/tests.rs b/extensions/rv32im/circuit/src/branch_eq/tests.rs index 4350feb354..4bbc8b2b3e 100644 --- a/extensions/rv32im/circuit/src/branch_eq/tests.rs +++ b/extensions/rv32im/circuit/src/branch_eq/tests.rs @@ -53,7 +53,7 @@ fn run_rv32_branch_eq_rand_execute>( tester.execute_with_pc( chip, - Instruction::from_isize( + &Instruction::from_isize( VmOpcode::from_usize(opcode as usize), rs1 as isize, rs2 as isize, @@ -145,7 +145,7 @@ fn run_rv32_beq_negative_test( tester.execute( &mut chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::from_usize(opcode as usize), [0, 0, imm as usize, 1, 1], ), diff --git a/extensions/rv32im/circuit/src/branch_lt/tests.rs b/extensions/rv32im/circuit/src/branch_lt/tests.rs index e7e94f42d7..a4d8aed889 100644 --- a/extensions/rv32im/circuit/src/branch_lt/tests.rs +++ b/extensions/rv32im/circuit/src/branch_lt/tests.rs @@ -64,7 +64,7 @@ fn run_rv32_branch_lt_rand_execute>( tester.execute_with_pc( chip, - Instruction::from_isize( + &Instruction::from_isize( VmOpcode::from_usize(opcode as usize), rs1 as isize, rs2 as isize, @@ -208,7 +208,7 @@ fn run_rv32_blt_negative_test( tester.execute( &mut chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::from_usize(opcode as usize), [0, 0, imm as usize, 1, 1], ), diff --git a/extensions/rv32im/circuit/src/divrem/tests.rs b/extensions/rv32im/circuit/src/divrem/tests.rs index 78ebc6f52f..446f207683 100644 --- a/extensions/rv32im/circuit/src/divrem/tests.rs +++ b/extensions/rv32im/circuit/src/divrem/tests.rs @@ -78,7 +78,7 @@ fn run_rv32_divrem_rand_write_execute>( run_divrem::(is_signed, &b, &c); tester.execute( chip, - Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [rd, rs1, rs2, 1, 0]), + &Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [rd, rs1, rs2, 1, 0]), ); assert_eq!( @@ -263,11 +263,11 @@ fn run_rv32_divrem_negative_test( }; tester.execute( &mut chip, - Instruction::from_usize(VmOpcode::from_usize(div_opcode as usize), [0, 0, 0, 1, 1]), + &Instruction::from_usize(VmOpcode::from_usize(div_opcode as usize), [0, 0, 0, 1, 1]), ); tester.execute( &mut chip, - Instruction::from_usize(VmOpcode::from_usize(rem_opcode as usize), [0, 0, 0, 1, 1]), + &Instruction::from_usize(VmOpcode::from_usize(rem_opcode as usize), [0, 0, 0, 1, 1]), ); let (q, r, b_sign, c_sign, q_sign, case) = diff --git a/extensions/rv32im/circuit/src/hintstore/tests.rs b/extensions/rv32im/circuit/src/hintstore/tests.rs index 91b88c7422..8aad30fab6 100644 --- a/extensions/rv32im/circuit/src/hintstore/tests.rs +++ b/extensions/rv32im/circuit/src/hintstore/tests.rs @@ -83,7 +83,7 @@ fn set_and_execute( tester.execute( chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::with_default_offset(opcode), [0, b, imm as usize, 1, 2], ), diff --git a/extensions/rv32im/circuit/src/jal_lui/tests.rs b/extensions/rv32im/circuit/src/jal_lui/tests.rs index bb23f33278..a16b20e1a7 100644 --- a/extensions/rv32im/circuit/src/jal_lui/tests.rs +++ b/extensions/rv32im/circuit/src/jal_lui/tests.rs @@ -49,7 +49,7 @@ fn set_and_execute( tester.execute_with_pc( chip, - Instruction::large_from_isize( + &Instruction::large_from_isize( VmOpcode::with_default_offset(opcode), a as isize, 0, diff --git a/extensions/rv32im/circuit/src/jalr/tests.rs b/extensions/rv32im/circuit/src/jalr/tests.rs index 6d46d427e4..7637e54f1a 100644 --- a/extensions/rv32im/circuit/src/jalr/tests.rs +++ b/extensions/rv32im/circuit/src/jalr/tests.rs @@ -57,7 +57,7 @@ fn set_and_execute( tester.execute_with_pc( chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::with_default_offset(opcode), [a, b, imm as usize, 1, 0, (a != 0) as usize, 0], ), diff --git a/extensions/rv32im/circuit/src/less_than/tests.rs b/extensions/rv32im/circuit/src/less_than/tests.rs index c6a23eeaf5..f82420710f 100644 --- a/extensions/rv32im/circuit/src/less_than/tests.rs +++ b/extensions/rv32im/circuit/src/less_than/tests.rs @@ -74,7 +74,7 @@ fn run_rv32_lt_rand_test(opcode: LessThanOpcode, num_ops: usize) { let (instruction, rd) = rv32_rand_write_register_or_imm(&mut tester, b, c, c_imm, opcode as usize, &mut rng); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let (cmp, _, _, _) = run_less_than::(opcode, &b, &c); @@ -87,12 +87,12 @@ fn run_rv32_lt_rand_test(opcode: LessThanOpcode, num_ops: usize) { let b = [101, 128, 202, 255]; let (instruction, _) = rv32_rand_write_register_or_imm(&mut tester, b, b, None, opcode as usize, &mut rng); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let b = [36, 0, 0, 0]; let (instruction, _) = rv32_rand_write_register_or_imm(&mut tester, b, b, Some(36), opcode as usize, &mut rng); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let tester = tester.build().load(chip).load(bitwise_chip).finalize(); tester.simple_test().expect("Verification failed"); @@ -154,7 +154,7 @@ fn run_rv32_lt_negative_test( tester.execute( &mut chip, - Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [0, 0, 0, 1, 1]), + &Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [0, 0, 0, 1, 1]), ); let trace_width = chip.trace_width(); diff --git a/extensions/rv32im/circuit/src/load_sign_extend/tests.rs b/extensions/rv32im/circuit/src/load_sign_extend/tests.rs index 59d449c7d5..c522852fd9 100644 --- a/extensions/rv32im/circuit/src/load_sign_extend/tests.rs +++ b/extensions/rv32im/circuit/src/load_sign_extend/tests.rs @@ -91,7 +91,7 @@ fn set_and_execute( tester.execute( chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::with_default_offset(opcode), [a, b, imm as usize, 1, 2], ), diff --git a/extensions/rv32im/circuit/src/loadstore/tests.rs b/extensions/rv32im/circuit/src/loadstore/tests.rs index 96f45012c7..a27610ec95 100644 --- a/extensions/rv32im/circuit/src/loadstore/tests.rs +++ b/extensions/rv32im/circuit/src/loadstore/tests.rs @@ -89,7 +89,7 @@ fn set_and_execute( tester.execute( chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::with_default_offset(opcode), [a, b, imm as usize, 1, mem_as], ), diff --git a/extensions/rv32im/circuit/src/mul/tests.rs b/extensions/rv32im/circuit/src/mul/tests.rs index b6f86be672..30fdfa5c4e 100644 --- a/extensions/rv32im/circuit/src/mul/tests.rs +++ b/extensions/rv32im/circuit/src/mul/tests.rs @@ -74,7 +74,7 @@ fn run_rv32_mul_rand_test(num_ops: usize) { &mut rng, ); instruction.e = F::ZERO; - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let (a, _) = run_mul::(&b, &c); assert_eq!( @@ -138,7 +138,7 @@ fn run_rv32_mul_negative_test( tester.execute( &mut chip, - Instruction::from_usize( + &Instruction::from_usize( VmOpcode::from_usize(MulOpcode::MUL as usize), [0, 0, 0, 1, 0], ), diff --git a/extensions/rv32im/circuit/src/mulh/tests.rs b/extensions/rv32im/circuit/src/mulh/tests.rs index cce30b425f..62d64470d5 100644 --- a/extensions/rv32im/circuit/src/mulh/tests.rs +++ b/extensions/rv32im/circuit/src/mulh/tests.rs @@ -62,7 +62,7 @@ fn run_rv32_mulh_rand_write_execute>( let (a, _, _, _, _) = run_mulh::(opcode, &b, &c); tester.execute( chip, - Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [rd, rs1, rs2, 1, 0]), + &Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [rd, rs1, rs2, 1, 0]), ); assert_eq!( @@ -175,7 +175,7 @@ fn run_rv32_mulh_negative_test( tester.execute( &mut chip, - Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [0, 0, 0, 1, 0]), + &Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [0, 0, 0, 1, 0]), ); let trace_width = chip.trace_width(); diff --git a/extensions/rv32im/circuit/src/shift/tests.rs b/extensions/rv32im/circuit/src/shift/tests.rs index 31ef02e2b8..4d582440da 100644 --- a/extensions/rv32im/circuit/src/shift/tests.rs +++ b/extensions/rv32im/circuit/src/shift/tests.rs @@ -78,7 +78,7 @@ fn run_rv32_shift_rand_test(opcode: ShiftOpcode, num_ops: usize) { let (instruction, rd) = rv32_rand_write_register_or_imm(&mut tester, b, c, c_imm, opcode as usize, &mut rng); - tester.execute(&mut chip, instruction); + tester.execute(&mut chip, &instruction); let (a, _, _) = run_shift::(opcode, &b, &c); assert_eq!( @@ -155,7 +155,7 @@ fn run_rv32_shift_negative_test( tester.execute( &mut chip, - Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [0, 0, 0, 1, 1]), + &Instruction::from_usize(VmOpcode::from_usize(opcode as usize), [0, 0, 0, 1, 1]), ); let bit_shift = prank_vals diff --git a/extensions/sha256/circuit/src/sha256_chip/mod.rs b/extensions/sha256/circuit/src/sha256_chip/mod.rs index 6b460910d2..69cd57cc5f 100644 --- a/extensions/sha256/circuit/src/sha256_chip/mod.rs +++ b/extensions/sha256/circuit/src/sha256_chip/mod.rs @@ -101,10 +101,10 @@ impl InstructionExecutor for Sha256VmChip { fn execute( &mut self, memory: &mut MemoryController, - instruction: Instruction, + instruction: &Instruction, from_state: ExecutionState, ) -> Result, ExecutionError> { - let Instruction { + let &Instruction { opcode, a, b, diff --git a/extensions/sha256/circuit/src/sha256_chip/tests.rs b/extensions/sha256/circuit/src/sha256_chip/tests.rs index df2111a0b7..99a2736b99 100644 --- a/extensions/sha256/circuit/src/sha256_chip/tests.rs +++ b/extensions/sha256/circuit/src/sha256_chip/tests.rs @@ -56,7 +56,7 @@ fn set_and_execute( tester.execute( chip, - Instruction::from_usize(VmOpcode::with_default_offset(opcode), [rd, rs1, rs2, 1, 2]), + &Instruction::from_usize(VmOpcode::with_default_offset(opcode), [rd, rs1, rs2, 1, 2]), ); let output = sha256_solve(message);