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RISC-V 64-bit Extension #1106

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jonathanpwang opened this issue Dec 16, 2024 · 0 comments
Open

RISC-V 64-bit Extension #1106

jonathanpwang opened this issue Dec 16, 2024 · 0 comments

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@jonathanpwang
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Since the OpenVM architecture doesn't make any choices of word size, it would be interesting to add RV64IM as a separate disjoint extension from the existing RV32IM. There would still be some limits on the max memory being at most ~2^29 bytes, but I don't see any obstacles to getting 8-byte registers supported.

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