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Release v0.2.0
lint #68: Commit 0e2d007 pushed by fischeti
October 4, 2023 14:46 1m 24s v0.2.0
October 4, 2023 14:46 1m 24s
Release v0.2.0
lint #67: Commit 0e2d007 pushed by fischeti
October 4, 2023 14:44 1m 5s main
October 4, 2023 14:44 1m 5s
RoB-less chimneys (#9)
lint #66: Commit 2cd3458 pushed by fischeti
October 4, 2023 14:41 1m 35s main
October 4, 2023 14:41 1m 35s
RoB-less chimneys
lint #65: Pull request #9 synchronize by fischeti
October 4, 2023 14:39 1m 1s no-rob-chimney
October 4, 2023 14:39 1m 1s
Update CHANGELOG
lint #64: Commit 938a73d pushed by fischeti
October 4, 2023 14:37 1m 22s no-rob-chimney
October 4, 2023 14:37 1m 22s
RoB-less chimneys
lint #63: Pull request #9 opened by fischeti
October 4, 2023 14:35 1m 16s no-rob-chimney
October 4, 2023 14:35 1m 16s
lint
lint #62: by fischeti
October 4, 2023 14:32 1m 6s no-rob-chimney
October 4, 2023 14:32 1m 6s
lint
lint #61: by fischeti
October 4, 2023 14:32 1m 12s no-rob-chimney
October 4, 2023 14:32 1m 12s
lint
lint #60: by fischeti
October 4, 2023 14:28 1m 39s main
October 4, 2023 14:28 1m 39s
Big refactoring + Improvements for future auto-generation script
lint #59: Pull request #8 opened by fischeti
October 4, 2023 14:27 1m 8s floogen
October 4, 2023 14:27 1m 8s
lint
lint #58: by fischeti
October 4, 2023 14:23 1m 36s floogen
October 4, 2023 14:23 1m 36s
test: Adapt router testbench to new flit structs
lint #57: Commit f27cc26 pushed by fischeti
October 4, 2023 13:11 1m 23s no-rob-chimney
October 4, 2023 13:11 1m 23s
lint: System Verilog sources
lint #56: Commit 27f78cd pushed by fischeti
October 4, 2023 09:23 1m 44s no-rob-chimney
October 4, 2023 09:23 1m 44s
sim: Update wave scripts
lint #55: Commit 18f2093 pushed by fischeti
October 4, 2023 09:19 1m 27s no-rob-chimney
October 4, 2023 09:19 1m 27s
lint: System Verilog sources
lint #54: Commit 5b06f43 pushed by fischeti
September 27, 2023 14:02 1m 9s no-rob-chimney
September 27, 2023 14:02 1m 9s
chimney: Fix atop bug
lint #53: Commit c63448c pushed by fischeti
September 27, 2023 13:54 1m 28s no-rob-chimney
September 27, 2023 13:54 1m 28s
nw_chimney: Don't use a reorder buffer
lint #52: Commit 681d00a pushed by fischeti
September 27, 2023 11:57 1m 5s no-rob-chimney
September 27, 2023 11:57 1m 5s
synth: Define technology specific SRAM configuration signals
lint #51: Commit 802b0e1 pushed by fischeti
September 27, 2023 08:34 1m 37s floogen
September 27, 2023 08:34 1m 37s
synth: Refactor synth wrappers
lint #50: Commit 2261738 pushed by fischeti
September 26, 2023 16:12 1m 7s floogen
September 26, 2023 16:12 1m 7s
synth: Refactor synth wrappers
lint #49: Commit 47b895f pushed by fischeti
September 26, 2023 16:02 1m 14s floogen
September 26, 2023 16:02 1m 14s
synth: Refactore nw_chimney wrapper
lint #48: Commit f1c556e pushed by fischeti
September 26, 2023 15:44 1m 21s floogen
September 26, 2023 15:44 1m 21s
synth: Refactore nw_chimney wrapper
lint #47: Commit e5ff104 pushed by fischeti
September 26, 2023 15:42 1m 15s floogen
September 26, 2023 15:42 1m 15s
nw_chimney: Fix refactoring
lint #46: Commit ca6645d pushed by fischeti
September 26, 2023 14:36 1m 4s floogen
September 26, 2023 14:36 1m 4s
test: Fix axi_xbar parameters
lint #45: Commit ac3a3a4 pushed by fischeti
September 15, 2023 08:54 1m 4s floogen
September 15, 2023 08:54 1m 4s
nw_router: Fix addr_rule parametrization
lint #44: Commit a5e6649 pushed by fischeti
September 14, 2023 14:57 1m 32s floogen
September 14, 2023 14:57 1m 32s
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