From 0e6211a9031f5fa122a722b9318256cc63c8c7b8 Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Sun, 30 Jun 2024 22:13:36 +0200 Subject: [PATCH 01/11] Bump IPs (Cheshire, CVA6, ACE). --- Bender.lock | 13 +++++++++++-- Bender.yml | 2 +- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/Bender.lock b/Bender.lock index 7f35472d..27b042f4 100644 --- a/Bender.lock +++ b/Bender.lock @@ -1,4 +1,11 @@ packages: + ace: + revision: b4fa1b5ae021672509ff8a44c8618544d7f3cb41 + version: null + source: + Git: https://github.com/pulp-platform/ace.git + dependencies: + - axi apb: revision: 77ddf073f194d44b9119949d2421be59789e69ae version: 0.2.4 @@ -113,11 +120,12 @@ packages: Git: https://github.com/AlSaqr-platform/can_bus.git dependencies: [] cheshire: - revision: 70bb12ee9a38b6a26c0f41c2d114f89451a156a1 + revision: 4bf689c1ed69265c28ac595ce9a14f183bd29b47 version: null source: Git: https://github.com/pulp-platform/cheshire.git dependencies: + - ace - apb_uart - axi - axi_llc @@ -203,11 +211,12 @@ packages: - fpnew - tech_cells_generic cva6: - revision: 8ccc3ff4d5dd51278d4af2b1e587b760a8e52b0d + revision: 6a2048c9ba026760ae35d43ae7673f506f900821 version: null source: Git: https://github.com/pulp-platform/cva6.git dependencies: + - ace - axi - common_cells - fpnew diff --git a/Bender.yml b/Bender.yml index 319dae44..e55d71d4 100644 --- a/Bender.yml +++ b/Bender.yml @@ -13,7 +13,7 @@ package: dependencies: register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.4.3 } axi: { git: https://github.com/pulp-platform/axi.git, version: 0.39.1 } - cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: 70bb12ee9a38b6a26c0f41c2d114f89451a156a1 } # branch: astral-v0 + cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: 4bf689c1ed69265c28ac595ce9a14f183bd29b47 } # branch: astral-culsans-rebase hyperbus: { git: https://github.com/pulp-platform/hyperbus.git, rev: f039e601c8b6590181734e6d26ff8b77aa380412 } # branch: chi/add_fsm_with_Tcsh dyn_mem: { git: https://github.com/pulp-platform/dyn_spm.git, rev: 480590062742230dc9bd4050358a15b4747bdf34 } # branch: main safety_island: { git: https://github.com/pulp-platform/safety_island.git, rev: aaef55c798ab53560faaf451a86668fa1e6d0f3b } # branch: carfield From 4dea09a476864924f1b9bccaeddb66c1d5d920d3 Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Mon, 1 Jul 2024 14:09:06 +0200 Subject: [PATCH 02/11] Bump Cheshire for Culsans integration. --- Bender.lock | 1 - bender-common.mk | 2 +- sw/include/car_util.h | 6 - sw/include/hmr.h | 189 -------------------------------- sw/tests/bare-metal/hostd/hmr.c | 66 +++++------ 5 files changed, 30 insertions(+), 234 deletions(-) delete mode 100644 sw/include/hmr.h diff --git a/Bender.lock b/Bender.lock index 27b042f4..24af2874 100644 --- a/Bender.lock +++ b/Bender.lock @@ -220,7 +220,6 @@ packages: - axi - common_cells - fpnew - - redundancy_cells - tech_cells_generic dyn_mem: revision: 480590062742230dc9bd4050358a15b4747bdf34 diff --git a/bender-common.mk b/bender-common.mk index 0f12d785..77598df0 100644 --- a/bender-common.mk +++ b/bender-common.mk @@ -14,7 +14,7 @@ common_targs += -t mchan common_targs += -t integer_cluster common_targs += -t cv32e40p_use_ff_regfile common_targs += -t scm_use_fpga_scm -common_targs += -t cv64a6_imafdcsclic_sv39 +common_targs += -t cv64a6_imafdc_sv39_wb # cv64a6_imafdcsclic_sv39 common_targs += -t rtl # The `snitch_cluster` target is needed for iDMA backend generation common_targs += -t snitch_cluster diff --git a/sw/include/car_util.h b/sw/include/car_util.h index 03e3a9f9..af0b1c02 100644 --- a/sw/include/car_util.h +++ b/sw/include/car_util.h @@ -379,12 +379,6 @@ uint32_t pulp_cluster_get_return(){ return readw(pulp_return_addr); } -// Wake up sleeping hart using CLINT -static inline void wakeup_hart(unsigned int hart_id) { - writew(0x1, CAR_CLINT_BASE_ADDR + 0x4*(hart_id)); - writew(0x0, CAR_CLINT_BASE_ADDR + 0x4*(hart_id)); -} - // Write synchronization request in Cheshire's dedicated register static inline void sync_req(){ writew(readw(CHESHIRE_HARTS_SYNC) | (0x1 << hart_id()), CHESHIRE_HARTS_SYNC); diff --git a/sw/include/hmr.h b/sw/include/hmr.h deleted file mode 100644 index 983978a5..00000000 --- a/sw/include/hmr.h +++ /dev/null @@ -1,189 +0,0 @@ -// Copyright 2023 ETH Zurich and University of Bologna. -// Licensed under the Apache License, Version 2.0, see LICENSE for details. -// SPDX-License-Identifier: Apache-2.0 -// -// Yvan Tortorella - -#include "car_util.h" - -#define QUAUX(X) #X -#define QU(X) QUAUX(X) - -// We save 31 32-bit registers from RF -#define NumRfRegs 0x1F -#define HmrStateSize 0x8*NumRfRegs - -void __attribute__((naked)) hmr_store_state() { - // Disable caches - __asm__ __volatile__ ( - "csrrwi x0, 0x7C1, 0x0 \n\t" - : : : "memory"); - - __asm__ __volatile__ ( - // Allocate space on top of the stack to store - // the state - "add sp, sp, -" QU(HmrStateSize) " \n\t" - - // Store registers to stack - // zero not stored as hardwired (x0) - // ra stored as HMR checkpoint (x1) - // sp stored to HMR once complete (x2) - "sd t0, 0x20(sp) \n\t" // x5 - "sd t1, 0x28(sp) \n\t" // x6 - "sd t2, 0x30(sp) \n\t" // x7 - : : : "memory"); - - __asm__ __volatile__ ( - "sd gp, 0x10(sp) \n\t" // x3 - "sd tp, 0x18(sp) \n\t" // x4 - "sd x8, 0x38(sp) \n\t" // fp - "sd s1, 0x40(sp) \n\t" // x9 - "sd a0, 0x48(sp) \n\t" // x10 - "sd a1, 0x50(sp) \n\t" // x11 - "sd a2, 0x58(sp) \n\t" // x12 - "sd a3, 0x60(sp) \n\t" // x13 - "sd a4, 0x68(sp) \n\t" // x14 - "sd a5, 0x70(sp) \n\t" // x15 - "sd a6, 0x78(sp) \n\t" // x16 - "sd a7, 0x80(sp) \n\t" // x17 - "sd s2, 0x88(sp) \n\t" // x18 - "sd s3, 0x90(sp) \n\t" // x19 - "sd s4, 0x98(sp) \n\t" // x20 - "sd s5, 0xA0(sp) \n\t" // x21 - "sd s6, 0xA8(sp) \n\t" // x22 - "sd s7, 0xB0(sp) \n\t" // x23 - "sd s8, 0xB8(sp) \n\t" // x24 - "sd s9, 0xC0(sp) \n\t" // x25 - "sd s10, 0xC8(sp) \n\t" // x26 - "sd s11, 0xD0(sp) \n\t" // x27 - "sd t3, 0xD8(sp) \n\t" // x28 - "sd t4, 0xE0(sp) \n\t" // x29 - "sd t5, 0xE8(sp) \n\t" // x30 - "sd t6, 0xF0(sp) \n\t" // x31 - - // Manually store necessary CSRs - // "csrr t1, 0x341 \n\t" // mepc - // "csrr t2, 0x300 \n\t" // mstatus - // "sw t1, 0x78(sp) \n\t" // mepc - // "csrr t1, 0x304 \n\t" // mie - // "sw t2, 0x7C(sp) \n\t" // mstatus - // "csrr t2, 0x305 \n\t" // mtvec - // "sw t1, 0x80(sp) \n\t" // mie - // "csrr t1, 0x340 \n\t" // mscratch - // "sw t2, 0x84(sp) \n\t" // mtvec - // "csrr t2, 0x342 \n\t" // mcause - // "sw t1, 0x88(sp) \n\t" // mscratch - // "csrr t1, 0x343 \n\t" // mtval - // "sw t2, 0x8C(sp) \n\t" // mcause - // "sw t1, 0x90(sp) \n\t" // mtval - : : : "memory"); - - // store sp to hmr core reg - __asm__ __volatile__( - "csrr t0, mhartid \n\t" - "li t1, " QU(HMR_BASE_ADDR + HMR_CORE_OFFS) " \n\t" - "sll t2, t0, " QU(HMR_CORE_SLL) " \n\t" - "add t2, t2, t1 \n\t" - "sw sp, " QU(HMR_CORE_REGS_SP_STORE_REG_OFFSET) "(t2) \n\t" - : : : "memory"); - - // Store the return address in - // the DMR checkpoint register - __asm__ __volatile__( - "la t1, " QU(HMR_DMR_CHECKPOINT) "\n\t" - "sw ra, 0(t1) \n\t" - : : : "memory"); - - // Request for resynchronization (reset) - __asm__ __volatile__( - "la t1, " QU(CHESHIRE_HARTS_SYNC) "\n\t" - "lw t2, 0(t1) \n\t" - "li t3, 1 \n\t" - "sll t3, t3, t0 \n\t" - "or t2, t2, t3 \n\t" - "sw t2, 0(t1) \n\t" - : : : "memory"); - - // Re-enable caches - __asm__ __volatile__ ( - "csrrwi x0, 0x7C1, 0x1 \n\t" - : : : "memory"); - - // Sleep until reset - __asm__ __volatile__("wfi" ::: "memory"); -} - -void __attribute__((naked)) hmr_load_state() { - // Read the SP from HMR register - __asm__ __volatile__( - "csrr t0, mhartid \n\t" // Read core id - "li t1, " QU(HMR_BASE_ADDR + HMR_CORE_OFFS) " \n\t" - "sll t0, t0, " QU(HMR_CORE_SLL) " \n\t" - "add t0, t0, t1 \n\t" - "lw sp, " QU(HMR_CORE_REGS_SP_STORE_REG_OFFSET) "(t0) \n\t" - "slli sp, sp, 0x20 \n\t" - "srli sp, sp, 0x20 \n\t" - // "mv ra, t0 \n\t" - : : : "memory"); - - __asm__ __volatile__ ( - // Manually load necessary CSRs - // "lw t1, 0x78(sp) \n\t" // mepc - // "lw t2, 0x7C(sp) \n\t" // mstatus - // "csrw 0x341, t1 \n\t" // mepc - // "lw t1, 0x80(sp) \n\t" // mie - // "csrw 0x300, t2 \n\t" // mstatus - // "lw t2, 0x84(sp) \n\t" // mtvec - // "csrw 0x304, t1 \n\t" // mie - // "lw t1, 0x88(sp) \n\t" // mscratch - // "csrw 0x305, t2 \n\t" // mtvec - // "lw t2, 0x8C(sp) \n\t" // mcause - // "csrw 0x340, t1 \n\t" // mscratch - // "lw t1, 0x90(sp) \n\t" // mtval - // "csrw 0x342, t2 \n\t" // mcause - // "csrw 0x343, t1 \n\t" // mtval - - // Load registers from stack - // zero not loaded as hardwired (x0) - // ra not touched is used for reboot (x1) - // sp loaded from HMR regs (x2) - "ld gp, 0x10(sp) \n\t" // x3 - "ld tp, 0x18(sp) \n\t" // x4 - "ld t0, 0x20(sp) \n\t" // x5 - "ld t1, 0x28(sp) \n\t" // x6 - "ld t2, 0x30(sp) \n\t" // x7 - "ld x8, 0x38(sp) \n\t" // fp - "ld s1, 0x40(sp) \n\t" // x9 - "ld a0, 0x48(sp) \n\t" // x10 - "ld a1, 0x50(sp) \n\t" // x11 - "ld a2, 0x58(sp) \n\t" // x12 - "ld a3, 0x60(sp) \n\t" // x13 - "ld a4, 0x68(sp) \n\t" // x14 - "ld a5, 0x70(sp) \n\t" // x15 - "ld a6, 0x78(sp) \n\t" // x16 - "ld a7, 0x80(sp) \n\t" // x17 - "ld s2, 0x88(sp) \n\t" // x18 - "ld s3, 0x90(sp) \n\t" // x19 - "ld s4, 0x98(sp) \n\t" // x20 - "ld s5, 0xA0(sp) \n\t" // x21 - "ld s6, 0xA8(sp) \n\t" // x22 - "ld s7, 0xB0(sp) \n\t" // x23 - "ld s8, 0xB8(sp) \n\t" // x24 - "ld s9, 0xC0(sp) \n\t" // x25 - "ld s10, 0xC8(sp) \n\t" // x26 - "ld s11, 0xD0(sp) \n\t" // x27 - "ld t3, 0xD8(sp) \n\t" // x28 - "ld t4, 0xE0(sp) \n\t" // x29 - "ld t5, 0xE8(sp) \n\t" // x30 - "ld t6, 0xF0(sp) \n\t" // x31 - - // Release space on the stack - "add sp, sp, " QU(HmrStateSize) " \n\t" - : : : "memory"); - - // Clear SP register in HMR - // __asm__ __volatile__( - // "sw zero, " QU(HMR_CORE_REGS_SP_STORE_REG_OFFSET) "(ra) \n\t" - // "lw ra, -" QU(HmrStateSize) "(sp) \n\t" - // : : : "memory"); -} diff --git a/sw/tests/bare-metal/hostd/hmr.c b/sw/tests/bare-metal/hostd/hmr.c index 1cf346b2..dbdd268a 100644 --- a/sw/tests/bare-metal/hostd/hmr.c +++ b/sw/tests/bare-metal/hostd/hmr.c @@ -6,46 +6,38 @@ // // Test for HMR functionalities. -#include "car_util.h" +#include "util.h" #include "printf.h" #include "hmr.h" int main(void) { - // We read the number of available harts. - uint32_t NumHarts = readw(CHESHIRE_NUM_INT_HARTS); - uint32_t OtherHart = NumHarts - 1 - hart_id(); // If hart_id() == 0 -> return 1; - // If hart_id() == 1 -> return 0; - - // Hart 0 enters first - if (hart_id() != 0) wfi(); - - printf("%d!\n", hart_id()); - - // Only hart 0 gets here - if (hart_id() == 0){ - // Check if DMR is enabled. If not, enable it - if (!readw(HMR_DMR_ENABLE)) - writew(0x1, HMR_DMR_ENABLE); - - // Wake up sleeping hart - wakeup_hart(OtherHart); - } - - hmr_store_state(); // -> Save state on top of the stack - // Save sp (x2) in HMR dedicated reg - // Save ra (x1) in DMR checkpoint reg - // Write synchronization request - // wfi() until reset - - // Both harts restart from here, but are locked as one - hmr_load_state(); // -> Code restarts executing from here because we - // re-boot from the return address (x1) - // Re-loads the saved state - // Restores the sp - - printf("DMR: we are locked as hart %d!\n", hart_id()); - - // The two locked harts return - return 0; + // Hart 0 enters first + printf("%d!\n", hart_id()); + + // Only hart 0 gets here + if (hart_id() == 0) { + // Check if DMR is enabled. If not, enable it + if (!(*reg32(&__base_hmr, HMR_DMR_ENABLE))) *reg32(&__base_hmr, HMR_DMR_ENABLE) = 0x1; + // Wake up the SMP core + smp_resume(); + } + + chs_hmr_store_state(); // -> Save state on top of the stack + // Fence.i to flush caches + // Save sp (x2) in HMR dedicated reg + // Save ra (x1) in DMR checkpoint reg + // Write synchronization request + // wfi() until reset + + // Both harts restart from here, but are locked as one + chs_hmr_load_state(); // -> Code restarts executing from here because we + // re-boot from the return address (x1) + // Re-loads the saved state + // Restores the sp + + printf("DMR: %d!\n", hart_id()); + + // The two locked harts return + return 0; } From 99d14788ef5c3bc77af005c926a5015dc17eb7a3 Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Tue, 2 Jul 2024 15:08:05 +0200 Subject: [PATCH 03/11] Bump Cheshire and ACE to cut timing loop. --- Bender.lock | 6 +++--- Bender.yml | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Bender.lock b/Bender.lock index 24af2874..9a70ec7b 100644 --- a/Bender.lock +++ b/Bender.lock @@ -1,6 +1,6 @@ packages: ace: - revision: b4fa1b5ae021672509ff8a44c8618544d7f3cb41 + revision: 67074011ee002014fa96ddcaa9ce28df3acebe2e version: null source: Git: https://github.com/pulp-platform/ace.git @@ -120,7 +120,7 @@ packages: Git: https://github.com/AlSaqr-platform/can_bus.git dependencies: [] cheshire: - revision: 4bf689c1ed69265c28ac595ce9a14f183bd29b47 + revision: 57e14b277dd46b8ec5c9f64d0a92b840509a612a version: null source: Git: https://github.com/pulp-platform/cheshire.git @@ -211,7 +211,7 @@ packages: - fpnew - tech_cells_generic cva6: - revision: 6a2048c9ba026760ae35d43ae7673f506f900821 + revision: 535e6a7b4bcd0ca4a3792554fd1219fad62c7c6c version: null source: Git: https://github.com/pulp-platform/cva6.git diff --git a/Bender.yml b/Bender.yml index e55d71d4..1254aabd 100644 --- a/Bender.yml +++ b/Bender.yml @@ -13,7 +13,7 @@ package: dependencies: register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.4.3 } axi: { git: https://github.com/pulp-platform/axi.git, version: 0.39.1 } - cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: 4bf689c1ed69265c28ac595ce9a14f183bd29b47 } # branch: astral-culsans-rebase + cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: 57e14b277dd46b8ec5c9f64d0a92b840509a612a } # branch: astral-culsans-complete hyperbus: { git: https://github.com/pulp-platform/hyperbus.git, rev: f039e601c8b6590181734e6d26ff8b77aa380412 } # branch: chi/add_fsm_with_Tcsh dyn_mem: { git: https://github.com/pulp-platform/dyn_spm.git, rev: 480590062742230dc9bd4050358a15b4747bdf34 } # branch: main safety_island: { git: https://github.com/pulp-platform/safety_island.git, rev: aaef55c798ab53560faaf451a86668fa1e6d0f3b } # branch: carfield From b8dbe1c17294b62186b152685018b0276d924e50 Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Tue, 2 Jul 2024 22:24:59 +0200 Subject: [PATCH 04/11] Bump CVA6 and Cheshire tu include CLIC controller; change CVA6 config in bender-common. --- Bender.lock | 4 ++-- Bender.yml | 2 +- bender-common.mk | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Bender.lock b/Bender.lock index 9a70ec7b..fd5fb7fd 100644 --- a/Bender.lock +++ b/Bender.lock @@ -120,7 +120,7 @@ packages: Git: https://github.com/AlSaqr-platform/can_bus.git dependencies: [] cheshire: - revision: 57e14b277dd46b8ec5c9f64d0a92b840509a612a + revision: 997e02fad48be0d1c1e801a1553cc1c3fde8525a version: null source: Git: https://github.com/pulp-platform/cheshire.git @@ -211,7 +211,7 @@ packages: - fpnew - tech_cells_generic cva6: - revision: 535e6a7b4bcd0ca4a3792554fd1219fad62c7c6c + revision: 0baa33078c3e6c827fee4e7abef0a69737c27b3a version: null source: Git: https://github.com/pulp-platform/cva6.git diff --git a/Bender.yml b/Bender.yml index 1254aabd..6fbbb663 100644 --- a/Bender.yml +++ b/Bender.yml @@ -13,7 +13,7 @@ package: dependencies: register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.4.3 } axi: { git: https://github.com/pulp-platform/axi.git, version: 0.39.1 } - cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: 57e14b277dd46b8ec5c9f64d0a92b840509a612a } # branch: astral-culsans-complete + cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: 997e02fad48be0d1c1e801a1553cc1c3fde8525a } # branch: astral-culsans-complete hyperbus: { git: https://github.com/pulp-platform/hyperbus.git, rev: f039e601c8b6590181734e6d26ff8b77aa380412 } # branch: chi/add_fsm_with_Tcsh dyn_mem: { git: https://github.com/pulp-platform/dyn_spm.git, rev: 480590062742230dc9bd4050358a15b4747bdf34 } # branch: main safety_island: { git: https://github.com/pulp-platform/safety_island.git, rev: aaef55c798ab53560faaf451a86668fa1e6d0f3b } # branch: carfield diff --git a/bender-common.mk b/bender-common.mk index 77598df0..fc0ed9d3 100644 --- a/bender-common.mk +++ b/bender-common.mk @@ -14,7 +14,7 @@ common_targs += -t mchan common_targs += -t integer_cluster common_targs += -t cv32e40p_use_ff_regfile common_targs += -t scm_use_fpga_scm -common_targs += -t cv64a6_imafdc_sv39_wb # cv64a6_imafdcsclic_sv39 +common_targs += -t cv64a6_imafdch_sv39_wb # cv64a6_imafdcsclic_sv39 common_targs += -t rtl # The `snitch_cluster` target is needed for iDMA backend generation common_targs += -t snitch_cluster From 3ae13bbbc7bd2bfbe2e72e7ba6ec50aa03b977da Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Wed, 3 Jul 2024 05:37:35 +0200 Subject: [PATCH 05/11] Bump technology commit. --- carfield.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/carfield.mk b/carfield.mk index 28a32fdf..82f5b5e4 100644 --- a/carfield.mk +++ b/carfield.mk @@ -386,7 +386,7 @@ car-check-litmus-tests: $(LITMUS_WORK_DIR)/litmus.log ############## tech-repo := git@iis-git.ee.ethz.ch:Astral/gf12.git # no commit by default, change during development -tech-commit := 4605a3c2ec3b6e0a2c19fb708e6281fe34b08e36 # branch: yt/backend-v1 +tech-commit := 42e456aebea8164ab424218861a5211199d27346 tech-clone: git clone $(tech-repo) tech From 501778932f7a50a50faef52fd99c4ac3fa3fbb36 Mon Sep 17 00:00:00 2001 From: Riccardo Tedeschi Date: Fri, 16 Aug 2024 09:54:38 +0200 Subject: [PATCH 06/11] Bump Cheshire dep --- Bender.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Bender.yml b/Bender.yml index 6fbbb663..4e962305 100644 --- a/Bender.yml +++ b/Bender.yml @@ -13,7 +13,7 @@ package: dependencies: register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.4.3 } axi: { git: https://github.com/pulp-platform/axi.git, version: 0.39.1 } - cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: 997e02fad48be0d1c1e801a1553cc1c3fde8525a } # branch: astral-culsans-complete + cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: fb137e469e781528482be21fd4350c20817225c2 } # branch: astral-culsans-complete hyperbus: { git: https://github.com/pulp-platform/hyperbus.git, rev: f039e601c8b6590181734e6d26ff8b77aa380412 } # branch: chi/add_fsm_with_Tcsh dyn_mem: { git: https://github.com/pulp-platform/dyn_spm.git, rev: 480590062742230dc9bd4050358a15b4747bdf34 } # branch: main safety_island: { git: https://github.com/pulp-platform/safety_island.git, rev: aaef55c798ab53560faaf451a86668fa1e6d0f3b } # branch: carfield From 8f64359d1d3df32a6a55b3951ebc182f19c6e026 Mon Sep 17 00:00:00 2001 From: Riccardo Tedeschi Date: Fri, 16 Aug 2024 09:54:56 +0200 Subject: [PATCH 07/11] Bump tech commit --- Bender.yml | 1 + carfield.mk | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/Bender.yml b/Bender.yml index 4e962305..9ea61128 100644 --- a/Bender.yml +++ b/Bender.yml @@ -125,6 +125,7 @@ sources: - tech/sourcecode/macros/rf_sp_uhse_rvt_mvt_256x46m2b1w1.v - tech/sourcecode/macros/rf_sp_uhse_rvt_mvt_256x64m2b1w1.v - tech/sourcecode/macros/rf_sp_uhse_rvt_mvt_256x128m2b1w1.v + - tech/sourcecode/macros/rf_sp_uhse_rvt_mvt_256x144m1b1w0.v - tech/sourcecode/macros/rf_sp_uhse_rvt_mvt_512x39m4b1w0.v - tech/sourcecode/macros/rf_sp_uhse_rvt_mvt_1024x64m4b1w1.v - tech/sourcecode/macros/rf_sp_uhse_rvt_mvt_128x264m1b1w0.v diff --git a/carfield.mk b/carfield.mk index 82f5b5e4..8f5e0996 100644 --- a/carfield.mk +++ b/carfield.mk @@ -386,7 +386,7 @@ car-check-litmus-tests: $(LITMUS_WORK_DIR)/litmus.log ############## tech-repo := git@iis-git.ee.ethz.ch:Astral/gf12.git # no commit by default, change during development -tech-commit := 42e456aebea8164ab424218861a5211199d27346 +tech-commit := 5473df37e531b3c5111024bd471abb97e356a9e0 tech-clone: git clone $(tech-repo) tech From 98687cbe27c8ea2d6134e182c59cc5c293954483 Mon Sep 17 00:00:00 2001 From: Riccardo Tedeschi Date: Fri, 16 Aug 2024 12:05:04 +0200 Subject: [PATCH 08/11] Bump `redundancy_cells` and update `Bender.lock` --- Bender.local | 2 +- Bender.lock | 34 +++++++++++++++++++++++----------- 2 files changed, 24 insertions(+), 12 deletions(-) diff --git a/Bender.local b/Bender.local index c46fe87a..15bac837 100644 --- a/Bender.local +++ b/Bender.local @@ -6,7 +6,7 @@ overrides: axi: { git: https://github.com/pulp-platform/axi.git , version: 0.39.3 } axi_riscv_atomics: { git: https://github.com/pulp-platform/axi_riscv_atomics.git , rev: 46d567cad5a614a82778702d48b3a789aed7711b } # branch: astral apb: { git: "https://github.com/pulp-platform/apb.git" , version: 0.2.3 } - redundancy_cells: { git: "https://github.com/pulp-platform/redundancy_cells.git" , rev: "78aff2115bddcbb6970c37d19da50e6bc59e5c8a" } # branch: astral-v0 + redundancy_cells: { git: "https://github.com/pulp-platform/redundancy_cells.git" , rev: "9e31f7c6c24877eaf58279903e7a162b16c9a721" } # branch: astral-v0 hci: { git: "https://github.com/pulp-platform/hci.git" , rev: d31af36ebcaf2196fb51676b40782aa8cbd9cc69 } # branch: remove-automatic-parameter-prop tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git" , version: =0.2.13 } riscv-dbg: { git: "https://github.com/pulp-platform/riscv-dbg.git" , version: =0.8.0 } diff --git a/Bender.lock b/Bender.lock index fd5fb7fd..e8c04f3e 100644 --- a/Bender.lock +++ b/Bender.lock @@ -1,6 +1,6 @@ packages: ace: - revision: 67074011ee002014fa96ddcaa9ce28df3acebe2e + revision: ea2fc9ced5be964b47cfcbcd6eb6518771a9e85d version: null source: Git: https://github.com/pulp-platform/ace.git @@ -29,8 +29,8 @@ packages: - apb - register_interface axi: - revision: 9402c8a9ce0a7b5253c3c29e788612d771e8b5d6 - version: 0.39.3 + revision: 587355b77b8ce94dcd600efbd5d5bd118ff913a7 + version: 0.39.4 source: Git: https://github.com/pulp-platform/axi.git dependencies: @@ -53,7 +53,7 @@ packages: dependencies: - axi_slice axi_llc: - revision: 4deb8c6281c74b3882846ad933f42a8c6568cbe0 + revision: 62079f9cc13e64d1ef131377aee6801eeef52642 version: null source: Git: https://github.com/pulp-platform/axi_llc @@ -61,6 +61,7 @@ packages: - axi - common_cells - common_verification + - redundancy_cells - register_interface - tech_cells_generic axi_obi: @@ -120,7 +121,7 @@ packages: Git: https://github.com/AlSaqr-platform/can_bus.git dependencies: [] cheshire: - revision: 997e02fad48be0d1c1e801a1553cc1c3fde8525a + revision: fb137e469e781528482be21fd4350c20817225c2 version: null source: Git: https://github.com/pulp-platform/cheshire.git @@ -143,6 +144,7 @@ packages: - redundancy_cells - register_interface - riscv-dbg + - riscv-iommu - serial_link - tagger - unbent @@ -211,7 +213,7 @@ packages: - fpnew - tech_cells_generic cva6: - revision: 0baa33078c3e6c827fee4e7abef0a69737c27b3a + revision: a942d97573ef60a73fcb80ea7aa4d32b7c4d836a version: null source: Git: https://github.com/pulp-platform/cva6.git @@ -220,6 +222,7 @@ packages: - axi - common_cells - fpnew + - redundancy_cells - tech_cells_generic dyn_mem: revision: 480590062742230dc9bd4050358a15b4747bdf34 @@ -315,8 +318,8 @@ packages: Git: https://github.com/pulp-platform/icache-intc.git dependencies: [] idma: - revision: 95f366e56f7e772c283fb3c8b343afc4a3978375 - version: 0.6.2 + revision: c12caf59bb482fe44b27361f6924ad346b2d22fe + version: 0.6.3 source: Git: https://github.com/pulp-platform/idma.git dependencies: @@ -368,8 +371,8 @@ packages: - hwpe-stream - zeroriscy obi: - revision: 1aa411df145c4ebdd61f8fed4d003c33f7b20636 - version: 0.1.2 + revision: 5321106817e177d6c16ecc4daa922b96b1bc946b + version: 0.1.5 source: Git: https://github.com/pulp-platform/obi.git dependencies: @@ -453,7 +456,7 @@ packages: - hwpe-stream - tech_cells_generic redundancy_cells: - revision: 78aff2115bddcbb6970c37d19da50e6bc59e5c8a + revision: 9e31f7c6c24877eaf58279903e7a162b16c9a721 version: null source: Git: https://github.com/pulp-platform/redundancy_cells.git @@ -488,6 +491,15 @@ packages: dependencies: - common_cells - tech_cells_generic + riscv-iommu: + revision: c1dea3732d0d05e5659b31773e43f3364bc866fc + version: null + source: + Git: https://github.com/zero-day-labs/riscv-iommu.git + dependencies: + - axi + - common_cells + - register_interface safety_island: revision: aaef55c798ab53560faaf451a86668fa1e6d0f3b version: null From 39f280e1f9b79b391fb7db46d27800db9c4e849c Mon Sep 17 00:00:00 2001 From: Riccardo Tedeschi Date: Wed, 28 Aug 2024 16:06:39 +0200 Subject: [PATCH 09/11] Bump `cheshire` --- Bender.lock | 6 +++--- Bender.yml | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Bender.lock b/Bender.lock index 02768e3e..e1e253ed 100644 --- a/Bender.lock +++ b/Bender.lock @@ -53,7 +53,7 @@ packages: dependencies: - axi_slice axi_llc: - revision: 62079f9cc13e64d1ef131377aee6801eeef52642 + revision: 2f23e6fc40ac7256f177a44c1f106c70c05c6cca version: null source: Git: https://github.com/pulp-platform/axi_llc @@ -121,7 +121,7 @@ packages: Git: https://github.com/AlSaqr-platform/can_bus.git dependencies: [] cheshire: - revision: fb137e469e781528482be21fd4350c20817225c2 + revision: c96614848899df428aef29888747799609ff96fd version: null source: Git: https://github.com/pulp-platform/cheshire.git @@ -213,7 +213,7 @@ packages: - fpnew - tech_cells_generic cva6: - revision: a942d97573ef60a73fcb80ea7aa4d32b7c4d836a + revision: 125c68eeb1a64c20db652be15491c19e03730b70 version: null source: Git: https://github.com/pulp-platform/cva6.git diff --git a/Bender.yml b/Bender.yml index 8893e6b1..7e04f10d 100644 --- a/Bender.yml +++ b/Bender.yml @@ -13,7 +13,7 @@ package: dependencies: register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.4.3 } axi: { git: https://github.com/pulp-platform/axi.git, version: 0.39.1 } - cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: fb137e469e781528482be21fd4350c20817225c2 } # branch: astral-culsans-complete + cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: c96614848899df428aef29888747799609ff96fd } # branch: rt/astral-culsans-complete/align hyperbus: { git: https://github.com/pulp-platform/hyperbus.git, rev: f039e601c8b6590181734e6d26ff8b77aa380412 } # branch: chi/add_fsm_with_Tcsh dyn_mem: { git: https://github.com/pulp-platform/dyn_spm.git, rev: 480590062742230dc9bd4050358a15b4747bdf34 } # branch: main safety_island: { git: https://github.com/pulp-platform/safety_island.git, rev: aaef55c798ab53560faaf451a86668fa1e6d0f3b } # branch: carfield From c337fbdab03ce39b167425e25a963c08a7a768c2 Mon Sep 17 00:00:00 2001 From: Riccardo Tedeschi Date: Wed, 4 Sep 2024 16:10:30 +0200 Subject: [PATCH 10/11] Bump `cheshire` dependency --- Bender.lock | 6 +++--- Bender.yml | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Bender.lock b/Bender.lock index 2dda0b61..b26586ce 100644 --- a/Bender.lock +++ b/Bender.lock @@ -121,7 +121,7 @@ packages: Git: https://github.com/AlSaqr-platform/can_bus.git dependencies: [] cheshire: - revision: c96614848899df428aef29888747799609ff96fd + revision: f111bc9194f93c7d1ed5658dd2beec15f777d723 version: null source: Git: https://github.com/pulp-platform/cheshire.git @@ -538,8 +538,8 @@ packages: dependencies: - tech_cells_generic serial_link: - revision: 5a25f5a71074f1ebb6de7b5280f2b16924bcc666 - version: 1.1.1 + revision: c55df03a1da06b00e567cf968b1b1a5f40c9f802 + version: 1.1.2 source: Git: https://github.com/pulp-platform/serial_link.git dependencies: diff --git a/Bender.yml b/Bender.yml index e3165879..2c748b36 100644 --- a/Bender.yml +++ b/Bender.yml @@ -13,7 +13,7 @@ package: dependencies: register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.4.3 } axi: { git: https://github.com/pulp-platform/axi.git, version: 0.39.1 } - cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: c96614848899df428aef29888747799609ff96fd } # branch: rt/astral-culsans-complete/align + cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: f111bc9194f93c7d1ed5658dd2beec15f777d723 } # branch: astral-v0 hyperbus: { git: https://github.com/pulp-platform/hyperbus.git, rev: f039e601c8b6590181734e6d26ff8b77aa380412 } # branch: chi/add_fsm_with_Tcsh dyn_mem: { git: https://github.com/pulp-platform/dyn_spm.git, rev: 480590062742230dc9bd4050358a15b4747bdf34 } # branch: main safety_island: { git: https://github.com/pulp-platform/safety_island.git, rev: aaef55c798ab53560faaf451a86668fa1e6d0f3b } # branch: carfield From 814f326d0dcb6dd95c5f587fe560f6523742f73b Mon Sep 17 00:00:00 2001 From: Riccardo Tedeschi Date: Wed, 4 Sep 2024 16:13:12 +0200 Subject: [PATCH 11/11] Bump `tech` commit --- carfield.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/carfield.mk b/carfield.mk index 556b78b4..c34ac296 100644 --- a/carfield.mk +++ b/carfield.mk @@ -422,7 +422,7 @@ car-check-litmus-tests: $(LITMUS_WORK_DIR)/litmus.log ############## tech-repo := git@iis-git.ee.ethz.ch:Astral/gf12.git # no commit by default, change during development -tech-commit := 9fe2a2bcb7a636c93bceada37e23bfc08902b6b3 # branch: yt/thales +tech-commit := 183a9cde1130f2558b359619377c0afa06a7c571 # branch: yt/thales tech-clone: git clone $(tech-repo) tech