From 9030a81c1920ef16797ed8ab61e5556ed7cd0ab1 Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Thu, 11 Jan 2024 12:25:04 +0100 Subject: [PATCH 1/2] Add HCI core FIFOs in the streamer and move input casts to cut critical paths. --- Bender.lock | 2 +- Bender.yml | 2 +- rtl/redmule_castout.sv | 2 +- rtl/redmule_pkg.sv | 5 + rtl/redmule_streamer.sv | 326 +++++++++++++++++++++++----------------- wave.do | 322 +++++++++++++++++++++++---------------- 6 files changed, 390 insertions(+), 269 deletions(-) diff --git a/Bender.lock b/Bender.lock index b266c2c..73639a2 100644 --- a/Bender.lock +++ b/Bender.lock @@ -51,7 +51,7 @@ packages: dependencies: - common_cells hci: - revision: 9d9fc44f6181e7d5357a1b31a0600630440b9586 + revision: 0c67be238169209e3c89f6dd577496db1cf9cc88 version: null source: Git: https://github.com/pulp-platform/hci.git diff --git a/Bender.yml b/Bender.yml index 9161fa3..36c736d 100644 --- a/Bender.yml +++ b/Bender.yml @@ -26,8 +26,8 @@ dependencies: cv32e40x : { git: "https://github.com/pulp-platform/cv32e40x.git" , rev: "redmule-v1.0" } ibex : { git: "https://github.com/pulp-platform/ibex.git" , rev: pulpissimo-v6.1.2 } hwpe-stream : { git: "https://github.com/pulp-platform/hwpe-stream.git" , version: 1.6 } - hci : { git: "https://github.com/pulp-platform/hci.git" , rev: 9d9fc44f6181e7d5357a1b31a0600630440b9586 } hwpe-ctrl : { git: "https://github.com/pulp-platform/hwpe-ctrl.git" , rev: b8b393575f40aea4dbd22cc7fc6077aaff2e3ed1 } # branch: yt/reqrsp + hci : { git: "https://github.com/pulp-platform/hci.git" , rev: 0c67be238169209e3c89f6dd577496db1cf9cc88 } # branch: yt/reqrsp fpnew : { git: "https://github.com/pulp-platform/cvfpu.git" , rev: "pulp-v0.1.3" } common_cells : { git: "https://github.com/pulp-platform/common_cells.git" , version: 1.21.0 } tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.11 } diff --git a/rtl/redmule_castout.sv b/rtl/redmule_castout.sv index 9a7254e..f7e5507 100644 --- a/rtl/redmule_castout.sv +++ b/rtl/redmule_castout.sv @@ -94,7 +94,7 @@ generate assign res [i*MIN_FMT+:MIN_FMT] = result[i][WIDTH-MIN_FMT-1:0]; - end // block: generate_cast_units + end endgenerate diff --git a/rtl/redmule_pkg.sv b/rtl/redmule_pkg.sv index d785978..f253512 100644 --- a/rtl/redmule_pkg.sv +++ b/rtl/redmule_pkg.sv @@ -118,6 +118,11 @@ package redmule_pkg; CSR_REDMULE_MACFG = 12'h805 } redmule_csr_num_e; + parameter int unsigned NumStreamSources = 3; // X, W, Y + parameter int unsigned XsourceStreamId = 0; + parameter int unsigned WsourceStreamId = 1; + parameter int unsigned YsourceStreamId = 2; + typedef enum logic { LD_IN_FMP, LD_WEIGHT } source_sel_e; typedef enum logic { LOAD, STORE } ld_st_sel_e; diff --git a/rtl/redmule_streamer.sv b/rtl/redmule_streamer.sv index d6bbcb6..e5ccd7f 100644 --- a/rtl/redmule_streamer.sv +++ b/rtl/redmule_streamer.sv @@ -53,191 +53,239 @@ module redmule_streamer // Here the dynamic mux for virtual_tcdm interfaces // coming/going from/to the accelerator to/from the memory -hci_core_intf #( .DW ( DW ), - .UW ( UW ) ) load_st_tcdm [0:0] ( .clk ( clk_i ) ); +hci_core_intf #( .DW ( DW ), + .UW ( UW ) ) ldst_tcdm [0:0] ( .clk ( clk_i ) ); -hci_core_assign i_ld_st_assign ( .tcdm_slave (load_st_tcdm [0]), .tcdm_master (tcdm) ); +hci_core_assign i_ldst_assign ( .tcdm_slave (ldst_tcdm [0]), .tcdm_master (tcdm) ); +// Virtual internal TCDM interface splitting the upstream TCDM into two channels: +// * Channel 0 - load channel (from TCDM to stream). +// * Channel 1 - store channel (from stream to TCDM). hci_core_intf #( .DW ( DW ), - .UW ( UW ) ) virt_tcdm [1:0] ( .clk ( clk_i ) ); + .UW ( UW ) ) virt_tcdm [1:0] ( .clk ( clk_i ) ); hci_core_mux_dynamic #( - .NB_IN_CHAN ( 2 ), - .UW ( UW ), - .DW ( DW ) -) i_ld_store_mux ( - .clk_i ( clk_i ), - .rst_ni ( rst_ni ), - .clear_i ( clear_i ), - .in ( virt_tcdm ), - .out ( load_st_tcdm ) + .NB_IN_CHAN ( 2 ), + .UW ( UW ), + .DW ( DW ) +) i_ldst_mux ( + .clk_i ( clk_i ), + .rst_ni ( rst_ni ), + .clear_i ( clear_i ), + .in ( virt_tcdm ), + .out ( ldst_tcdm ) ); +/************************************ Store Channel *************************************/ +/* The store channel of the streamer connects the incoming stream interface (Z stream) * + * to an HCI core sink module that translates the stream into a TCDM protocol. This * + * sink module then connects to a cast unit to cast data from one FP format to another. * + * The result of the cast unit enters a TCDM FIFO that eventually connects to the store * + * side (virt_tcdm[1]) of the LD/ST multiplexer. */ + +// Sink module that turns the incoming Z stream into TCDM. hci_core_intf #( .DW ( DW ), - .UW ( UW ) ) z_to_cast [0:0] ( .clk ( clk_i ) ); -hci_core_intf #( .DW ( DW ), - .UW ( UW ) ) z_to_tcdm [0:0] ( .clk ( clk_i ) ); -// Sink module that turns the incoming Z matrix stream into virtual TCDM interface + .UW ( UW ) ) zstream2cast ( .clk ( clk_i ) ); hci_core_sink #( .DATA_WIDTH ( DW ), .MISALIGNED_ACCESSES ( REALIGN ) -) i_z_stream_sink ( +) i_stream_sink ( .clk_i ( clk_i ), .rst_ni ( rst_ni ), .test_mode_i ( test_mode_i ), .clear_i ( clear_i ), .enable_i ( enable_i ), - .tcdm ( z_to_cast [0] ), + .tcdm ( zstream2cast ), .stream ( z_stream_i ), .ctrl_i ( ctrl_i.z_stream_sink_ctrl ), .flags_o ( flags_o.z_stream_sink_flags ) ); +// Store interface FIFO buses. +hci_core_intf #( .DW ( DW ), + .UW ( UW ) ) z_fifo_d ( .clk ( clk_i ) ); +hci_core_intf #( .DW ( DW ), + .UW ( UW ) ) z_fifo_q ( .clk ( clk_i ) ); + logic cast; assign cast = (ctrl_i.input_cast_src_fmt == fpnew_pkg::FP16) ? 1'b0: 1'b1; +// Store cast unit +// This unit uses only the data bus of the TCDM interface. The other buses +// are assigned manually. redmule_castout #( .FpFmtConfig ( FpFmtConfig ), .IntFmtConfig ( IntFmtConfig ), .src_format ( FPFORMAT ) -) i_output_cast ( +) i_store_cast ( .clk_i , .rst_ni , .clear_i , .cast_i ( cast ), - .src_i (z_to_cast[0].data ), + .src_i (zstream2cast.data ), .dst_fmt_i (ctrl_i.output_cast_dst_fmt ), - .dst_o (virt_tcdm[1].data ) + .dst_o (z_fifo_d.data ) +); + +// Left TCDM buses assignment. +assign z_fifo_d.req = zstream2cast.req; +assign zstream2cast.gnt = z_fifo_d.gnt; +assign z_fifo_d.add = zstream2cast.add; +assign z_fifo_d.wen = zstream2cast.wen; +assign z_fifo_d.be = zstream2cast.be; +assign z_fifo_d.boffs = zstream2cast.boffs; +assign z_fifo_d.lrdy = zstream2cast.lrdy; +assign z_fifo_d.user = zstream2cast.user; +assign zstream2cast.r_data = z_fifo_d.r_data; +assign zstream2cast.r_valid = z_fifo_d.r_valid; +assign zstream2cast.r_opc = z_fifo_d.r_opc; +assign zstream2cast.r_user = z_fifo_d.r_user; + +// HCI store fifo. +hci_core_fifo #( + .FIFO_DEPTH ( 2 ), + .DW ( DW ) +) i_store_fifo ( + .clk_i ( clk_i ), + .rst_ni ( rst_ni ), + .clear_i ( clear_i ), + .flags_o ( ), + .tcdm_slave ( z_fifo_d ), + .tcdm_master ( z_fifo_q ) ); -assign virt_tcdm[1].req = z_to_cast[0].req; -assign z_to_cast[0].gnt = virt_tcdm[1].gnt; -assign virt_tcdm[1].add = z_to_cast[0].add; -assign virt_tcdm[1].wen = z_to_cast[0].wen; -assign virt_tcdm[1].be = z_to_cast[0].be; -assign virt_tcdm[1].boffs = z_to_cast[0].boffs; -assign virt_tcdm[1].lrdy = z_to_cast[0].lrdy; -assign virt_tcdm[1].user = z_to_cast[0].user; -assign z_to_cast[0].r_data = virt_tcdm[1].r_data; -assign z_to_cast[0].r_valid = virt_tcdm[1].r_valid; -assign z_to_cast[0].r_opc = virt_tcdm[1].r_opc; -assign z_to_cast[0].r_user = virt_tcdm[1].r_user; - -// hci_core_assign i_z_assign ( .tcdm_slave (virt_tcdm [1]), .tcdm_master (z_to_tcdm [0]) ); +// Assigning the store FIFO output to the store side of the LD/ST multiplexer. +hci_core_assign i_store_assign ( .tcdm_slave (z_fifo_q), .tcdm_master (virt_tcdm[1]) ); + +/**************************************** Load Channel ****************************************/ +/* The load channel of the streamer connects the incoming TCDM interface to three different * + * stream interfaces: X stream (ID: 0), W stream (ID: 1), and Y stream (ID: 2). The load side * + * (virt_tcdm[0]) of the LD/ST multiplexer connects to another multiplexer that splits the * + * icoming TCDM bus into three TCDM interfaces (X, W, and Y). Each interface connects to its * + * own FIFO, and then to a cas unit that casts the data from one FP format to another. Then, * + * the output of the cast connects to a dedicated HCI core source unit used to translate the * + * incoming TCDM protocls into stream. */ // Virtual TCDM interfaces (source type) for input matrices -// X matrix -> source[0] -// W matrix -> source[1] -// Y matrix -> source[2] -// source[3] is fake because the hci_core_mux_dynamic does not work with three sources +// X -> source[0] +// W -> source[1] +// Y -> source[2] hci_core_intf #( .DW ( DW ), - .UW ( UW ) ) source [3:0] ( .clk ( clk_i ) ); + .UW ( UW ) ) source [NumStreamSources-1:0] ( .clk ( clk_i ) ); hci_core_intf #( .DW ( DW ), - .UW ( UW ) ) mux_tcdm [0:0] ( .clk ( clk_i ) ); -hci_core_intf #( .DW ( DW ), - .UW ( UW ) ) tcdm_cast [0:0] ( .clk ( clk_i ) ); - -redmule_castin #( - .FpFmtConfig ( FpFmtConfig ), - .IntFmtConfig ( IntFmtConfig ), - .dst_format ( FPFORMAT ) -) i_input_cast ( - .clk_i , - .rst_ni , - .clear_i , - .cast_i ( cast ), - .src_i (virt_tcdm[0].r_data ), - .src_fmt_i (ctrl_i.input_cast_src_fmt ), - .dst_o (mux_tcdm[0].r_data ) -); + .UW ( UW ) ) mux_tcdm [0:0] ( .clk ( clk_i ) ); -assign virt_tcdm[0].req = mux_tcdm[0].req; -assign mux_tcdm[0].gnt = virt_tcdm[0].gnt; -assign virt_tcdm[0].add = mux_tcdm[0].add; -assign virt_tcdm[0].wen = mux_tcdm[0].wen; -assign virt_tcdm[0].data = mux_tcdm[0].data; -assign virt_tcdm[0].be = mux_tcdm[0].be; -assign virt_tcdm[0].boffs = mux_tcdm[0].boffs; -assign virt_tcdm[0].lrdy = mux_tcdm[0].lrdy; -assign virt_tcdm[0].user = mux_tcdm[0].user; -assign mux_tcdm[0].r_valid = virt_tcdm[0].r_valid; -assign mux_tcdm[0].r_opc = virt_tcdm[0].r_opc; -assign mux_tcdm[0].r_user = virt_tcdm[0].r_user; - -// hci_core_assign i_input_assign ( .tcdm_slave (mux_tcdm [0]), .tcdm_master (tcdm_cast [0]) ); - -// Here we instantiate the dynamic mux that turns the tcdm stream into -// source [0], source[1] or source[2] depending on the scheduling +// Dynamic multiplexer splitting the TCDM-side interface into +// X, W, and Y interfaces hci_core_mux_dynamic #( - .NB_IN_CHAN ( 4 ), - .UW ( UW ), - .DW ( DW ) + .NB_IN_CHAN ( NumStreamSources ), + .UW ( UW ), + .DW ( DW ) ) i_source_mux ( - .clk_i ( clk_i ), - .rst_ni ( rst_ni ), - .clear_i ( clear_i ), - .in ( source ), - .out ( mux_tcdm [0:0] ) + .clk_i ( clk_i ), + .rst_ni ( rst_ni ), + .clear_i ( clear_i ), + .in ( source ), + .out ( virt_tcdm[0:0] ) ); -// Here we implement the source module to convert virt_tcdm [0] interface to -// all source streams. -// Source module for X input matrix -hci_core_source #( - .DATA_WIDTH ( DW ), - .MISALIGNED_ACCESSES ( REALIGN ) -) i_x_stream_source ( - .clk_i ( clk_i ), - .rst_ni ( rst_ni ), - .test_mode_i ( test_mode_i ), - .clear_i ( clear_i ), - .enable_i ( enable_i ), - .tcdm ( source [0] ), - .stream ( x_stream_o ), - .ctrl_i ( ctrl_i.x_stream_source_ctrl ), - .flags_o ( flags_o.x_stream_source_flags ) -); +// One TCDM FIFO and one HCI core source unit per stream channel. +hci_core_intf #( .DW ( DW ), + .UW ( UW ) ) load_fifo_d [NumStreamSources-1:0] ( .clk ( clk_i ) ); -// Source module for W input matrix -hci_core_source #( - .DATA_WIDTH ( DW ), - .MISALIGNED_ACCESSES ( REALIGN ) -) i_w_stream_source ( - .clk_i ( clk_i ), - .rst_ni ( rst_ni ), - .test_mode_i ( test_mode_i ), - .clear_i ( clear_i ), - .enable_i ( enable_i ), - .tcdm ( source [1] ), - .stream ( w_stream_o ), - .ctrl_i ( ctrl_i.w_stream_source_ctrl ), - .flags_o ( flags_o.w_stream_source_flags ) -); +hci_core_intf #( .DW ( DW ), + .UW ( UW ) ) load_fifo_q [NumStreamSources-1:0] ( .clk ( clk_i ) ); -// Source module for Y input matrix -hci_core_source #( - .DATA_WIDTH ( DW ), - .MISALIGNED_ACCESSES ( REALIGN ) -) i_y_stream_source ( - .clk_i ( clk_i ), - .rst_ni ( rst_ni ), - .test_mode_i ( test_mode_i ), - .clear_i ( clear_i ), - .enable_i ( enable_i ), - .tcdm ( source[2] ), - .stream ( y_stream_o ), - .ctrl_i ( ctrl_i.y_stream_source_ctrl ), - .flags_o ( flags_o.y_stream_source_flags ) -); +hci_core_intf #( .DW ( DW ), + .UW ( UW ) ) tcdm_cast [NumStreamSources-1:0] ( .clk ( clk_i ) ); + +hwpe_stream_intf_stream #( .DATA_WIDTH ( DATAW ) ) out_stream [NumStreamSources-1:0] ( .clk( clk_i ) ); + +hci_package::hci_streamer_ctrl_t [NumStreamSources-1:0] source_ctrl; +hci_package::hci_streamer_flags_t [NumStreamSources-1:0] source_flags; + +// Assign input control buses to the relative ID in the vector. +assign source_ctrl[XsourceStreamId] = ctrl_i.x_stream_source_ctrl; +assign source_ctrl[WsourceStreamId] = ctrl_i.w_stream_source_ctrl; +assign source_ctrl[YsourceStreamId] = ctrl_i.y_stream_source_ctrl; + +for (genvar i = 0; i < NumStreamSources; i++) begin: gen_tcdm2stream + + hci_core_assign i_load_assign ( .tcdm_slave (load_fifo_d[i]), .tcdm_master (source[i]) ); + + hci_core_fifo #( + .FIFO_DEPTH ( 2 ), + .DW ( DW ) + ) i_load_tcdm_fifo ( + .clk_i ( clk_i ), + .rst_ni ( rst_ni ), + .clear_i ( clear_i ), + .flags_o ( ), + .tcdm_slave ( load_fifo_q[i] ), + .tcdm_master ( load_fifo_d[i] ) + ); + + // Load cast unit + // This unit uses only the data bus of the TCDM interface. The other buses + // are assigned manually. + redmule_castin #( + .FpFmtConfig ( FpFmtConfig ), + .IntFmtConfig ( IntFmtConfig ), + .dst_format ( FPFORMAT ) + ) i_load_cast ( + .clk_i , + .rst_ni , + .clear_i , + .cast_i ( cast ), + .src_i ( load_fifo_q[i].r_data ), + .src_fmt_i ( ctrl_i.input_cast_src_fmt ), + .dst_o ( tcdm_cast[i].r_data ) + ); + + // Left TCDM buses assignment. + assign load_fifo_q[i].req = tcdm_cast[i].req; + assign tcdm_cast[i].gnt = load_fifo_q[i].gnt; + assign load_fifo_q[i].add = tcdm_cast[i].add; + assign load_fifo_q[i].wen = tcdm_cast[i].wen; + assign load_fifo_q[i].data = tcdm_cast[i].data; + assign load_fifo_q[i].be = tcdm_cast[i].be; + assign load_fifo_q[i].boffs = tcdm_cast[i].boffs; + assign load_fifo_q[i].lrdy = tcdm_cast[i].lrdy; + assign load_fifo_q[i].user = tcdm_cast[i].user; + assign tcdm_cast[i].r_valid = load_fifo_q[i].r_valid; + assign tcdm_cast[i].r_opc = load_fifo_q[i].r_opc; + assign tcdm_cast[i].r_user = load_fifo_q[i].r_user; + + hci_core_source #( + .DATA_WIDTH ( DW ), + .MISALIGNED_ACCESSES ( REALIGN ) + ) i_stream_source ( + .clk_i ( clk_i ), + .rst_ni ( rst_ni ), + .test_mode_i ( test_mode_i ), + .clear_i ( clear_i ), + .enable_i ( enable_i ), + .tcdm ( tcdm_cast[i] ), + .stream ( out_stream[i] ), + .ctrl_i ( source_ctrl[i] ), + .flags_o ( source_flags[i] ) + ); + +end + +// Assign flags in the vector to the relative output buses. +assign flags_o.x_stream_source_flags = source_flags[XsourceStreamId]; +assign flags_o.w_stream_source_flags = source_flags[WsourceStreamId]; +assign flags_o.y_stream_source_flags = source_flags[YsourceStreamId]; + +// Assign resulting streams. +hwpe_stream_assign i_xstream_assign ( .push_i( out_stream[XsourceStreamId] ) , + .pop_o ( x_stream_o ) ); + +hwpe_stream_assign i_wstream_assign ( .push_i( out_stream[WsourceStreamId] ) , + .pop_o ( w_stream_o ) ); -// Binding source[3] to '0 to solve hci_core_mux_dynamic issues -assign source[3].req = 0; -assign source[3].add = '0; -assign source[3].wen = 0; -assign source[3].data = 0; -assign source[3].be = 0; -assign source[3].boffs = 0; -assign source[3].lrdy = 0; -assign source[3].user = '0; +hwpe_stream_assign i_ystream_assign ( .push_i( out_stream[YsourceStreamId] ) , + .pop_o ( y_stream_o ) ); endmodule : redmule_streamer diff --git a/wave.do b/wave.do index d813c0e..8353e98 100644 --- a/wave.do +++ b/wave.do @@ -443,131 +443,199 @@ add wave -noupdate -group streamer /redmule_tb/i_redmule_wrap/i_redmule_top/i_st add wave -noupdate -group streamer /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/clear_i add wave -noupdate -group streamer /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/ctrl_i add wave -noupdate -group streamer /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/flags_o -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/clk_i -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/rst_ni -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/clear_i -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/cast_i -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/src_i -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/src_fmt_i -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/dst_o -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/src_int -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/result -add wave -noupdate -group streamer -group input_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_input_cast/operand -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/clk_i -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/rst_ni -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/clear_i -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/cast_i -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/src_i -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/dst_fmt_i -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/dst_o -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/dst_int -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/result -add wave -noupdate -group streamer -group output_cast /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_output_cast/operand -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/clk_i -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/rst_ni -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/test_mode_i -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/clear_i -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/enable_i -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/ctrl_i -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/flags_o -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/cs -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/ns -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/addr_fifo_flags -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/done -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/address_gen_en -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/address_gen_clr -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/stream_valid_q -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/stream_data_q -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/addr_misaligned_q -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/addr_misaligned_valid -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/stream_data_misaligned -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/stream_data_aligned -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/stream_cnt_en -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/stream_cnt_clr -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/stream_cnt_d -add wave -noupdate -group streamer -group x_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_x_stream_source/stream_cnt_q -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/clk_i -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/rst_ni -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/test_mode_i -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/clear_i -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/enable_i -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/ctrl_i -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/flags_o -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/cs -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/ns -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/addr_fifo_flags -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/done -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/address_gen_en -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/address_gen_clr -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/stream_valid_q -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/stream_data_q -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/addr_misaligned_q -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/addr_misaligned_valid -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/stream_data_misaligned -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/stream_data_aligned -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/stream_cnt_en -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/stream_cnt_clr -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/stream_cnt_d -add wave -noupdate -group streamer -group y_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_y_stream_source/stream_cnt_q -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/clk_i -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/rst_ni -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/test_mode_i -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/clear_i -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/enable_i -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/ctrl_i -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/flags_o -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/cs -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/ns -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/addr_fifo_flags -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/done -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/address_gen_en -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/address_gen_clr -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/stream_valid_q -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/stream_data_q -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/addr_misaligned_q -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/addr_misaligned_valid -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/stream_data_misaligned -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/stream_data_aligned -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/stream_cnt_en -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/stream_cnt_clr -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/stream_cnt_d -add wave -noupdate -group streamer -group w_source /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_w_stream_source/stream_cnt_q -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/clk_i -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/rst_ni -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/test_mode_i -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/clear_i -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/enable_i -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/ctrl_i -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/flags_o -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/cs -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/ns -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/addr_fifo_flags -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/address_gen_en -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/address_gen_clr -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/done -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/tcdm_inflight -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/address_cnt_en -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/address_cnt_clr -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/address_cnt_d -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/address_cnt_q -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/stream_data_misaligned -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/stream_strb_misaligned -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/stream_data_aligned -add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_z_stream_sink/stream_strb_aligned -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/clk -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/req -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/gnt -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/lrdy -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/add -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/wen -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/data -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/be -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/boffs -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/user -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/r_data -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/r_valid -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/r_opc -add wave -noupdate -group streamer -group tcdm_inf /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/r_user +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/clk +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/req +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/gnt +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/lrdy +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/add +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/wen +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/data +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/be +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/boffs +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/user +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/r_data +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/r_valid +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/r_opc +add wave -noupdate -group streamer -group tcdm /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/tcdm/r_user +add wave -noupdate -group streamer -group x_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/x_stream_o/clk +add wave -noupdate -group streamer -group x_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/x_stream_o/valid +add wave -noupdate -group streamer -group x_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/x_stream_o/ready +add wave -noupdate -group streamer -group x_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/x_stream_o/data +add wave -noupdate -group streamer -group x_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/x_stream_o/strb +add wave -noupdate -group streamer -group w_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/w_stream_o/clk +add wave -noupdate -group streamer -group w_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/w_stream_o/valid +add wave -noupdate -group streamer -group w_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/w_stream_o/ready +add wave -noupdate -group streamer -group w_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/w_stream_o/data +add wave -noupdate -group streamer -group w_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/w_stream_o/strb +add wave -noupdate -group streamer -group y_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/y_stream_o/clk +add wave -noupdate -group streamer -group y_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/y_stream_o/valid +add wave -noupdate -group streamer -group y_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/y_stream_o/ready +add wave -noupdate -group streamer -group y_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/y_stream_o/data +add wave -noupdate -group streamer -group y_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/y_stream_o/strb +add wave -noupdate -group streamer -group z_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/z_stream_i/clk +add wave -noupdate -group streamer -group z_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/z_stream_i/valid +add wave -noupdate -group streamer -group z_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/z_stream_i/ready +add wave -noupdate -group streamer -group z_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/z_stream_i/data +add wave -noupdate -group streamer -group z_stream /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/z_stream_i/strb +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/clk_i} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/rst_ni} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/clear_i} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/flags_o} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/flags_incoming} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/flags_outgoing} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/incoming_fifo_not_full} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/tcdm_master_r_valid_d} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/tcdm_master_r_valid_q} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/tcdm_master_r_data_d} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/tcdm_master_r_data_q} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/stream_outgoing_pop_data} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/tcdm_master_add} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/tcdm_master_data} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/tcdm_master_user} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/tcdm_master_be} +add wave -noupdate -group streamer -group x_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_load_tcdm_fifo/tcdm_master_wen} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/clk_i} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/rst_ni} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/test_mode_i} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/clear_i} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/enable_i} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/ctrl_i} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/flags_o} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/cs} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/ns} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/addr_fifo_flags} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/done} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/address_gen_en} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/address_gen_clr} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/stream_valid_q} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/stream_data_q} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/addr_misaligned_q} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/addr_misaligned_valid} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/stream_data_misaligned} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/stream_data_aligned} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/stream_cnt_en} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/stream_cnt_clr} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/stream_cnt_d} +add wave -noupdate -group streamer -group x_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[0]/i_stream_source/stream_cnt_q} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/clk_i} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/rst_ni} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/clear_i} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/flags_o} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/flags_incoming} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/flags_outgoing} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/incoming_fifo_not_full} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/tcdm_master_r_valid_d} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/tcdm_master_r_valid_q} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/tcdm_master_r_data_d} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/tcdm_master_r_data_q} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/stream_outgoing_pop_data} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/tcdm_master_add} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/tcdm_master_data} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/tcdm_master_user} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/tcdm_master_be} +add wave -noupdate -group streamer -group w_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_load_tcdm_fifo/tcdm_master_wen} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/clk_i} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/rst_ni} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/test_mode_i} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/clear_i} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/enable_i} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/ctrl_i} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/flags_o} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/cs} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/ns} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/addr_fifo_flags} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/done} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/address_gen_en} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/address_gen_clr} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/stream_valid_q} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/stream_data_q} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/addr_misaligned_q} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/addr_misaligned_valid} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/stream_data_misaligned} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/stream_data_aligned} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/stream_cnt_en} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/stream_cnt_clr} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/stream_cnt_d} +add wave -noupdate -group streamer -group w_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[1]/i_stream_source/stream_cnt_q} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/clk_i} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/rst_ni} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/clear_i} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/flags_o} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/flags_incoming} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/flags_outgoing} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/incoming_fifo_not_full} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/tcdm_master_r_valid_d} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/tcdm_master_r_valid_q} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/tcdm_master_r_data_d} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/tcdm_master_r_data_q} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/stream_outgoing_pop_data} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/tcdm_master_add} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/tcdm_master_data} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/tcdm_master_user} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/tcdm_master_be} +add wave -noupdate -group streamer -group y_tcdm_fifo {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_load_tcdm_fifo/tcdm_master_wen} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/clk_i} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/rst_ni} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/test_mode_i} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/clear_i} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/enable_i} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/ctrl_i} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/flags_o} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/cs} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/ns} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/addr_fifo_flags} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/done} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/address_gen_en} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/address_gen_clr} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/stream_valid_q} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/stream_data_q} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/addr_misaligned_q} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/addr_misaligned_valid} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/stream_data_misaligned} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/stream_data_aligned} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/stream_cnt_en} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/stream_cnt_clr} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/stream_cnt_d} +add wave -noupdate -group streamer -group y_source {/redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/gen_tcdm2stream[2]/i_stream_source/stream_cnt_q} +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/clk_i +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/rst_ni +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/clear_i +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/flags_o +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/flags_incoming +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/flags_outgoing +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/incoming_fifo_not_full +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/tcdm_master_r_valid_d +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/tcdm_master_r_valid_q +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/tcdm_master_r_data_d +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/tcdm_master_r_data_q +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/stream_outgoing_pop_data +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/tcdm_master_add +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/tcdm_master_data +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/tcdm_master_user +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/tcdm_master_be +add wave -noupdate -group streamer -group z_tcdm_fifo /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_store_fifo/tcdm_master_wen +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/clk_i +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/rst_ni +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/test_mode_i +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/clear_i +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/enable_i +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/ctrl_i +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/flags_o +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/cs +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/ns +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/addr_fifo_flags +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/address_gen_en +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/address_gen_clr +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/done +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/tcdm_inflight +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/address_cnt_en +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/address_cnt_clr +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/address_cnt_d +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/address_cnt_q +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/stream_data_misaligned +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/stream_strb_misaligned +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/stream_data_aligned +add wave -noupdate -group streamer -group z_sink /redmule_tb/i_redmule_wrap/i_redmule_top/i_streamer/i_stream_sink/stream_strb_aligned add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/clk_i} add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/rst_ni} add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/x_input_i} @@ -2256,7 +2324,7 @@ add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_con add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_ctrl_q add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/slave_start TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {162000 ps} 0} +WaveRestoreCursors {{Cursor 1} {0 ps} 0} quietly wave cursor active 1 configure wave -namecolwidth 150 configure wave -valuecolwidth 100 @@ -2272,4 +2340,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {134733 ps} {193267 ps} +WaveRestoreZoom {0 ps} {1045800 ps} From 96f7373b37281ab2b80d3a3e82436a227a6e20fe Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Thu, 11 Jan 2024 13:38:24 +0100 Subject: [PATCH 2/2] Use FF-based register-file. --- Bender.lock | 2 +- Bender.yml | 2 +- rtl/redmule_ctrl.sv | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Bender.lock b/Bender.lock index 73639a2..baa2953 100644 --- a/Bender.lock +++ b/Bender.lock @@ -60,7 +60,7 @@ packages: - hwpe-stream - l2_tcdm_hybrid_interco hwpe-ctrl: - revision: b8b393575f40aea4dbd22cc7fc6077aaff2e3ed1 + revision: c35d5b0886ab549fb9144c3c14a4682112330e21 version: null source: Git: https://github.com/pulp-platform/hwpe-ctrl.git diff --git a/Bender.yml b/Bender.yml index 36c736d..e32da41 100644 --- a/Bender.yml +++ b/Bender.yml @@ -26,7 +26,7 @@ dependencies: cv32e40x : { git: "https://github.com/pulp-platform/cv32e40x.git" , rev: "redmule-v1.0" } ibex : { git: "https://github.com/pulp-platform/ibex.git" , rev: pulpissimo-v6.1.2 } hwpe-stream : { git: "https://github.com/pulp-platform/hwpe-stream.git" , version: 1.6 } - hwpe-ctrl : { git: "https://github.com/pulp-platform/hwpe-ctrl.git" , rev: b8b393575f40aea4dbd22cc7fc6077aaff2e3ed1 } # branch: yt/reqrsp + hwpe-ctrl : { git: "https://github.com/pulp-platform/hwpe-ctrl.git" , rev: c35d5b0886ab549fb9144c3c14a4682112330e21 } # branch: yt/reqrsp hci : { git: "https://github.com/pulp-platform/hci.git" , rev: 0c67be238169209e3c89f6dd577496db1cf9cc88 } # branch: yt/reqrsp fpnew : { git: "https://github.com/pulp-platform/cvfpu.git" , rev: "pulp-v0.1.3" } common_cells : { git: "https://github.com/pulp-platform/common_cells.git" , version: 1.21.0 } diff --git a/rtl/redmule_ctrl.sv b/rtl/redmule_ctrl.sv index 7faf5bc..d998f06 100644 --- a/rtl/redmule_ctrl.sv +++ b/rtl/redmule_ctrl.sv @@ -91,7 +91,7 @@ localparam int unsigned LEFT_PARAMS = LEFT_PARAMS .N_IO_REGS ( REDMULE_REGS ), .N_GENERIC_REGS ( 6 ), .ID_WIDTH ( ID_WIDTH ), - .DataWidth ( SysDataWidth ) + .DATA_WIDTH ( SysDataWidth ) ) i_slave ( .clk_i ( clk_i ), .rst_ni ( rst_ni ),