From cf62cb3f5a405cceb016a103719f57aa67c57109 Mon Sep 17 00:00:00 2001 From: Zhang Chi Date: Tue, 9 Jan 2024 16:27:39 +0100 Subject: [PATCH 1/4] [RTL] double the array size --- rtl/redmule_pkg.sv | 6 +++--- sw/archi_redmule.h | 6 +++--- tb/redmule_tb.sv | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/rtl/redmule_pkg.sv b/rtl/redmule_pkg.sv index f253512..09bcc43 100644 --- a/rtl/redmule_pkg.sv +++ b/rtl/redmule_pkg.sv @@ -28,7 +28,7 @@ import hwpe_stream_package::*; package redmule_pkg; - parameter int unsigned DATA_W = 288; // TCDM port dimension (in bits) + parameter int unsigned DATA_W = 544; // TCDM port dimension (in bits) parameter int unsigned MemDw = 32; parameter int unsigned NumByte = MemDw/8; parameter int unsigned ADDR_W = hci_package::DEFAULT_AW; @@ -37,9 +37,9 @@ package redmule_pkg; parameter int unsigned N_CONTEXT = 2; parameter fpnew_pkg::fp_format_e FPFORMAT = fpnew_pkg::FP16; parameter int unsigned BITW = fpnew_pkg::fp_width(FPFORMAT); - parameter int unsigned ARRAY_HEIGHT = 4; + parameter int unsigned ARRAY_HEIGHT = 8; parameter int unsigned PIPE_REGS = 3; - parameter int unsigned ARRAY_WIDTH = 12; /* Superior limit is ARRAY_HEIGHT*PIPE_REGS */ + parameter int unsigned ARRAY_WIDTH = 24; /* Superior limit is ARRAY_HEIGHT*PIPE_REGS */ parameter int unsigned TOT_DEPTH = DATAW/BITW; parameter int unsigned DEPTH = TOT_DEPTH/ARRAY_HEIGHT; parameter int unsigned STRB = DATA_W/8; diff --git a/sw/archi_redmule.h b/sw/archi_redmule.h index 2d20a37..99c2988 100644 --- a/sw/archi_redmule.h +++ b/sw/archi_redmule.h @@ -68,11 +68,11 @@ // RedMulE architecture #define ADDR_WIDTH 32 -#define DATA_WIDTH 256 +#define DATA_WIDTH 512 #define REDMULE_FMT 16 -#define ARRAY_HEIGHT 4 +#define ARRAY_HEIGHT 8 #define PIPE_REGS 3 -#define ARRAY_WIDTH 12 /* Superior limit is ARRAY_HEIGHT*PIPE_REGS */ +#define ARRAY_WIDTH 24 /* Superior limit is ARRAY_HEIGHT*PIPE_REGS */ // Base address #define REDMULE_BASE_ADD 0x00100000 diff --git a/tb/redmule_tb.sv b/tb/redmule_tb.sv index a9e3144..74e92b5 100644 --- a/tb/redmule_tb.sv +++ b/tb/redmule_tb.sv @@ -28,7 +28,7 @@ module redmule_tb; parameter int unsigned PROB_STALL = 0; parameter int unsigned NC = 1; parameter int unsigned ID = 10; - parameter int unsigned DW = 288; + parameter int unsigned DW = 544; parameter int unsigned MP = DW/32; parameter int unsigned MEMORY_SIZE = 192*1024; parameter int unsigned STACK_MEMORY_SIZE = 192*1024; From e6e2186ff6bb330b839be428c1413a5bca56c441 Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Thu, 11 Jan 2024 11:38:01 +0100 Subject: [PATCH 2/4] Make double-sized array work. --- rtl/redmule_ctrl.sv | 41 ++++++- rtl/redmule_scheduler.sv | 25 +++- rtl/redmule_z_buffer.sv | 4 +- wave.do | 242 ++++++++++++++++++++++++++++----------- 4 files changed, 231 insertions(+), 81 deletions(-) diff --git a/rtl/redmule_ctrl.sv b/rtl/redmule_ctrl.sv index d998f06..3e7633c 100644 --- a/rtl/redmule_ctrl.sv +++ b/rtl/redmule_ctrl.sv @@ -74,7 +74,7 @@ localparam int unsigned LEFT_PARAMS = LEFT_PARAMS logic [4:0] w_computed; logic [15:0] w_rows; logic [15:0] w_rows_iter, w_row_count_d, w_row_count_q; - logic [15:0] z_storings_d, z_storings_q, tot_stores; + logic [15:0] z_storings_d, z_storings_q, tot_stores, issued_store_d, issued_store_q; typedef enum logic [2:0] {REDMULE_IDLE, REDMULE_STARTING, REDMULE_COMPUTING, REDMULE_BUFFERING, REDMULE_STORING, REDMULE_FINISHED} redmule_ctrl_state; redmule_ctrl_state current, next; @@ -191,6 +191,18 @@ localparam int unsigned LEFT_PARAMS = LEFT_PARAMS end assign accumulate_o = accumulate_q & !accumulate_ctrl_q; + logic finish_d, finish_q; + always_ff @(posedge clk_i or negedge rst_ni) begin : finish_sampler + if(~rst_ni) begin + finish_q <= 1'b0; + end else begin + if (clear) + finish_q <= 1'b0; + else + finish_q <= finish_d; + end + end + always_ff @(posedge clk_i or negedge rst_ni) begin : last_w_row_reg if(~rst_ni) begin last_w_row <= 1'b0; @@ -202,6 +214,17 @@ localparam int unsigned LEFT_PARAMS = LEFT_PARAMS end end + always_ff @(posedge clk_i or negedge rst_ni) begin : issued_store + if(~rst_ni) begin + issued_store_q <= '0; + end else begin + if (clear) + issued_store_q <= '0; + else + issued_store_q <= issued_store_d; + end + end + // This register counts the number of times we exit from the REDMULE_STORING // state and go to the REDMULE_COMPUTING one. Every time this happens, it // means that a piece of computation fas done, and we can track the number @@ -258,6 +281,8 @@ localparam int unsigned LEFT_PARAMS = LEFT_PARAMS last_w_row_rst = 1'b0; w_row_count_d = w_row_count_q; z_storings_d = z_storings_q; + issued_store_d = issued_store_q; + finish_d = finish_q; accumulate_en = 1'b0; accumulate_rst = 1'b0; storing_rst = 1'b0; @@ -276,6 +301,7 @@ localparam int unsigned LEFT_PARAMS = LEFT_PARAMS z_buffer_clk_en = 1'b1; if ( (slave_start & tiler_valid) || test_mode_i) begin tiler_setback = 1'b1; + finish_d = 1'b0; next = REDMULE_STARTING; end else @@ -307,8 +333,8 @@ localparam int unsigned LEFT_PARAMS = LEFT_PARAMS case (last_w_row) 1'b0: begin - if (w_computed == Height - 1) begin - if (!accumulate_q) + if (w_computed == NumPipeRegs) begin + if (!accumulate_q && !finish_q) accumulate_en = 1'b1; if (count_w_q) w_computed_rst = 1'b1; @@ -316,11 +342,14 @@ localparam int unsigned LEFT_PARAMS = LEFT_PARAMS end 1'b1: begin - if (w_computed == Height - 2 && reg_enable_i) begin + if (w_computed == NumPipeRegs - 1 && reg_enable_i) begin w_row_count_d = 16'd1; + issued_store_d = issued_store_q + 'd1; next = REDMULE_BUFFERING; - if (accumulate_q) + if (accumulate_q) begin accumulate_rst = 1'b1; + finish_d = (issued_store_q == tot_stores - 1) ? 1'b1 : 1'b0; + end if (count_w_q) w_computed_rst = 1'b1; end else @@ -337,7 +366,7 @@ localparam int unsigned LEFT_PARAMS = LEFT_PARAMS w_row_count_d = w_row_count_q + 1; z_fill_o = reg_enable_i; if (flgs_z_buffer_i.full) begin - accumulate_en = 1'b1; + accumulate_en = finish_q ? 1'b0 : 1'b1; next = REDMULE_STORING; end else diff --git a/rtl/redmule_scheduler.sv b/rtl/redmule_scheduler.sv index 73e3fdc..25ada86 100644 --- a/rtl/redmule_scheduler.sv +++ b/rtl/redmule_scheduler.sv @@ -717,6 +717,18 @@ always_ff @(posedge clk_i or negedge rst_ni) begin : tot_stores_counter end end +logic [15:0] consumed_y_d, consumed_y_q; +always_ff @(posedge clk_i or negedge rst_ni) begin : y_consumed_counter + if(~rst_ni) begin + consumed_y_q <= '0; + end else begin + if (clear_i || clear_regs) + consumed_y_q <= '0; + else + consumed_y_q <= consumed_y_d; + end +end + always_comb begin if (store_rows_lftovr_q == '0 || tot_z_stored_q < store_rows_lftovr_q) begin if (store_cols_lftovr_q) begin @@ -989,6 +1001,7 @@ transfer_count_d = transfer_count_q; gate_count_d = gate_count_q; store_count_d = store_count_q; tot_store_d = tot_store_q; +consumed_y_d = consumed_y_q; y_rows_iter_d = y_rows_iter_q; y_cols_iter_d = y_cols_iter_q; @@ -1116,6 +1129,7 @@ clear_regs = 1'b0; if (reg_file_i.hwpe_params[OP_SELECTION][0]) begin y_push_rst = (flgs_z_buffer_i.y_pushed) ? 1'b1 : 1'b0; consume_y_rst = (flgs_z_buffer_i.y_pushed && consume_y_q) ? 1'b1 : 1'b0; + consumed_y_d = consume_y_rst ? consumed_y_q + 'd1 : consumed_y_q; if (!accumulate_i && consume_y_q && !skip_w_q) begin flgs_scheduler_o.y_push_enable = 1'b1; z_buffer_clk_en = 1'b1; @@ -1183,7 +1197,8 @@ clear_regs = 1'b0; if (w_valid_i == 1'b1 && w_strb_i == '1) begin w_loaded = 1'b1; count_w_cycles_en = (!count_w_cycles_q & x_preloaded_q) ? 1'b1 : 1'b0; - if (reg_file_i.hwpe_params[OP_SELECTION][0]) begin + if (reg_file_i.hwpe_params[OP_SELECTION][0] && + consumed_y_q < reg_file_i.hwpe_params[LEFT_PARAMS][31:16]) begin y_push_en = (!y_push_q) ? 1'b1 : 1'b0; consume_y_en = (!consume_y_q) ? 1'b1 : 1'b0; end @@ -1210,9 +1225,9 @@ clear_regs = 1'b0; if ((reg_file_i.hwpe_params[LEFTOVERS][7:0] != '0) && (y_cols_lftovr_q == '0)) y_cols_lftovr_en = 1'b1; end - end else if (d_shift_d == H && !flgs_streamer_i.x_stream_source_flags.ready_start) begin + end else if ((d_shift_d == NumPipeRegs + 'd1) && !flgs_streamer_i.x_stream_source_flags.ready_start) begin load_x_en = 1'b1; - d_shift_d = '0; + d_shift_d = '0; next = LOAD_X; if (x_cols_iter_q == reg_file_i.hwpe_params[X_ITERS][15:0]) begin if ( (reg_file_i.hwpe_params[LEFTOVERS][23:16] != '0) && (x_cols_lftovr_q == '0) ) @@ -1245,7 +1260,7 @@ clear_regs = 1'b0; x_buffer_clk_en = 1'b1; if (reg_file_i.hwpe_params[OP_SELECTION][0]) begin if (!accumulate_i & !skip_w_q) begin - flgs_scheduler_o.y_push_enable = 1'b1; + flgs_scheduler_o.y_push_enable = consume_y_q ? 1'b1 : 1'b0; z_buffer_clk_en = 1'b1; end consume_y_rst = (flgs_z_buffer_i.y_pushed && consume_y_q) ? 1'b1 : 1'b0; @@ -1340,7 +1355,7 @@ clear_regs = 1'b0; gate_count_d = '0; if (!accumulate_i && reg_file_i.hwpe_params[OP_SELECTION][0] && !skip_w_q) begin - flgs_scheduler_o.y_push_enable = 1'b1; + flgs_scheduler_o.y_push_enable = consume_y_q ? 1'b1 : 1'b0; z_buffer_clk_en = 1'b1; end diff --git a/rtl/redmule_z_buffer.sv b/rtl/redmule_z_buffer.sv index 7653d79..b25714b 100644 --- a/rtl/redmule_z_buffer.sv +++ b/rtl/redmule_z_buffer.sv @@ -66,11 +66,11 @@ always_ff @(posedge buffer_clock or negedge rst_ni) begin : z_buffer z_buffer_q <= '0; else if (ctrl_i.fill || ctrl_i.y_push_enable) begin if (reg_enable_i) begin - for (int d = 0; d < D; d++) begin + for (int d = 0; d < D; d++) begin for (int w = 0; w < W; w++) z_buffer_q[d][w] <= (d == 0) ? z_buffer_i[w] : z_buffer_q[d-1][w]; end - end else + end else z_buffer_q <= z_buffer_q; end else if (ctrl_i.store && ctrl_i.ready) begin for (int w = 0; w < W; w++) begin diff --git a/wave.do b/wave.do index 8353e98..64d9ee9 100644 --- a/wave.do +++ b/wave.do @@ -394,10 +394,10 @@ add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_ add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/rst_w_load add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/rst_d_count add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/buffer_clock -add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/fill_shift -add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/d_index +add wave -noupdate -group z_buffer -radix unsigned -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/fill_shift +add wave -noupdate -group z_buffer -radix unsigned -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/d_index add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/depth -add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/store_shift +add wave -noupdate -group z_buffer -radix unsigned -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/store_shift add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/w_index add wave -noupdate -group z_buffer /redmule_tb/i_redmule_wrap/i_redmule_top/i_z_buffer/z_buffer_q add wave -noupdate -group y_buffer_fifo -group fifo_interface /redmule_tb/i_redmule_wrap/i_redmule_top/y_buffer_fifo/clk @@ -664,7 +664,6 @@ add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_0 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[0]/i_computing_element/noncomp_y_d} @@ -781,7 +780,6 @@ add wave -noupdate -group engine -group row_0 -group CE_1 {/redmule_tb/i_redmule add wave -noupdate -group engine -group row_0 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[1]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_0 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[1]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_0 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[1]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_0 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[1]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_0 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[1]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_0 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[1]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_0 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[1]/i_computing_element/noncomp_y_d} @@ -898,7 +896,6 @@ add wave -noupdate -group engine -group row_0 -group CE_2 {/redmule_tb/i_redmule add wave -noupdate -group engine -group row_0 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[2]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_0 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[2]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_0 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[2]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_0 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[2]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_0 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[2]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_0 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[2]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_0 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[2]/i_computing_element/noncomp_y_d} @@ -1015,7 +1012,6 @@ add wave -noupdate -group engine -group row_0 -group CE_3 {/redmule_tb/i_redmule add wave -noupdate -group engine -group row_0 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[3]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_0 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[3]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_0 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[3]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_0 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[3]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_0 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[3]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_0 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[3]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_0 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[3]/i_computing_element/noncomp_y_d} @@ -1132,7 +1128,6 @@ add wave -noupdate -group engine -group row_1 -group CE_0 {/redmule_tb/i_redmule add wave -noupdate -group engine -group row_1 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[0]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_1 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[0]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_1 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[0]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_1 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[0]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_1 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[0]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_1 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[0]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_1 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[0]/i_computing_element/noncomp_y_d} @@ -1249,7 +1244,6 @@ add wave -noupdate -group engine -group row_1 -group CE_1 {/redmule_tb/i_redmule add wave -noupdate -group engine -group row_1 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[1]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_1 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[1]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_1 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[1]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_1 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[1]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_1 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[1]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_1 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[1]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_1 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[1]/i_computing_element/noncomp_y_d} @@ -1366,7 +1360,6 @@ add wave -noupdate -group engine -group row_1 -group CE_2 {/redmule_tb/i_redmule add wave -noupdate -group engine -group row_1 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[2]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_1 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[2]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_1 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[2]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_1 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[2]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_1 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[2]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_1 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[2]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_1 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[2]/i_computing_element/noncomp_y_d} @@ -1483,7 +1476,6 @@ add wave -noupdate -group engine -group row_1 -group CE_3 {/redmule_tb/i_redmule add wave -noupdate -group engine -group row_1 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[3]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_1 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[3]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_1 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[3]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_1 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[3]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_1 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[3]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_1 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[3]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_1 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[1]/i_row/computing_element[3]/i_computing_element/noncomp_y_d} @@ -1600,7 +1592,6 @@ add wave -noupdate -group engine -group row_11 -group CE_0 {/redmule_tb/i_redmul add wave -noupdate -group engine -group row_11 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[0]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_11 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[0]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_11 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[0]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_11 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[0]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_11 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[0]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_11 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[0]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_11 -group CE_0 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[0]/i_computing_element/noncomp_y_d} @@ -1717,7 +1708,6 @@ add wave -noupdate -group engine -group row_11 -group CE_1 {/redmule_tb/i_redmul add wave -noupdate -group engine -group row_11 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[1]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_11 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[1]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_11 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[1]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_11 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[1]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_11 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[1]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_11 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[1]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_11 -group CE_1 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[1]/i_computing_element/noncomp_y_d} @@ -1834,7 +1824,6 @@ add wave -noupdate -group engine -group row_11 -group CE_2 {/redmule_tb/i_redmul add wave -noupdate -group engine -group row_11 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[2]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_11 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[2]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_11 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[2]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_11 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[2]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_11 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[2]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_11 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[2]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_11 -group CE_2 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[2]/i_computing_element/noncomp_y_d} @@ -1951,7 +1940,6 @@ add wave -noupdate -group engine -group row_11 -group CE_3 {/redmule_tb/i_redmul add wave -noupdate -group engine -group row_11 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[3]/i_computing_element/out_valid_o} add wave -noupdate -group engine -group row_11 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[3]/i_computing_element/out_ready_i} add wave -noupdate -group engine -group row_11 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[3]/i_computing_element/busy_o} -add wave -noupdate -group engine -group row_11 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[3]/i_computing_element/y_bias} add wave -noupdate -group engine -group row_11 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[3]/i_computing_element/fma_y} add wave -noupdate -group engine -group row_11 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[3]/i_computing_element/noncomp_y} add wave -noupdate -group engine -group row_11 -group CE_3 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[11]/i_row/computing_element[3]/i_computing_element/noncomp_y_d} @@ -2204,6 +2192,8 @@ add wave -noupdate -group scheduler /redmule_tb/i_redmule_wrap/i_redmule_top/i_s add wave -noupdate -group scheduler /redmule_tb/i_redmule_wrap/i_redmule_top/i_scheduler/store_count_q add wave -noupdate -group scheduler /redmule_tb/i_redmule_wrap/i_redmule_top/i_scheduler/tot_store_d add wave -noupdate -group scheduler /redmule_tb/i_redmule_wrap/i_redmule_top/i_scheduler/tot_store_q +add wave -noupdate -group scheduler /redmule_tb/i_redmule_wrap/i_redmule_top/i_scheduler/consumed_y_d +add wave -noupdate -group scheduler /redmule_tb/i_redmule_wrap/i_redmule_top/i_scheduler/consumed_y_q add wave -noupdate -group scheduler /redmule_tb/i_redmule_wrap/i_redmule_top/i_scheduler/count_w_q add wave -noupdate -group scheduler /redmule_tb/i_redmule_wrap/i_redmule_top/i_scheduler/shift_count_q add wave -noupdate -group scheduler /redmule_tb/i_redmule_wrap/i_redmule_top/i_scheduler/counter_index @@ -2272,61 +2262,177 @@ add wave -noupdate -group control -group tiler /redmule_tb/i_redmule_wrap/i_redm add wave -noupdate -group control -group tiler /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/i_cfg_tiler/x_rows_by_w_cols_by_w_rows_iter add wave -noupdate -group control -group tiler /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/i_cfg_tiler/x_rows_by_w_cols_by_w_rows_iter_valid add wave -noupdate -group control -group tiler /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/i_cfg_tiler/x_rows_by_w_cols_by_w_rows_iter_ready -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/clk_i -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/rst_ni -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/test_mode_i -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/busy_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/clear_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/evt_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_fill_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_shift_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_buffer_clk_en_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reg_file_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reg_enable_i -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/start_cfg_i -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/cfg_complete_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/flgs_z_buffer_i -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/flgs_engine_i -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_loaded_i -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/flush_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/cntrl_scheduler_o -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/clear -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_q -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_computed_en -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_computed_rst -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/count_w_q -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_en -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_rst -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/storing_rst -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/last_w_row -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/last_w_row_en -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/last_w_row_rst -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_buffer_clk_en -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/enable_depth_count -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reset_depth_count -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/tiler_setback -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/tiler_valid -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_computed -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_rows -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_rows_iter -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_row_count_d -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_row_count_q -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_storings_d -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_storings_q -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/tot_stores -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/current -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/next -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reg_file_d -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reg_file_q -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/cntrl_slave -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/flgs_slave -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_ctrl_q -add wave -noupdate -group control /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/slave_start +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/clk_i +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/rst_ni +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/test_mode_i +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/busy_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/clear_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/evt_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_fill_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_shift_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_buffer_clk_en_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reg_file_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reg_enable_i +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/start_cfg_i +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/cfg_complete_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/flgs_z_buffer_i +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/flgs_engine_i +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_loaded_i +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/flush_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/cntrl_scheduler_o +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/clear +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_q +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_computed_en +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_computed_rst +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/count_w_q +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_en +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_rst +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/storing_rst +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/last_w_row +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/last_w_row_en +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/last_w_row_rst +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_buffer_clk_en +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/enable_depth_count +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reset_depth_count +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/tiler_setback +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/tiler_valid +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_computed +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_rows +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_rows_iter +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_row_count_d +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/w_row_count_q +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_storings_d +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/z_storings_q +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/tot_stores +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/current +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/next +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reg_file_d +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/reg_file_q +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/cntrl_slave +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/flgs_slave +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_ctrl_q +add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/slave_start +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/clk_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/rst_ni} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/x_input_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/w_input_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/y_bias_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/fma_is_boxed_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_is_boxed_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_rnd_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_rnd_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op1_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op2_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op_mod_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/tag_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/aux_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/in_valid_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/in_ready_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/reg_enable_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/flush_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/z_output_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/status_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/extension_bit_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/class_mask_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/is_class_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/tag_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/aux_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/out_valid_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/out_ready_i} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/busy_o} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/fma_y} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_y} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_y_d} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op1_int} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_clk_en} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_input_pipe_clk} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_y_q} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/fma_is_boxed_int} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_is_boxed_int} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_rnd_int} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_rnd_int} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op2_int} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_op_mod} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_op_mod} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_input_tag} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_input_tag} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_input_aux} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_input_aux} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_in_valid} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_in_valid} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_in_ready} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_in_ready} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_in_ready} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_reg_enable} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_reg_enable} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_flush} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_flush} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_status} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_status} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_status} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_extension_bit} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_extension_bit} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_extension_bit} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_class_mask} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_is_class} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_output_tag} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_output_tag} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_output_tag} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_output_aux} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_output_aux} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_output_aux} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_out_valid} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_out_valid} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_out_valid} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_out_ready} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_out_ready} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_busy} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_busy} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_busy} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/x_input} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/w_input} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_res} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_res} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_res} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_clk} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_clk_en} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_clk} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_clk_en} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_operands} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_operands} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_op_mod} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_input_tag} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_input_aux} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_in_valid} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_in_ready} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_in_ready} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_reg_enable} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_flush} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_status} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_status} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_extension_bit} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_extension_bit} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_class_mask} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_class_mask} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_is_class} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_is_class} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_output_tag} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_output_tag} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_output_aux} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_output_aux} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_out_valid} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_out_valid} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_out_ready} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_busy} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_busy} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_operands} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_res} +add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_res} TreeUpdate [SetDefaultTree] WaveRestoreCursors {{Cursor 1} {0 ps} 0} quietly wave cursor active 1 -configure wave -namecolwidth 150 +configure wave -namecolwidth 209 configure wave -valuecolwidth 100 configure wave -justifyvalue left configure wave -signalnamewidth 1 @@ -2340,4 +2446,4 @@ configure wave -griddelta 40 configure wave -timeline 0 configure wave -timelineunits ns update -WaveRestoreZoom {0 ps} {1045800 ps} +WaveRestoreZoom {0 ps} {129865050 ps} From 7fb158adc7a80cd99b3fd72b60e78a4a74aa1f5a Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Thu, 11 Jan 2024 11:57:37 +0100 Subject: [PATCH 3/4] Parametrize array width and properly propagate streamer bandwidth parameter to testbench. --- rtl/redmule_pkg.sv | 3 ++- tb/redmule_complex_tb.sv | 3 ++- tb/redmule_tb.sv | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/rtl/redmule_pkg.sv b/rtl/redmule_pkg.sv index 09bcc43..8e7eb08 100644 --- a/rtl/redmule_pkg.sv +++ b/rtl/redmule_pkg.sv @@ -18,6 +18,7 @@ * * RedMulE Package */ + `include "hci/typedef.svh" `include "hci/assign.svh" `include "hwpe-ctrl/typedef.svh" @@ -39,7 +40,7 @@ package redmule_pkg; parameter int unsigned BITW = fpnew_pkg::fp_width(FPFORMAT); parameter int unsigned ARRAY_HEIGHT = 8; parameter int unsigned PIPE_REGS = 3; - parameter int unsigned ARRAY_WIDTH = 24; /* Superior limit is ARRAY_HEIGHT*PIPE_REGS */ + parameter int unsigned ARRAY_WIDTH = ARRAY_HEIGHT*PIPE_REGS; // Superior limit, smaller values are allowed. parameter int unsigned TOT_DEPTH = DATAW/BITW; parameter int unsigned DEPTH = TOT_DEPTH/ARRAY_HEIGHT; parameter int unsigned STRB = DATA_W/8; diff --git a/tb/redmule_complex_tb.sv b/tb/redmule_complex_tb.sv index bfdf49f..a6c3c98 100644 --- a/tb/redmule_complex_tb.sv +++ b/tb/redmule_complex_tb.sv @@ -22,12 +22,13 @@ timeunit 1ps; timeprecision 1ps; module redmule_complex_tb; +import redmule_pkg::*; // parameters parameter int unsigned PROB_STALL = 0; parameter int unsigned NC = 1; parameter int unsigned ID = 10; - parameter int unsigned DW = 288; + parameter int unsigned DW = redmule_pkg::DATA_W; parameter int unsigned MP = DW/32; parameter int unsigned MEMORY_SIZE = 192*1024; parameter int unsigned STACK_MEMORY_SIZE = 192*1024; diff --git a/tb/redmule_tb.sv b/tb/redmule_tb.sv index 74e92b5..3c09325 100644 --- a/tb/redmule_tb.sv +++ b/tb/redmule_tb.sv @@ -23,12 +23,13 @@ timeunit 1ps; timeprecision 1ps; module redmule_tb; +import redmule_pkg::*; // parameters parameter int unsigned PROB_STALL = 0; parameter int unsigned NC = 1; parameter int unsigned ID = 10; - parameter int unsigned DW = 544; + parameter int unsigned DW = redmule_pkg::DATA_W; parameter int unsigned MP = DW/32; parameter int unsigned MEMORY_SIZE = 192*1024; parameter int unsigned STACK_MEMORY_SIZE = 192*1024; From 0f15ce975868c04012238beffc16e940170e8d61 Mon Sep 17 00:00:00 2001 From: Yvan Tortorella Date: Thu, 11 Jan 2024 12:00:02 +0100 Subject: [PATCH 4/4] Remove unneeded items from waveform file. --- wave.do | 116 -------------------------------------------------------- 1 file changed, 116 deletions(-) diff --git a/wave.do b/wave.do index 64d9ee9..2897de7 100644 --- a/wave.do +++ b/wave.do @@ -2313,122 +2313,6 @@ add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_t add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/flgs_slave add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/accumulate_ctrl_q add wave -noupdate -group control -radix hexadecimal -radixshowbase 1 /redmule_tb/i_redmule_wrap/i_redmule_top/i_control/slave_start -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/clk_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/rst_ni} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/x_input_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/w_input_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/y_bias_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/fma_is_boxed_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_is_boxed_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_rnd_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_rnd_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op1_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op2_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op_mod_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/tag_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/aux_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/in_valid_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/in_ready_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/reg_enable_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/flush_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/z_output_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/status_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/extension_bit_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/class_mask_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/is_class_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/tag_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/aux_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/out_valid_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/out_ready_i} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/busy_o} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/fma_y} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_y} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_y_d} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op1_int} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_clk_en} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_input_pipe_clk} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_y_q} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/fma_is_boxed_int} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/noncomp_is_boxed_int} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_rnd_int} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_rnd_int} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/op2_int} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_op_mod} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_op_mod} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_input_tag} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_input_tag} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_input_aux} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_input_aux} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_in_valid} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_in_valid} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_in_ready} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_in_ready} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_in_ready} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_reg_enable} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_reg_enable} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_flush} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_flush} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_status} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_status} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_status} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_extension_bit} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_extension_bit} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_extension_bit} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_class_mask} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_is_class} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_output_tag} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_output_tag} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_output_tag} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_output_aux} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_output_aux} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_output_aux} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_out_valid} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_out_valid} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_out_valid} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_out_ready} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_out_ready} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_busy} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_busy} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_busy} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/x_input} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/w_input} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_res} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_res} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_res} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_clk} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_clk_en} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_clk} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_clk_en} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_fma_operands} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage1_noncomp_operands} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_op_mod} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_input_tag} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_input_aux} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_in_valid} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_in_ready} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_in_ready} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_reg_enable} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_flush} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_status} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_status} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_extension_bit} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_extension_bit} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_class_mask} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_class_mask} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_is_class} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_is_class} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_output_tag} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_output_tag} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_output_aux} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_output_aux} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_out_valid} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_out_valid} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_out_ready} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_busy} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_busy} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_operands} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_res} -add wave -noupdate -group CE7 {/redmule_tb/i_redmule_wrap/i_redmule_top/i_redmule_engine/genblk1[0]/i_row/computing_element[7]/i_computing_element/stage2_noncomp_res} TreeUpdate [SetDefaultTree] WaveRestoreCursors {{Cursor 1} {0 ps} 0} quietly wave cursor active 1