Possible protocol violation

[mp-17]

Hello folks,

We have spotted a timing loop when using the reg_to_tlul.sv module.

It seems that we have a ready -> valid dependency here:

register_interface/src/reg_to_tlul.sv

Line 31 in 50270f7

assign tl_o.a_valid = reg_req_i.valid & tl_i.a_ready;

From a super quick look, I think we can just drop the & tl_i.a_ready masking.

assign tl_o.a_valid    = reg_req_i.valid;

Thank you, and let us know! ;-)
Matteo

[paulsc96]

Finders, keepers :) I suggest you open a PR for this so you are credited with fixing it.