diff --git a/.cargo/config.toml b/.cargo/config.toml
index 2dbabf9..f1b92a1 100644
--- a/.cargo/config.toml
+++ b/.cargo/config.toml
@@ -1,5 +1,9 @@
 [target.'cfg(all(target_arch = "riscv32", target_os = "none"))']
+runner = "qemu-system-riscv32 -machine sifive_e,revb=true -nographic -semihosting-config enable=on,target=native -kernel" # Uncomment for QEMU
+# runner = "riscv64-unknown-elf-gdb -q -x hifive1-examples/gdb_init" # Uncomment for hardware (no semihosting)
+# runner = "riscv64-unknown-elf-gdb -q -x hifive1-examples/gdb_init_sh" # Uncomment for hardware (semihosting)
 rustflags = [
+    # "-C", "link-arg=-Thifive1-link.x",
     "--cfg", "portable_atomic_target_feature=\"zaamo\"",
 ]
 
diff --git a/.github/workflows/clippy.yaml b/.github/workflows/clippy.yaml
index 03996f4..2427b72 100644
--- a/.github/workflows/clippy.yaml
+++ b/.github/workflows/clippy.yaml
@@ -31,7 +31,7 @@ jobs:
     - name: Run clippy (direct mode)
       run: cargo clippy --features board-${{ matrix.board }} -- $CLIPPY_PARAMS
     - name: Run clippy (vectored mode)
-      run: cargo clippy --features virq,board-${{ matrix.board }} -- $CLIPPY_PARAMS
+      run: cargo clippy --features v-trap,board-${{ matrix.board }} -- $CLIPPY_PARAMS
   
    # Job to check that all the lint checks succeeded
   clippy-check:
diff --git a/.github/workflows/e310x-hal.yaml b/.github/workflows/e310x-hal.yaml
index 0ffea09..ea4af6b 100644
--- a/.github/workflows/e310x-hal.yaml
+++ b/.github/workflows/e310x-hal.yaml
@@ -11,8 +11,8 @@ jobs:
   build-riscv:
     strategy:
       matrix:
-        # All generated code should be running on stable now, MRSV is 1.72.0
-        toolchain: [ stable, nightly, 1.72.0 ]
+        # All generated code should be running on stable now, MRSV is 1.76.0
+        toolchain: [ stable, nightly, 1.76.0 ]
         include:
           # Nightly is only for reference and allowed to fail
           - toolchain: nightly
diff --git a/.github/workflows/e310x.yaml b/.github/workflows/e310x.yaml
index 8247a9f..f1336e7 100644
--- a/.github/workflows/e310x.yaml
+++ b/.github/workflows/e310x.yaml
@@ -11,8 +11,8 @@ jobs:
   build-riscv:
     strategy:
       matrix:
-        # All generated code should be running on stable now, MRSV is 1.72.0
-        toolchain: [ stable, nightly, 1.72.0 ]
+        # All generated code should be running on stable now, MRSV is 1.76.0
+        toolchain: [ stable, nightly, 1.76.0 ]
         include:
           # Nightly is only for reference and allowed to fail
           - toolchain: nightly
diff --git a/.github/workflows/hifive1.yaml b/.github/workflows/hifive1.yaml
index 0ff7f13..e644f21 100644
--- a/.github/workflows/hifive1.yaml
+++ b/.github/workflows/hifive1.yaml
@@ -11,8 +11,8 @@ jobs:
   build-riscv:
     strategy:
       matrix:
-        # All generated code should be running on stable now, MRSV is 1.72.0
-        toolchain: [nightly, stable, 1.72.0]
+        # All generated code should be running on stable now, MRSV is 1.76.0
+        toolchain: [nightly, stable, 1.76.0]
         board: [hifive1, hifive1-revb, redv, lofive, lofive-r1]
         include:
           # Nightly is only for reference and allowed to fail
@@ -29,7 +29,7 @@ jobs:
       - name: Build (direct)
         run: cargo build --package hifive1 --features board-${{ matrix.board }}
       - name: Build (vectored)
-        run: cargo build --package hifive1 --features board-${{ matrix.board }},virq
+        run: cargo build --package hifive1 --features board-${{ matrix.board }},v-trap
   
   # On MacOS and Ubuntu, we at least make sure that the crate builds and links.
   # On Windows, linking fails when the rt feature is enabled.
@@ -48,5 +48,5 @@ jobs:
       - name: Build (direct)
         run: cargo test --package hifive1 --features board-${{ matrix.board }}
       - name: Build (vectored)
-        run: cargo test --package hifive1 --features board-${{ matrix.board }},virq
+        run: cargo test --package hifive1 --features board-${{ matrix.board }},v-trap
   
\ No newline at end of file
diff --git a/e310x-hal/CHANGELOG.md b/e310x-hal/CHANGELOG.md
index dd61301..082b925 100644
--- a/e310x-hal/CHANGELOG.md
+++ b/e310x-hal/CHANGELOG.md
@@ -8,11 +8,16 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 ## [Unreleased]
 
 ### Changed
+- Fix `StatefulOutputPin::is_set_high`. It now reads from `output_val`
+- UART traits are implemented now from `embedded-hal-nb` 1.0.0
+- Update `embedded-hal` to 1.0.0
+- Update `riscv` to 0.12.1
+- Remove `virq` feature. Now interrupts are handled by `e310x`
 - Apply clippy changes
 - Use `portable-atomic` with `zaamo` feature to use native `amo*` operations.
 - Official target is now `riscv32imc-unknown-none-elf`, as it does not fully support the A extension.
 - Update `e310x` dependency and adapt code
-- Bump MSRV to 1.72.0 to ensure a correct behavior of portable-atomic
+- Bump MSRV to 1.76.0 to ensure a correct behavior of portable-atomic
 
 ## [v0.10.0] - 2023-03-28
 
diff --git a/e310x-hal/Cargo.toml b/e310x-hal/Cargo.toml
index 57eaf03..3d0f49e 100644
--- a/e310x-hal/Cargo.toml
+++ b/e310x-hal/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "e310x-hal"
-version = "0.11.0"
+version = "0.12.0"
 authors = ["David Craven <david@craven.ch>"]
 repository = "https://github.com/riscv-rust/e310x"
 categories = ["embedded", "hardware-support", "no-std"]
@@ -8,18 +8,19 @@ description = "HAL for the E310x family of microcontrollers."
 keywords = ["riscv", "e310", "hal"]
 license = "ISC"
 edition = "2021"
-rust-version = "1.72"
+rust-version = "1.76"
 
 [dependencies]
-embedded-hal = { version = "0.2.6", features = ["unproven"] }
+embedded-hal = { version = "1.0.0" }
+embedded-hal-nb = { version = "1.0.0" }
 nb = "1.0.0"
-riscv = { version = "0.10.1", features = ["critical-section-single-hart"] }
-e310x = { path = "../e310x", version = "0.11.0", features = ["rt", "critical-section"] }
+riscv = { version = "0.12.1", features = ["critical-section-single-hart"] }
+e310x = { path = "../e310x", version = "0.12.0", features = ["rt", "critical-section"] }
 portable-atomic = { version = "1.9", default-features = false}
 
 [features]
 g002 = ["e310x/g002"]
-virq = []
+v-trap = ["e310x/v-trap"]
 
 [package.metadata.docs.rs]
-features = ["g002", "virq"]
+features = ["g002"]
diff --git a/e310x-hal/src/clock.rs b/e310x-hal/src/clock.rs
index 79fae5e..5399098 100644
--- a/e310x-hal/src/clock.rs
+++ b/e310x-hal/src/clock.rs
@@ -1,7 +1,6 @@
 //! Clock configuration
-use crate::core::clint::MTIME;
 use crate::time::Hertz;
-use e310x::{Aonclk as AONCLK, Prci as PRCI};
+use e310x::{Aonclk as AONCLK, Prci as PRCI, CLINT};
 use riscv::interrupt;
 use riscv::register::mcycle;
 
@@ -229,7 +228,7 @@ impl CoreClk {
         };
 
         // Calculate the desired vco frequency
-        let target_vco_freq = pllout_freq * q;
+        let target_vco_freq: u32 = pllout_freq * q;
         assert!((VCO_MIN..=VCO_MAX).contains(&target_vco_freq));
 
         // Calculate PLL F ratio
@@ -291,9 +290,9 @@ impl CoreClk {
         // Need to wait 100 us
         // RTC is running at 32kHz.
         // So wait 4 ticks of RTC.
-        let mtime = MTIME;
-        let time = mtime.mtime() + 4;
-        while mtime.mtime() < time {}
+        let mtime = CLINT::mtimer().mtime;
+        let time = mtime.read() + 4;
+        while mtime.read() < time {}
         // Now it is safe to check for PLL Lock
         while !prci.pllcfg().read().lock().bit_is_set() {}
 
@@ -385,19 +384,19 @@ impl Clocks {
 
     /// Measure the coreclk frequency by counting the number of aonclk ticks.
     fn _measure_coreclk(&self, min_ticks: u64) -> Hertz {
-        let mtime = MTIME;
+        let mtime = CLINT::mtimer().mtime;
         interrupt::free(|| {
             // Don't start measuring until we see an mtime tick
-            while mtime.mtime() == mtime.mtime() {}
+            while mtime.read() == mtime.read() {}
 
             let start_cycle = mcycle::read64();
-            let start_time = mtime.mtime();
+            let start_time = mtime.read();
 
             // Wait for min_ticks to pass
-            while start_time + min_ticks > mtime.mtime() {}
+            while start_time + min_ticks > mtime.read() {}
 
             let end_cycle = mcycle::read64();
-            let end_time = mtime.mtime();
+            let end_time = mtime.read();
 
             let delta_cycle: u64 = end_cycle - start_cycle;
             let delta_time: u64 = end_time - start_time;
diff --git a/e310x-hal/src/core/clint.rs b/e310x-hal/src/core/clint.rs
deleted file mode 100644
index 82912e6..0000000
--- a/e310x-hal/src/core/clint.rs
+++ /dev/null
@@ -1,117 +0,0 @@
-//! Core-Local Interruptor
-
-use e310x::Clint as CLINT;
-
-macro_rules! read64 {
-    ($hi:expr, $lo:expr) => {
-        loop {
-            let hi = $hi;
-            let lo = $lo;
-            if hi == $hi {
-                return ((hi as u64) << 32) | lo as u64;
-            }
-        }
-    };
-}
-
-/// Opaque msip register
-pub struct MSIP {
-    _0: (),
-}
-
-impl MSIP {
-    /// Set msip register value
-    pub fn set_value(&mut self, value: bool) {
-        unsafe {
-            CLINT::steal()
-                .msip()
-                .write(|w| if value { w.bits(1) } else { w.bits(0) })
-        }
-    }
-}
-
-/// Opaque mtime register
-pub struct MTIME;
-
-impl MTIME {
-    /// Read mtime register.
-    #[inline]
-    pub fn mtime_lo(&self) -> u32 {
-        unsafe { CLINT::steal() }.mtime().read().bits()
-    }
-
-    /// Read mtimeh register.
-    #[inline]
-    pub fn mtime_hi(&self) -> u32 {
-        unsafe { CLINT::steal() }.mtimeh().read().bits()
-    }
-
-    /// Read mtime and mtimeh registers.
-    pub fn mtime(&self) -> u64 {
-        read64!(self.mtime_hi(), self.mtime_lo())
-    }
-}
-
-/// Opaque mtimecmp register
-pub struct MTIMECMP {
-    _0: (),
-}
-
-impl MTIMECMP {
-    /// Read mtimecmp register.
-    #[inline]
-    pub fn mtimecmp_lo(&self) -> u32 {
-        unsafe { CLINT::steal() }.mtimecmp().read().bits()
-    }
-
-    /// Read mtimecmph register.
-    #[inline]
-    pub fn mtimecmp_hi(&self) -> u32 {
-        unsafe { CLINT::steal() }.mtimecmph().read().bits()
-    }
-
-    /// Read mtimecmp and mtimecmph registers.
-    pub fn mtimecmp(&self) -> u64 {
-        read64!(self.mtimecmp_hi(), self.mtimecmp_lo())
-    }
-
-    /// Write mtimecmp register
-    #[inline]
-    pub fn set_mtimecmp_lo(&mut self, value: u32) {
-        unsafe { CLINT::steal().mtimecmp().write(|w| w.bits(value)) };
-    }
-
-    /// Write mtimecmph register
-    #[inline]
-    pub fn set_mtimecmp_hi(&mut self, value: u32) {
-        unsafe { CLINT::steal().mtimecmph().write(|w| w.bits(value)) };
-    }
-
-    /// Write mtimecmp and mtimecmph registers.
-    pub fn set_mtimecmp(&mut self, value: u64) {
-        // Volume II: RISC-V Privileged Architectures V1.10 p.31, figure 3.15
-        self.set_mtimecmp_lo(0xffff_ffff); // No smaller than old value
-        self.set_mtimecmp_hi((value >> 32) as u32); // New value
-        self.set_mtimecmp_lo(value as u32); // New value
-    }
-}
-
-/// Core-Local Interruptor abstraction
-pub struct Clint {
-    /// Opaque msip register
-    pub msip: MSIP,
-    /// Opaque mtimecmp register
-    pub mtimecmp: MTIMECMP,
-    /// Opaque mtime register
-    pub mtime: MTIME,
-}
-
-impl From<CLINT> for Clint {
-    fn from(_: CLINT) -> Self {
-        Clint {
-            msip: MSIP { _0: () },
-            mtimecmp: MTIMECMP { _0: () },
-            mtime: MTIME,
-        }
-    }
-}
diff --git a/e310x-hal/src/core/mod.rs b/e310x-hal/src/core/mod.rs
index 5b8d03e..75e20d9 100644
--- a/e310x-hal/src/core/mod.rs
+++ b/e310x-hal/src/core/mod.rs
@@ -1,26 +1,18 @@
 //! E31 core peripherals
 
-pub mod clint;
 pub mod counters;
-pub mod plic;
+
+pub use e310x::{CLINT, PLIC};
 
 /// Core peripherals
 pub struct CorePeripherals {
-    /// Core-Local Interruptor
-    pub clint: clint::Clint,
-
-    /// Platform-Level Interrupt Controller
-    pub plic: plic::Plic,
-
     /// Performance counters
     pub counters: counters::PerformanceCounters,
 }
 
 impl CorePeripherals {
-    pub(crate) fn new(clint: e310x::Clint, plic: e310x::Plic) -> Self {
+    pub(crate) fn new() -> Self {
         Self {
-            clint: clint.into(),
-            plic: plic.into(),
             counters: counters::PerformanceCounters::new(),
         }
     }
@@ -31,7 +23,6 @@ impl CorePeripherals {
     ///
     /// Using this function may break the guarantees of the singleton pattern.
     pub unsafe fn steal() -> Self {
-        let p = e310x::Peripherals::steal();
-        Self::new(p.clint, p.plic)
+        Self::new()
     }
 }
diff --git a/e310x-hal/src/core/plic.rs b/e310x-hal/src/core/plic.rs
deleted file mode 100644
index 9f3e0a9..0000000
--- a/e310x-hal/src/core/plic.rs
+++ /dev/null
@@ -1,252 +0,0 @@
-//! Platform-Level Interrupt Controller
-use core::marker::PhantomData;
-use e310x::Interrupt;
-use e310x::Plic as PLIC;
-use riscv::register::{mie, mip};
-
-/// Priority of a plic::Interrupt.
-#[derive(Clone, Copy)]
-pub enum Priority {
-    /// Priority 0: Never interrupt
-    P0,
-    /// Priority 1: Lowest active priority
-    P1,
-    /// Priority 2
-    P2,
-    /// Priority 3
-    P3,
-    /// Priority 4
-    P4,
-    /// Priority 5
-    P5,
-    /// Priority 6
-    P6,
-    /// Priority 7: Highest priority
-    P7,
-}
-
-impl Priority {
-    /// Takes a read interrupt priority or plic threshold
-    /// register value and returns a plic::Priority enum.
-    fn from(prio: u32) -> Option<Priority> {
-        match prio {
-            0 => Some(Priority::P0),
-            1 => Some(Priority::P1),
-            2 => Some(Priority::P2),
-            3 => Some(Priority::P3),
-            4 => Some(Priority::P4),
-            5 => Some(Priority::P5),
-            6 => Some(Priority::P6),
-            7 => Some(Priority::P7),
-            _ => None,
-        }
-    }
-}
-
-impl From<Priority> for u32 {
-    /// Returns the numeric priority for writing to a
-    /// interrupt priority or the plic threshold register.
-    fn from(val: Priority) -> Self {
-        match val {
-            Priority::P0 => 0,
-            Priority::P1 => 1,
-            Priority::P2 => 2,
-            Priority::P3 => 3,
-            Priority::P4 => 4,
-            Priority::P5 => 5,
-            Priority::P6 => 6,
-            Priority::P7 => 7,
-        }
-    }
-}
-
-/// Watchdog interrupt (type state)
-pub struct IrqWatchdog;
-/// Realtime clock interrupt (type state)
-pub struct IrqRtc;
-/// Uart0 interrupt (type state)
-pub struct IrqUart0;
-
-/// Parts of `PLIC` peripheral for fine grained permissions.
-pub struct Plic {
-    /// Opaque mext register
-    pub mext: MEXT,
-    /// Opaque threshold register
-    pub threshold: THRESHOLD,
-    /// Opaque claim register
-    pub claim: CLAIM,
-    /// Opaque watchdog register
-    pub wdog: INTERRUPT<IrqWatchdog>,
-    /// Opaque rtc register
-    pub rtc: INTERRUPT<IrqRtc>,
-    /// Opaque uart0 register
-    pub uart0: INTERRUPT<IrqUart0>,
-}
-
-impl From<PLIC> for Plic {
-    fn from(_: PLIC) -> Self {
-        Plic {
-            mext: MEXT { _0: () },
-            threshold: THRESHOLD { _0: () },
-            claim: CLAIM { _0: () },
-            wdog: INTERRUPT {
-                offset: 0,
-                mask: 1 << (Interrupt::WATCHDOG as u8),
-                priority_offset: Interrupt::WATCHDOG as usize,
-                _marker: PhantomData,
-            },
-            rtc: INTERRUPT {
-                offset: 0,
-                mask: 1 << (Interrupt::RTC as u8),
-                priority_offset: Interrupt::RTC as usize,
-                _marker: PhantomData,
-            },
-            uart0: INTERRUPT {
-                offset: 0,
-                mask: 1 << (Interrupt::UART0 as u8),
-                priority_offset: Interrupt::UART0 as usize,
-                _marker: PhantomData,
-            },
-        }
-    }
-}
-
-/// Opaque MEXT register.
-pub struct MEXT {
-    _0: (),
-}
-
-impl MEXT {
-    /// Enable MachineExternal interrupt.
-    #[inline]
-    pub fn enable(&mut self) {
-        unsafe { mie::set_mext() };
-    }
-
-    /// Disable MachineExternal interrupt.
-    #[inline]
-    pub fn disable(&mut self) {
-        unsafe { mie::clear_mext() };
-    }
-
-    /// Returns true when MachineExternal interrupt is pending.
-    #[inline]
-    pub fn is_pending(&self) -> bool {
-        mip::read().mext()
-    }
-}
-
-/// Opaque THRESHOLD register.
-pub struct THRESHOLD {
-    _0: (),
-}
-
-impl THRESHOLD {
-    /// Returns the current active priority threshold.
-    pub fn get(&self) -> Priority {
-        // NOTE: Atomic read with no side effects.
-        let threshold = unsafe { PLIC::steal() }.threshold().read();
-        Priority::from(threshold.bits()).unwrap()
-    }
-
-    /// Sets the current active priority threshold. This
-    /// deactivates all interrupts with a lower priority.
-    pub fn set(&mut self, priority: Priority) {
-        // NOTE: Atomic write with no side effects.
-        unsafe { PLIC::steal().threshold().write(|w| w.bits(priority.into())) };
-    }
-}
-
-/// Opaque CLAIM register.
-pub struct CLAIM {
-    _0: (),
-}
-
-impl CLAIM {
-    /// Claims the interrupt with the highest priority.
-    pub fn claim(&mut self) -> Option<Interrupt> {
-        // NOTE: Atomic read with side effects.
-        let intr = unsafe { PLIC::steal() }.claim().read().bits();
-
-        // If no interrupt is pending return None
-        if intr == 0 {
-            None
-        } else {
-            Some(Interrupt::try_from(intr as u8).unwrap())
-        }
-    }
-
-    /// Notifies the PLIC that a claimed interrupt is complete.
-    pub fn complete(&mut self, intr: Interrupt) {
-        // NOTE: Atomic write with side effects.
-        unsafe { PLIC::steal().claim().write(|w| w.bits(intr as u32)) };
-    }
-}
-
-/// Fine grained interrupt handling.
-pub struct INTERRUPT<IRQ> {
-    /// Offset in to enable and pending plic registers
-    offset: usize,
-    /// Bitmask for enable and pending plic registers
-    mask: u32,
-    /// Offset in to priority plic registers
-    priority_offset: usize,
-    _marker: PhantomData<IRQ>,
-}
-
-impl<IRQ> INTERRUPT<IRQ> {
-    /// Enable IRQ interrupt.
-    #[inline]
-    pub fn enable(&mut self) {
-        // NOTE: should use atomic operations
-        unsafe {
-            PLIC::steal()
-                .enable(self.offset)
-                .modify(|r, w| w.bits(r.bits() | self.mask))
-        };
-    }
-
-    /// Disable IRQ interrupt.
-    #[inline]
-    pub fn disable(&mut self) {
-        // NOTE: should use atomic operations
-        unsafe {
-            PLIC::steal()
-                .enable(self.offset)
-                .modify(|r, w| w.bits(r.bits() & !self.mask))
-        };
-    }
-
-    /// Returns true when IRQ interrupt is pending.
-    pub fn is_pending(&self) -> bool {
-        // NOTE: Atomic write without side effects.
-        let pending = unsafe { PLIC::steal() }.pending(self.offset).read();
-        pending.bits() & self.mask == self.mask
-    }
-
-    /// Returns true when WDOG interrupt is enabled.
-    pub fn is_enabled(&self) -> bool {
-        // NOTE: Atomic write without side effects.
-        let enabled = unsafe { PLIC::steal() }.enable(self.offset).read();
-        enabled.bits() & self.mask == self.mask
-    }
-
-    /// Returns the priority of the IRQ interrupt.
-    pub fn priority(&self) -> Priority {
-        // NOTE: Atomic read without side effects.
-        let priority = unsafe { PLIC::steal() }
-            .priority(self.priority_offset)
-            .read();
-        Priority::from(priority.bits()).unwrap()
-    }
-
-    /// Sets the priority of the IRQ interrupt.
-    pub fn set_priority(&mut self, priority: Priority) {
-        // NOTE: Atomic write without side effects.
-        unsafe {
-            PLIC::steal()
-                .priority(self.priority_offset)
-                .write(|w| w.bits(priority as u32))
-        };
-    }
-}
diff --git a/e310x-hal/src/delay.rs b/e310x-hal/src/delay.rs
index 5a89293..17e71fc 100644
--- a/e310x-hal/src/delay.rs
+++ b/e310x-hal/src/delay.rs
@@ -1,9 +1,9 @@
 //! # Delays
 
 use crate::clock::Clocks;
-use crate::core::clint::{MTIME, MTIMECMP};
-use embedded_hal::blocking::delay::{DelayMs, DelayUs};
-use riscv::register::{mie, mip};
+use e310x::CLINT;
+use embedded_hal::delay::DelayNs;
+use riscv::register::mip;
 
 /// Machine timer (mtime) as a busyloop delay provider
 #[derive(Default)]
@@ -18,104 +18,46 @@ impl Delay {
     }
 }
 
-impl DelayUs<u32> for Delay {
-    fn delay_us(&mut self, us: u32) {
-        let ticks = (us as u64) * TICKS_PER_SECOND / 1_000_000;
+impl DelayNs for Delay {
+    fn delay_ns(&mut self, ns: u32) {
+        let ticks = (ns as u64) * TICKS_PER_SECOND / 1_000_000_000;
 
-        let mtime = MTIME;
-        let t = mtime.mtime() + ticks;
-        while mtime.mtime() < t {}
-    }
-}
-
-// This is a workaround to allow `delay_us(42)` construction without specifying a type.
-impl DelayUs<i32> for Delay {
-    #[inline(always)]
-    fn delay_us(&mut self, us: i32) {
-        assert!(us >= 0);
-        self.delay_us(us as u32);
-    }
-}
-
-impl DelayUs<u16> for Delay {
-    #[inline(always)]
-    fn delay_us(&mut self, us: u16) {
-        self.delay_us(u32::from(us));
-    }
-}
-
-impl DelayUs<u8> for Delay {
-    #[inline(always)]
-    fn delay_us(&mut self, us: u8) {
-        self.delay_us(u32::from(us));
-    }
-}
-
-impl DelayMs<u32> for Delay {
-    fn delay_ms(&mut self, ms: u32) {
-        self.delay_us(ms * 1000);
-    }
-}
-
-// This is a workaround to allow `delay_ms(42)` construction without specifying a type.
-impl DelayMs<i32> for Delay {
-    #[inline(always)]
-    fn delay_ms(&mut self, ms: i32) {
-        assert!(ms >= 0);
-        self.delay_ms(ms as u32);
-    }
-}
-
-impl DelayMs<u16> for Delay {
-    #[inline(always)]
-    fn delay_ms(&mut self, ms: u16) {
-        self.delay_ms(u32::from(ms));
-    }
-}
-
-impl DelayMs<u8> for Delay {
-    #[inline(always)]
-    fn delay_ms(&mut self, ms: u8) {
-        self.delay_ms(u32::from(ms));
+        let mtime = CLINT::mtimer().mtime;
+        let t = mtime.read() + ticks;
+        while mtime.read() < t {}
     }
 }
 
 /// Machine timer (mtime) as a sleep delay provider using mtimecmp
 pub struct Sleep {
     clock_freq: u32,
-    mtimecmp: MTIMECMP,
 }
 
 impl Sleep {
     /// Constructs a delay provider using mtimecmp register to sleep
-    pub fn new(mtimecmp: MTIMECMP, clocks: Clocks) -> Self {
+    pub fn new(clocks: Clocks) -> Self {
         Sleep {
             clock_freq: clocks.lfclk().0,
-            mtimecmp,
         }
     }
 }
 
-impl DelayMs<u32> for Sleep {
-    fn delay_ms(&mut self, ms: u32) {
-        let ticks = (ms as u64) * (self.clock_freq as u64) / 1000;
-        let t = MTIME.mtime() + ticks;
+impl DelayNs for Sleep {
+    fn delay_ns(&mut self, ns: u32) {
+        let ticks = (ns as u64) * u64::from(self.clock_freq) / 1_000_000_000;
+        let t = CLINT::mtimer().mtime.read() + ticks;
 
-        self.mtimecmp.set_mtimecmp(t);
+        CLINT::mtimecmp0().write(t);
 
         // Enable timer interrupt
-        unsafe {
-            mie::set_mtimer();
-        }
+        unsafe { CLINT::mtimer_enable() };
 
         // Wait For Interrupt will put CPU to sleep until an interrupt hits
         // in our case when internal timer mtime value >= mtimecmp value
         // after which empty handler gets called and we go into the
         // next iteration of this loop
         loop {
-            unsafe {
-                riscv::asm::wfi();
-            }
+            riscv::asm::wfi();
 
             // check if we got the right interrupt cause, otherwise just loop back to wfi
             if mip::read().mtimer() {
@@ -124,31 +66,6 @@ impl DelayMs<u32> for Sleep {
         }
 
         // Clear timer interrupt
-        unsafe {
-            mie::clear_mtimer();
-        }
-    }
-}
-
-// This is a workaround to allow `delay_ms(42)` construction without specifying a type.
-impl DelayMs<i32> for Sleep {
-    #[inline(always)]
-    fn delay_ms(&mut self, ms: i32) {
-        assert!(ms >= 0);
-        self.delay_ms(ms as u32);
-    }
-}
-
-impl DelayMs<u16> for Sleep {
-    #[inline(always)]
-    fn delay_ms(&mut self, ms: u16) {
-        self.delay_ms(u32::from(ms));
-    }
-}
-
-impl DelayMs<u8> for Sleep {
-    #[inline(always)]
-    fn delay_ms(&mut self, ms: u8) {
-        self.delay_ms(u32::from(ms));
+        CLINT::mtimer_disable();
     }
 }
diff --git a/e310x-hal/src/device.rs b/e310x-hal/src/device.rs
index da0a63f..8bb56df 100644
--- a/e310x-hal/src/device.rs
+++ b/e310x-hal/src/device.rs
@@ -159,7 +159,7 @@ impl From<Peripherals> for DeviceResources {
         };
 
         DeviceResources {
-            core_peripherals: CorePeripherals::new(p.clint, p.plic),
+            core_peripherals: CorePeripherals::new(),
             peripherals,
             pins: p.gpio0.into(),
         }
diff --git a/e310x-hal/src/gpio.rs b/e310x-hal/src/gpio.rs
index 14604b7..db94e90 100644
--- a/e310x-hal/src/gpio.rs
+++ b/e310x-hal/src/gpio.rs
@@ -80,56 +80,61 @@ trait PeripheralAccess {
 
     fn set_input_en(index: usize, bit: bool) {
         let p = Self::peripheral();
-        let r: &AtomicU32 = unsafe { core::mem::transmute(&p.input_en()) };
+        let r: &AtomicU32 = unsafe { core::mem::transmute(p.input_en()) };
         atomic_set_bit(r, index, bit);
     }
 
     fn set_output_en(index: usize, bit: bool) {
         let p = Self::peripheral();
-        let r: &AtomicU32 = unsafe { core::mem::transmute(&p.output_en()) };
+        let r: &AtomicU32 = unsafe { core::mem::transmute(p.output_en()) };
         atomic_set_bit(r, index, bit);
     }
 
+    fn output_value(index: usize) -> bool {
+        let p = Self::peripheral();
+        ((p.output_val().read().bits() >> (index & 31)) & 1) != 0
+    }
+
     fn set_output_value(index: usize, bit: bool) {
         let p = Self::peripheral();
-        let r: &AtomicU32 = unsafe { core::mem::transmute(&p.output_val()) };
+        let r: &AtomicU32 = unsafe { core::mem::transmute(p.output_val()) };
         atomic_set_bit(r, index, bit);
     }
 
     fn toggle_pin(index: usize) {
         let p = Self::peripheral();
-        let r: &AtomicU32 = unsafe { core::mem::transmute(&p.output_val()) };
+        let r: &AtomicU32 = unsafe { core::mem::transmute(p.output_val()) };
         let mask = 1 << (index & 31);
         r.fetch_xor(mask, Ordering::SeqCst);
     }
 
     fn set_pullup(index: usize, bit: bool) {
         let p = Self::peripheral();
-        let r: &AtomicU32 = unsafe { core::mem::transmute(&p.pullup()) };
+        let r: &AtomicU32 = unsafe { core::mem::transmute(p.pullup()) };
         atomic_set_bit(r, index, bit);
     }
 
     fn set_drive(index: usize, bit: bool) {
         let p = Self::peripheral();
-        let r: &AtomicU32 = unsafe { core::mem::transmute(&p.drive()) };
+        let r: &AtomicU32 = unsafe { core::mem::transmute(p.drive()) };
         atomic_set_bit(r, index, bit);
     }
 
     fn set_out_xor(index: usize, bit: bool) {
         let p = Self::peripheral();
-        let r: &AtomicU32 = unsafe { core::mem::transmute(&p.out_xor()) };
+        let r: &AtomicU32 = unsafe { core::mem::transmute(p.out_xor()) };
         atomic_set_bit(r, index, bit);
     }
 
     fn set_iof_en(index: usize, bit: bool) {
         let p = Self::peripheral();
-        let r: &AtomicU32 = unsafe { core::mem::transmute(&p.iof_en()) };
+        let r: &AtomicU32 = unsafe { core::mem::transmute(p.iof_en()) };
         atomic_set_bit(r, index, bit);
     }
 
     fn set_iof_sel(index: usize, bit: bool) {
         let p = Self::peripheral();
-        let r: &AtomicU32 = unsafe { core::mem::transmute(&p.iof_sel()) };
+        let r: &AtomicU32 = unsafe { core::mem::transmute(p.iof_sel()) };
         atomic_set_bit(r, index, bit);
     }
 }
@@ -143,8 +148,7 @@ macro_rules! gpio {
             use core::marker::PhantomData;
             use core::convert::Infallible;
 
-            use embedded_hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin,
-                               ToggleableOutputPin};
+            use embedded_hal::digital::{InputPin, OutputPin, StatefulOutputPin, ErrorType};
             use e310x::$GPIOX;
             use super::{Unknown, IOF0, IOF1, Drive, Floating, GpioExt, Input, Invert,
                         NoInvert, Output, PullUp, Regular, PinIndex, PeripheralAccess};
@@ -195,7 +199,6 @@ macro_rules! gpio {
                         $PXi { _mode: PhantomData }
                     }
 
-
                     /// Configures the pin to serve as alternate function 1 (AF1)
                     pub fn into_iof1(self) -> $PXi<IOF1<NoInvert>> {
                         $GPIOX::set_out_xor(Self::INDEX, false);
@@ -212,7 +215,6 @@ macro_rules! gpio {
                         $PXi { _mode: PhantomData }
                     }
 
-
                     /// Configures the pin to serve as inverted alternate function 1 (AF1)
                     pub fn into_inverted_iof1(self) -> $PXi<IOF1<Invert>> {
                         $GPIOX::set_out_xor(Self::INDEX, true);
@@ -276,47 +278,52 @@ macro_rules! gpio {
                     }
                 }
 
-                impl<MODE> InputPin for $PXi<Input<MODE>> {
+                impl<MODE> ErrorType for $PXi<Input<MODE>> {
                     type Error = Infallible;
+                }
 
-                    fn is_high(&self) -> Result<bool, Infallible> {
-                        Ok($GPIOX::input_value(Self::INDEX))
-
-                    }
-
-                    fn is_low(&self) -> Result<bool, Infallible> {
-                        Ok(!self.is_high()?)
-                    }
+                impl<MODE> ErrorType for $PXi<Output<MODE>> {
+                    type Error = Infallible;
                 }
 
-                impl<MODE> StatefulOutputPin for $PXi<Output<MODE>> {
-                    fn is_set_high(&self) -> Result<bool, Infallible> {
+                impl<MODE> InputPin for $PXi<Input<MODE>> {
+                    #[inline]
+                    fn is_high(&mut self) -> Result<bool, Self::Error> {
                         Ok($GPIOX::input_value(Self::INDEX))
                     }
 
-                    fn is_set_low(&self) -> Result<bool, Infallible> {
-                        Ok(!self.is_set_high()?)
+                    #[inline]
+                    fn is_low(&mut self) -> Result<bool, Self::Error> {
+                        Ok(!self.is_high()?)
                     }
                 }
 
                 impl<MODE> OutputPin for $PXi<Output<MODE>> {
-                    type Error = Infallible;
-
+                    #[inline]
                     fn set_high(&mut self) -> Result<(), Infallible> {
                         $GPIOX::set_output_value(Self::INDEX, true);
                         Ok(())
                     }
 
+                    #[inline]
                     fn set_low(&mut self) -> Result<(), Infallible> {
                         $GPIOX::set_output_value(Self::INDEX, false);
                         Ok(())
                     }
                 }
 
-                impl<MODE> ToggleableOutputPin for $PXi<Output<MODE>> {
-                    type Error = Infallible;
+                impl<MODE> StatefulOutputPin for $PXi<Output<MODE>> {
+                    #[inline]
+                    fn is_set_high(&mut self) -> Result<bool, Infallible> {
+                        Ok($GPIOX::output_value(Self::INDEX))
+                    }
+
+                    #[inline]
+                    fn is_set_low(&mut self) -> Result<bool, Infallible> {
+                        Ok(!self.is_set_high()?)
+                    }
 
-                    /// Toggles the pin state.
+                    #[inline]
                     fn toggle(&mut self) -> Result<(), Infallible> {
                         $GPIOX::toggle_pin(Self::INDEX);
                         Ok(())
diff --git a/e310x-hal/src/i2c.rs b/e310x-hal/src/i2c.rs
index 6e03258..5dada7a 100644
--- a/e310x-hal/src/i2c.rs
+++ b/e310x-hal/src/i2c.rs
@@ -3,44 +3,35 @@
 //! The SiFive Inter-Integrated Circuit (I2C) Master Interface
 //! is based on OpenCores® I2C Master Core.
 //!
-//! You can use the `I2c` interface with these I2C instances
+//! You can use the [`I2c`] interface with these I2C instances
 //!
 //! # I2C0
 //! - SDA: Pin 12 IOF0
 //! - SCL: Pin 13 IOF0
 //! - Interrupt::I2C0
 
-use crate::clock::Clocks;
-use crate::gpio::{gpio0, IOF0};
-use crate::time::Bps;
-use core::mem;
+use crate::{clock::Clocks, time::Bps};
 use core::ops::Deref;
 use e310x::{i2c0, I2c0};
-use embedded_hal::blocking::i2c::{Read, Write, WriteRead};
+use embedded_hal::i2c::{self, ErrorKind, ErrorType, NoAcknowledgeSource, Operation};
 
-/// SDA pin - DO NOT IMPLEMENT THIS TRAIT
-mod sealed {
-    /// SDA pin
-    pub trait SdaPin<I2C> {}
+/// SDA pin
+pub trait SdaPin<I2C>: private::Sealed {}
 
-    /// SCL pin
-    pub trait SclPin<I2C> {}
-}
-
-impl<T> sealed::SdaPin<I2c0> for gpio0::Pin12<IOF0<T>> {}
-impl<T> sealed::SclPin<I2c0> for gpio0::Pin13<IOF0<T>> {}
+/// SCL pin
+pub trait SclPin<I2C>: private::Sealed {}
 
-/// I2C error
-#[derive(Debug, Eq, PartialEq)]
-pub enum Error {
-    /// Invalid peripheral state
-    InvalidState,
+/// I2cX trait extends the I2C peripheral
+pub trait I2cX: Deref<Target = i2c0::RegisterBlock> + private::Sealed {}
 
-    /// Arbitration lost
-    ArbitrationLost,
+mod i2c_impl {
+    use super::{I2c0, I2cX, SclPin, SdaPin};
+    use crate::gpio::{gpio0, IOF0};
 
-    /// No ACK received
-    NoAck,
+    /// I2C0
+    impl I2cX for I2c0 {}
+    impl<T> SdaPin<I2c0> for gpio0::Pin12<IOF0<T>> {}
+    impl<T> SclPin<I2c0> for gpio0::Pin13<IOF0<T>> {}
 }
 
 /// Transmission speed
@@ -61,12 +52,12 @@ pub struct I2c<I2C, PINS> {
     pins: PINS,
 }
 
-impl<SDA, SCL> I2c<I2c0, (SDA, SCL)> {
+impl<I2C: I2cX, SDA, SCL> I2c<I2C, (SDA, SCL)> {
     /// Configures an I2C peripheral
-    pub fn new(i2c: I2c0, sda: SDA, scl: SCL, speed: Speed, clocks: Clocks) -> Self
+    pub fn new(i2c: I2C, sda: SDA, scl: SCL, speed: Speed, clocks: Clocks) -> Self
     where
-        SDA: sealed::SdaPin<I2c0>,
-        SCL: sealed::SclPin<I2c0>,
+        SDA: SdaPin<I2C>,
+        SCL: SclPin<I2C>,
     {
         // Calculate prescaler value
         let desired_speed = match speed {
@@ -107,209 +98,227 @@ impl<I2C, PINS> I2c<I2C, PINS> {
     }
 }
 
-impl<I2C: Deref<Target = i2c0::RegisterBlock>, PINS> I2c<I2C, PINS> {
-    fn reset(&self) {
-        // ACK pending interrupt event, clear commands
-        self.write_cr(|w| w.iack().set_bit());
-    }
-
-    fn write_cr<F>(&self, f: F)
-    where
-        F: FnOnce(&mut i2c0::cr::W) -> &mut i2c0::cr::W,
-    {
-        self.i2c.cr().write(|w| unsafe {
-            let mut value: u32 = 0;
-            f(mem::transmute::<&mut u32, &mut i2c0::cr::W>(&mut value));
-            w.bits(value)
-        });
-    }
-
+impl<I2C: I2cX, PINS> I2c<I2C, PINS> {
+    /// Read the status register.
     fn read_sr(&self) -> i2c0::sr::R {
         self.i2c.sr().read()
     }
 
-    fn write_byte(&self, byte: u8) {
-        self.i2c.txr_rxr().write(|w| unsafe { w.data().bits(byte) });
+    /// Clear the interrupt flag in the control register.
+    fn clear_interrupt(&self) {
+        self.i2c.cr().write(|w| w.iack().set_bit());
     }
 
-    fn read_byte(&self) -> u8 {
-        self.i2c.txr_rxr().read().data().bits()
+    /// Reset the I2C peripheral.
+    fn reset(&self) {
+        self.clear_interrupt();
     }
 
-    fn wait_for_interrupt(&self) -> Result<(), Error> {
-        loop {
-            let sr = self.read_sr();
-
-            if sr.al().bit_is_set() {
-                // Set STOP
-                self.write_cr(|w| w.sto().set_bit());
-                self.wait_for_complete();
-
-                return Err(Error::ArbitrationLost);
-            }
-
-            if sr.if_().bit_is_set() {
-                // ACK the interrupt
-                self.write_cr(|w| w.iack().set_bit());
-
-                return Ok(());
-            }
-        }
+    /// Set the start bit in the control register. The next byte sent
+    /// through the bus will be preceded by a (repeated) start condition.
+    ///
+    /// # Note
+    ///
+    /// This function does not start the transmission. You must call
+    /// [`Self::write_to_slave`] to start the transmission.
+    fn set_start(&self) {
+        self.i2c.cr().write(|w| w.sta().set_bit());
     }
 
-    fn wait_for_read(&self) -> Result<(), Error> {
-        self.wait_for_interrupt()
+    /// Set the stop bit in the control register.
+    /// A stop condition will be sent on the bus.
+    fn set_stop(&self) {
+        self.i2c.cr().write(|w| w.sto().set_bit());
     }
 
-    fn wait_for_write(&self) -> Result<(), Error> {
-        self.wait_for_interrupt()?;
-
-        if self.read_sr().rx_ack().bit_is_set() {
-            // Set STOP
-            self.write_cr(|w| w.sto().set_bit());
-            self.wait_for_complete();
-
-            return Err(Error::NoAck);
-        }
-
-        Ok(())
+    /// Set the ACK bit in the control register. If `ack` is `true`, the
+    /// I2C will **NOT** acknowledge the next byte received. If `ack`
+    /// is `false`, the I2C will acknowledge the next byte received.
+    fn set_ack(&self, ack: bool) {
+        self.i2c.cr().write(|w| w.ack().bit(ack));
     }
 
-    fn wait_for_complete(&self) {
-        while self.read_sr().busy().bit_is_set() {}
+    /// Set the next byte to be transmitted to the I2C slave device.
+    ///
+    /// # Note
+    ///
+    /// This function does not start the transmission. You must call
+    /// [`Self::write_to_slave`] to start the transmission.
+    fn write_txr(&self, byte: u8) {
+        self.i2c.txr_rxr().write(|w| unsafe { w.data().bits(byte) });
     }
-}
 
-const FLAG_READ: u8 = 1;
-const FLAG_WRITE: u8 = 0;
+    /// Read the last byte received from the I2C slave device.
+    fn read_rxr(&self) -> u8 {
+        self.i2c.txr_rxr().read().data().bits()
+    }
 
-impl<I2C: Deref<Target = i2c0::RegisterBlock>, PINS> Read for I2c<I2C, PINS> {
-    type Error = Error;
+    /// Trigger a write to the slave device.
+    /// This function should be called after writing to the transmit register.
+    ///
+    /// # Note
+    ///
+    /// This function does not block until the write is complete. You must call
+    /// [`Self::wait_for_write`] to wait for the write to complete.
+    fn write_to_slave(&self) {
+        self.i2c.cr().write(|w| w.wr().set_bit());
+    }
 
-    fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
-        self.reset();
+    /// Trigger a read from the slave device.
+    /// This function should be called before reading the receive register.
+    ///
+    /// # Note
+    ///
+    /// This function does not block until the read is complete. You must call
+    /// [`Self::wait_for_read`] to wait for the read to complete.
+    fn read_from_slave(&self) {
+        self.i2c.cr().write(|w| w.rd().set_bit());
+    }
 
-        if self.read_sr().busy().bit_is_set() {
-            return Err(Error::InvalidState);
+    /// Check if the I2C peripheral is idle.
+    fn is_idle(&self) -> nb::Result<(), ErrorKind> {
+        match self.read_sr().busy().bit_is_set() {
+            true => Err(nb::Error::WouldBlock),
+            false => Ok(()),
         }
+    }
 
-        // Write address + R
-        self.write_byte((address << 1) + FLAG_READ);
-
-        // Generate start condition and write command
-        self.write_cr(|w| w.sta().set_bit().wr().set_bit());
-        self.wait_for_write()?;
-
-        // Read bytes
-        let buffer_len = buffer.len();
-        for (i, byte) in buffer.iter_mut().enumerate() {
-            if i != buffer_len - 1 {
-                // R + ACK
-                self.write_cr(|w| w.rd().set_bit().ack().clear_bit());
-            } else {
-                // R + NACK + STOP
-                self.write_cr(|w| w.rd().set_bit().ack().set_bit().sto().set_bit());
-            }
-            self.wait_for_read()?;
-
-            *byte = self.read_byte();
+    /// Acknowledge an interrupt.
+    ///
+    /// # Errors
+    ///
+    /// In case of arbitration loss, a stop condition is sent
+    /// and an [`ErrorKind::ArbitrationLoss`] is returned.
+    fn ack_interrupt(&self) -> nb::Result<(), ErrorKind> {
+        let sr = self.read_sr();
+
+        if sr.al().bit_is_set() {
+            self.set_stop();
+            Err(nb::Error::Other(ErrorKind::ArbitrationLoss))
+        } else if sr.if_().bit_is_set() {
+            self.clear_interrupt();
+            Ok(())
+        } else {
+            Err(nb::Error::WouldBlock)
         }
-        Ok(())
     }
-}
 
-impl<I2C: Deref<Target = i2c0::RegisterBlock>, PINS> Write for I2c<I2C, PINS> {
-    type Error = Error;
-
-    fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> {
-        self.reset();
+    /// Blocking version of [`Self::is_idle`].
+    fn wait_idle(&self) {
+        nb::block!(self.is_idle()).unwrap();
+    }
 
-        if self.read_sr().busy().bit_is_set() {
-            return Err(Error::InvalidState);
+    /// Wait for a read operation to complete.
+    ///
+    /// # Errors
+    ///
+    /// In case of arbitration loss it waits until the bus is idle
+    /// before returning an [`ErrorKind::ArbitrationLoss`] error.
+    fn wait_for_read(&self) -> Result<(), ErrorKind> {
+        if let Err(e) = nb::block!(self.ack_interrupt()) {
+            self.wait_idle();
+            Err(e)
+        } else {
+            Ok(())
         }
+    }
 
-        // Write address + W
-        self.write_byte((address << 1) + FLAG_WRITE);
-
-        // Generate start condition and write command
-        self.write_cr(|w| w.sta().set_bit().wr().set_bit());
-        self.wait_for_write()?;
-
-        // Write bytes
-        for (i, byte) in bytes.iter().enumerate() {
-            self.write_byte(*byte);
-
-            if i != bytes.len() - 1 {
-                self.write_cr(|w| w.wr().set_bit());
-            } else {
-                self.write_cr(|w| w.wr().set_bit().sto().set_bit());
-            }
-            self.wait_for_write()?;
+    /// Wait for a write operation to complete.
+    ///
+    /// # Errors
+    ///
+    /// If the slave device does not acknowledge the write, a stop condition
+    /// is sent and an [`ErrorKind::NoAcknowledge`] is returned.
+    ///
+    /// In case of arbitration loss it waits until the bus is idle
+    /// before returning an [`ErrorKind::ArbitrationLoss`] error.
+    fn wait_for_write(&self) -> Result<(), ErrorKind> {
+        if let Err(e) = nb::block!(self.ack_interrupt()) {
+            self.wait_idle();
+            Err(e)
+        } else if self.read_sr().rx_ack().bit_is_set() {
+            self.set_stop();
+            Err(ErrorKind::NoAcknowledge(NoAcknowledgeSource::Unknown))
+        } else {
+            Ok(())
         }
-        Ok(())
     }
 }
 
-impl<I2C: Deref<Target = i2c0::RegisterBlock>, PINS> WriteRead for I2c<I2C, PINS> {
-    type Error = Error;
+const FLAG_READ: u8 = 1;
+const FLAG_WRITE: u8 = 0;
 
-    fn write_read(
+impl<I2C: I2cX, PINS> ErrorType for I2c<I2C, PINS> {
+    type Error = ErrorKind;
+}
+
+impl<I2C: I2cX, PINS> i2c::I2c for I2c<I2C, PINS> {
+    fn transaction(
         &mut self,
         address: u8,
-        bytes: &[u8],
-        buffer: &mut [u8],
+        operations: &mut [Operation<'_>],
     ) -> Result<(), Self::Error> {
+        self.wait_idle();
         self.reset();
 
-        if self.read_sr().busy().bit_is_set() {
-            return Err(Error::InvalidState);
+        self.set_start();
+        let mut last_op_was_read = false;
+        for operation in operations.iter_mut() {
+            match operation {
+                Operation::Write(bytes) => {
+                    if last_op_was_read {
+                        self.set_start();
+                        last_op_was_read = false;
+                    }
+                    // Send write command
+                    self.write_txr((address << 1) + FLAG_WRITE);
+                    self.write_to_slave();
+                    self.wait_for_write()?;
+
+                    // Write bytes
+                    for byte in bytes.iter() {
+                        self.write_txr(*byte);
+                        self.write_to_slave();
+                        self.wait_for_write()?;
+                    }
+                }
+                Operation::Read(buffer) => {
+                    if !last_op_was_read {
+                        self.set_start();
+                        last_op_was_read = true;
+                    }
+                    // Send read command
+                    self.write_txr((address << 1) + FLAG_READ);
+                    self.write_to_slave();
+                    self.wait_for_write()?;
+
+                    // Read bytes
+                    let buffer_len = buffer.len();
+                    for (i, byte) in buffer.iter_mut().enumerate() {
+                        // Set ACK on all but the last byte
+                        self.set_ack(i == buffer_len - 1);
+                        self.read_from_slave();
+                        self.wait_for_read()?;
+                        *byte = self.read_rxr();
+                    }
+                }
+            }
         }
+        self.set_stop();
+        self.wait_idle();
 
-        if !bytes.is_empty() && buffer.is_empty() {
-            self.write(address, bytes)
-        } else if !buffer.is_empty() && bytes.is_empty() {
-            self.read(address, buffer)
-        } else if bytes.is_empty() && buffer.is_empty() {
-            Ok(())
-        } else {
-            // Write address + W
-            self.write_byte((address << 1) + FLAG_WRITE);
-
-            // Generate start condition and write command
-            self.write_cr(|w| w.sta().set_bit().wr().set_bit());
-            self.wait_for_write()?;
-
-            // Write bytes
-            for byte in bytes {
-                self.write_byte(*byte);
-
-                self.write_cr(|w| w.wr().set_bit());
-                self.wait_for_write()?;
-            }
+        Ok(())
+    }
+}
 
-            // Write address + R
-            self.write_byte((address << 1) + FLAG_READ);
-
-            // Generate repeated start condition and write command
-            self.write_cr(|w| w.sta().set_bit().wr().set_bit());
-            self.wait_for_write()?;
-
-            // Read bytes
-            let buffer_len = buffer.len();
-            for (i, byte) in buffer.iter_mut().enumerate() {
-                if i != buffer_len - 1 {
-                    // W + ACK
-                    self.write_cr(|w| w.rd().set_bit().ack().clear_bit());
-                } else {
-                    // W + NACK + STOP
-                    self.write_cr(|w| w.rd().set_bit().ack().set_bit().sto().set_bit());
-                }
-                self.wait_for_read()?;
+mod private {
+    use super::I2c0;
+    use crate::gpio::{gpio0, IOF0};
 
-                *byte = self.read_byte();
-            }
+    pub trait Sealed {}
 
-            Ok(())
-        }
-    }
+    // I2C0
+    impl Sealed for I2c0 {}
+    impl<T> Sealed for gpio0::Pin12<IOF0<T>> {}
+    impl<T> Sealed for gpio0::Pin13<IOF0<T>> {}
 }
diff --git a/e310x-hal/src/interrupt.rs b/e310x-hal/src/interrupt.rs
deleted file mode 100644
index 8599835..0000000
--- a/e310x-hal/src/interrupt.rs
+++ /dev/null
@@ -1,203 +0,0 @@
-//! Vectored machine external interrupt handler.
-//!
-//! # Notes
-//!
-//! - You must activate the `virq` feature to use this module.
-//!
-//! - The vectored handler automatically claims the PLIC interrupt source as complete.
-//!   Thus, users do not have to worry about this step.
-//!
-//! # Features
-//!
-//! This module provides:
-//!
-//! - A vectored implementation for handling each machine external interrupt source independently.
-//!
-//! - A linker script that provides weak symbols for all the interrupt sources of an E310X microcontroller.
-//!   This file must be supplied using rustflag when compiling.
-//!
-//! # Implementation details
-//!
-//! You can define a custom handler for each interrupt source (see [`e310x::interrupt::Interrupt`]).
-//! For instance, if you want to define a custom handler for interrupts triggered by
-//!  the [`e310x::interrupt::Interrupt::GPIO0`] source, you must define the `GPIO0` function:
-//!
-//! ```ignore
-//! #[no_mangle]
-//! #[allow(non_snake_case)]
-//! fn GPIO0() {
-//!     // define the behavior of your custom handler
-//! }
-//! ```
-//!
-//! Note that the function must be marked as `no_mangle`.
-//! You can also use the [`e310x::interrupt!`] macro.
-//!
-//! If a source without custom handler triggers an interruption, it executes the
-//! `OtherMachineExternal` handler. This handler function is shared among all the
-//! undefined interrupt sources. You can define this handler as follows:
-//!
-//! ```ignore,no_run
-//! #[no_mangle]
-//! #[allow(non_snake_case)]
-//! fn OtherMachineExternal() {
-//!     // define the behavior of this handler
-//! }
-//! ```
-//!
-//! By default, `OtherMachineExternal` executes the [`DefaultMachineExternal`] handler.
-//! This handler is just an infinite loop.
-
-use crate::core::CorePeripherals;
-pub use e310x::interrupt::*;
-
-extern "C" {
-    fn WATCHDOG();
-    fn RTC();
-    fn UART0();
-    fn UART1();
-    fn QSPI0();
-    fn QSPI1();
-    fn QSPI2();
-    fn GPIO0();
-    fn GPIO1();
-    fn GPIO2();
-    fn GPIO3();
-    fn GPIO4();
-    fn GPIO5();
-    fn GPIO6();
-    fn GPIO7();
-    fn GPIO8();
-    fn GPIO9();
-    fn GPIO10();
-    fn GPIO11();
-    fn GPIO12();
-    fn GPIO13();
-    fn GPIO14();
-    fn GPIO15();
-    fn GPIO16();
-    fn GPIO17();
-    fn GPIO18();
-    fn GPIO19();
-    fn GPIO20();
-    fn GPIO21();
-    fn GPIO22();
-    fn GPIO23();
-    fn GPIO24();
-    fn GPIO25();
-    fn GPIO26();
-    fn GPIO27();
-    fn GPIO28();
-    fn GPIO29();
-    fn GPIO30();
-    fn GPIO31();
-    fn PWM0CMP0();
-    fn PWM0CMP1();
-    fn PWM0CMP2();
-    fn PWM0CMP3();
-    fn PWM1CMP0();
-    fn PWM1CMP1();
-    fn PWM1CMP2();
-    fn PWM1CMP3();
-    fn PWM2CMP0();
-    fn PWM2CMP1();
-    fn PWM2CMP2();
-    fn PWM2CMP3();
-    #[cfg(feature = "g002")]
-    fn I2C0();
-}
-
-#[no_mangle]
-#[allow(non_snake_case)]
-/// Default machine external interrupt handler. It is an infinite loop.
-pub fn DefaultMachineExternal() {
-    loop {
-        // Prevent this from turning into a UDF instruction
-        // see rust-lang/rust#28728 for details
-        continue;
-    }
-}
-
-#[cfg(not(feature = "g002"))]
-const N_INTERRUPTS: usize = 51;
-#[cfg(feature = "g002")]
-const N_INTERRUPTS: usize = 52;
-
-/// Array of machine external interrupt handlers.
-static HANDLERS: [unsafe extern "C" fn(); N_INTERRUPTS] = [
-    WATCHDOG,
-    RTC,
-    UART0,
-    UART1,
-    QSPI0,
-    QSPI1,
-    QSPI2,
-    GPIO0,
-    GPIO1,
-    GPIO2,
-    GPIO3,
-    GPIO4,
-    GPIO5,
-    GPIO6,
-    GPIO7,
-    GPIO8,
-    GPIO9,
-    GPIO10,
-    GPIO11,
-    GPIO12,
-    GPIO13,
-    GPIO14,
-    GPIO15,
-    GPIO16,
-    GPIO17,
-    GPIO18,
-    GPIO19,
-    GPIO20,
-    GPIO21,
-    GPIO22,
-    GPIO23,
-    GPIO24,
-    GPIO25,
-    GPIO26,
-    GPIO27,
-    GPIO28,
-    GPIO29,
-    GPIO30,
-    GPIO31,
-    PWM0CMP0,
-    PWM0CMP1,
-    PWM0CMP2,
-    PWM0CMP3,
-    PWM1CMP0,
-    PWM1CMP1,
-    PWM1CMP2,
-    PWM1CMP3,
-    PWM2CMP0,
-    PWM2CMP1,
-    PWM2CMP2,
-    PWM2CMP3,
-    #[cfg(feature = "g002")]
-    I2C0,
-];
-
-/// Handler for vectored machine external interrupts (see the [`riscv-rt`] crate).
-#[no_mangle]
-#[allow(non_snake_case)]
-unsafe fn MachineExternal() {
-    // Steal the PLIC peripheral and claim the interrupt
-    let mut plic = CorePeripherals::steal().plic;
-    let interrupt = plic.claim.claim().unwrap();
-    let interrupt_n = interrupt as usize;
-    // Match the appropriate machine external interrupt
-    if interrupt_n == 0 {
-        // Interrupt number 0 is defined as no interrupt
-    } else if interrupt_n <= HANDLERS.len() {
-        // Execute corresponding interrupt handler
-        HANDLERS[interrupt_n - 1]();
-    } else {
-        // Any other interrupt number is not allowed
-        DefaultMachineExternal();
-    }
-    // Claim PLIC interrupt source as complete by this handler
-    plic.claim.complete(interrupt);
-}
diff --git a/e310x-hal/src/lib.rs b/e310x-hal/src/lib.rs
index 40bf01a..b040046 100644
--- a/e310x-hal/src/lib.rs
+++ b/e310x-hal/src/lib.rs
@@ -61,7 +61,5 @@ pub mod wdog;
 
 #[cfg(feature = "g002")]
 pub mod i2c;
-#[cfg(feature = "virq")]
-pub mod interrupt;
 
 pub use device::DeviceResources;
diff --git a/e310x-hal/src/prelude.rs b/e310x-hal/src/prelude.rs
index c6ccd12..2b47592 100644
--- a/e310x-hal/src/prelude.rs
+++ b/e310x-hal/src/prelude.rs
@@ -4,12 +4,21 @@ pub use crate::clock::AonExt as _e310x_hal_clock_AonExt;
 pub use crate::clock::PrciExt as _e310x_hal_clock_PrciExt;
 pub use crate::gpio::GpioExt as _e310x_hal_gpio_GpioExt;
 pub use crate::rtc::RtcExt as _e310x_hal_rtc_RtcExt;
-pub use crate::stdout::Write as _e310x_hal_stdout_Write;
 pub use crate::time::U32Ext as _e310x_hal_time_U32Ext;
 pub use crate::wdog::WdogExt as _e310x_hal_wdog_WdogExt;
-pub use embedded_hal::digital::v2::{
-    InputPin as _embedded_hal_digital_v2_InputPin, OutputPin as _embedded_hal_digital_v2_OutputPin,
-    StatefulOutputPin as _embedded_hal_digital_v2_StatefulOutputPin,
-    ToggleableOutputPin as _embedded_hal_digital_v2_ToggleableOutputPin,
+pub use e310x::interrupt::{
+    CoreInterrupt, Exception, ExceptionNumber, ExternalInterrupt, InterruptNumber, Priority,
+    PriorityNumber,
+};
+pub use embedded_hal::{
+    delay::DelayNs,
+    digital::{InputPin, OutputPin, StatefulOutputPin},
+    i2c::I2c,
+    pwm::SetDutyCycle,
+    spi::{SpiBus, SpiDevice},
+};
+
+pub use embedded_hal_nb::{
+    serial::{Read, Write},
+    spi::FullDuplex,
 };
-pub use embedded_hal::prelude::*;
diff --git a/e310x-hal/src/pwm.rs b/e310x-hal/src/pwm.rs
index 72549e0..700d19c 100644
--- a/e310x-hal/src/pwm.rs
+++ b/e310x-hal/src/pwm.rs
@@ -3,24 +3,23 @@
 //! You can use the `PWM` with these [Pwm] instances
 //!
 //! # PWM0 - 8 bit period and duty
-//! - Channel 1: Pin 9 IOF1
-//! - Channel 2: Pin 10 IOF1
-//! - Channel 3: Pin 11 IOF1
+//! - Channel 1: Pin 1 IOF1
+//! - Channel 2: Pin 2 IOF1
+//! - Channel 3: Pin 3 IOF1
 //!
 //! # PWM1 - 16 bit period and duty
-//! - Channel 1: Pin 3 IOF1
-//! - Channel 2: Pin 5 IOF1
-//! - Channel 3: Pin 6 IOF1
+//! - Channel 1: Pin 19 IOF1
+//! - Channel 2: Pin 21 IOF1
+//! - Channel 3: Pin 22 IOF1
 //!
 //! # PWM2 - 16 bit period and duty
-//! - Channel 1: Pin 17 IOF1
-//! - Channel 2: Pin 18 IOF1
-//! - Channel 3: Pin 19 IOF1
+//! - Channel 1: Pin 11 IOF1
+//! - Channel 2: Pin 12 IOF1
+//! - Channel 3: Pin 13 IOF1
 
-use core::marker::PhantomData;
 use core::ops::Deref;
-
 use e310x::{pwm0, Pwm0, Pwm1, Pwm2};
+use embedded_hal::pwm::{ErrorKind, ErrorType, SetDutyCycle};
 
 /// PWM comparator index
 #[derive(Copy, Clone)]
@@ -33,85 +32,53 @@ pub enum CmpIndex {
     Cmp3,
 }
 
-/// PWM pin - DO NOT IMPLEMENT THIS TRAIT
-pub trait Pin<PWM> {
-    #[doc(hidden)]
+/// PWM pin
+pub trait Pin<PWM: PwmX>: private::Sealed {
+    /// Channel index associated with the pin
     const CMP_INDEX: CmpIndex;
 }
 
-mod pwm0_impl {
-    use super::{CmpIndex, Pin, Pwm0};
-    use crate::gpio::{gpio0, NoInvert, IOF1};
+mod pwm_impl {
+    use super::{CmpIndex, Pin, Pwm0, Pwm1, Pwm2};
+    use crate::gpio::{gpio0, Invert, IOF1};
 
-    impl Pin<Pwm0> for gpio0::Pin1<IOF1<NoInvert>> {
+    // PWM0
+    impl Pin<Pwm0> for gpio0::Pin1<IOF1<Invert>> {
         const CMP_INDEX: CmpIndex = CmpIndex::Cmp1;
     }
-
-    impl Pin<Pwm0> for gpio0::Pin2<IOF1<NoInvert>> {
+    impl Pin<Pwm0> for gpio0::Pin2<IOF1<Invert>> {
         const CMP_INDEX: CmpIndex = CmpIndex::Cmp2;
     }
-
-    impl Pin<Pwm0> for gpio0::Pin3<IOF1<NoInvert>> {
+    impl Pin<Pwm0> for gpio0::Pin3<IOF1<Invert>> {
         const CMP_INDEX: CmpIndex = CmpIndex::Cmp3;
     }
-}
-
-mod pwm1_impl {
-    use super::{CmpIndex, Pin, Pwm1};
-    use crate::gpio::{gpio0, NoInvert, IOF1};
 
-    impl Pin<Pwm1> for gpio0::Pin19<IOF1<NoInvert>> {
+    // PWM1
+    impl Pin<Pwm1> for gpio0::Pin19<IOF1<Invert>> {
         const CMP_INDEX: CmpIndex = CmpIndex::Cmp1;
     }
-
-    impl Pin<Pwm1> for gpio0::Pin21<IOF1<NoInvert>> {
+    impl Pin<Pwm1> for gpio0::Pin21<IOF1<Invert>> {
         const CMP_INDEX: CmpIndex = CmpIndex::Cmp2;
     }
-
-    impl Pin<Pwm1> for gpio0::Pin22<IOF1<NoInvert>> {
+    impl Pin<Pwm1> for gpio0::Pin22<IOF1<Invert>> {
         const CMP_INDEX: CmpIndex = CmpIndex::Cmp3;
     }
-}
-
-mod pwm2_impl {
-    use super::{CmpIndex, Pin, Pwm2};
-    use crate::gpio::{gpio0, NoInvert, IOF1};
 
-    impl Pin<Pwm2> for gpio0::Pin11<IOF1<NoInvert>> {
+    // PWM2
+    impl Pin<Pwm2> for gpio0::Pin11<IOF1<Invert>> {
         const CMP_INDEX: CmpIndex = CmpIndex::Cmp1;
     }
-
-    impl Pin<Pwm2> for gpio0::Pin12<IOF1<NoInvert>> {
+    impl Pin<Pwm2> for gpio0::Pin12<IOF1<Invert>> {
         const CMP_INDEX: CmpIndex = CmpIndex::Cmp2;
     }
-
-    impl Pin<Pwm2> for gpio0::Pin13<IOF1<NoInvert>> {
+    impl Pin<Pwm2> for gpio0::Pin13<IOF1<Invert>> {
         const CMP_INDEX: CmpIndex = CmpIndex::Cmp3;
     }
 }
 
-/// PWM channel
-#[derive(Copy, Clone)]
-pub struct Channel<PWM> {
-    _pwm: PhantomData<PWM>,
-    cmp_index: CmpIndex,
-}
-
-impl<PWM> Channel<PWM> {
-    /// Constructs a PWM channel from a PWM pin for use with [Pwm]
-    pub fn from<PIN>(_: PIN) -> Channel<PWM>
-    where
-        PIN: Pin<PWM>,
-    {
-        Channel {
-            _pwm: PhantomData,
-            cmp_index: PIN::CMP_INDEX,
-        }
-    }
-}
-
+/// PwmX trait extends the PWM peripherals
 #[doc(hidden)]
-pub trait PwmX: Deref<Target = pwm0::RegisterBlock> {
+pub trait PwmX: Deref<Target = pwm0::RegisterBlock> + private::Sealed {
     type CmpWidth: Ord;
     fn bits_from_cmp_width(other: Self::CmpWidth) -> u32;
     fn bits_into_cmp_width(other: u32) -> Self::CmpWidth;
@@ -163,63 +130,149 @@ impl<PWM: PwmX> Pwm<PWM> {
         pwm.cmp3().reset();
         Self { pwm }
     }
-}
 
-impl<PWM: PwmX> embedded_hal::Pwm for Pwm<PWM> {
-    type Channel = Channel<PWM>;
+    /// Frees the PWM device
+    pub fn free(self) -> PWM {
+        self.pwm
+    }
 
-    type Time = PWM::CmpWidth;
+    /// Returns the period of the PWM
+    pub fn get_period(&self) -> PWM::CmpWidth {
+        PWM::bits_into_cmp_width(self.pwm.cmp0().read().bits())
+    }
+
+    /// Sets the period of the PWM
+    pub fn set_period(&mut self, period: PWM::CmpWidth) {
+        let period = PWM::bits_from_cmp_width(period);
+        self.pwm.count().reset();
+        self.pwm.cmp0().write(|w| unsafe { w.bits(period) });
+    }
 
-    type Duty = PWM::CmpWidth;
+    /// Returns the duty cycle of the PWM
+    fn get_duty(&self, cmp_index: CmpIndex) -> PWM::CmpWidth {
+        let duty = match cmp_index {
+            CmpIndex::Cmp1 => self.pwm.cmp1().read().bits(),
+            CmpIndex::Cmp2 => self.pwm.cmp2().read().bits(),
+            CmpIndex::Cmp3 => self.pwm.cmp3().read().bits(),
+        };
+        PWM::bits_into_cmp_width(duty)
+    }
 
-    fn enable(&mut self, channel: Self::Channel) {
-        match channel.cmp_index {
+    /// Sets the duty cycle of the PWM
+    fn set_duty(&self, cmp_index: CmpIndex, duty: PWM::CmpWidth) {
+        let duty = PWM::bits_from_cmp_width(duty.min(self.get_period()));
+        match cmp_index {
+            CmpIndex::Cmp1 => self.pwm.cmp1().write(|w| unsafe { w.bits(duty) }),
+            CmpIndex::Cmp2 => self.pwm.cmp2().write(|w| unsafe { w.bits(duty) }),
+            CmpIndex::Cmp3 => self.pwm.cmp3().write(|w| unsafe { w.bits(duty) }),
+        }
+    }
+
+    /// Enables the PWM channel
+    fn enable(&self, cmp_index: CmpIndex) {
+        match cmp_index {
             CmpIndex::Cmp1 => self.pwm.cmp1().write(|w| unsafe { w.bits(u32::MAX) }),
             CmpIndex::Cmp2 => self.pwm.cmp2().write(|w| unsafe { w.bits(u32::MAX) }),
             CmpIndex::Cmp3 => self.pwm.cmp3().write(|w| unsafe { w.bits(u32::MAX) }),
         }
     }
 
-    fn disable(&mut self, channel: Self::Channel) {
-        match channel.cmp_index {
+    /// Disables the PWM channel
+    fn disable(&self, cmp_index: CmpIndex) {
+        match cmp_index {
             CmpIndex::Cmp1 => self.pwm.cmp1().reset(),
             CmpIndex::Cmp2 => self.pwm.cmp2().reset(),
             CmpIndex::Cmp3 => self.pwm.cmp3().reset(),
         }
     }
 
-    fn get_period(&self) -> Self::Time {
-        PWM::bits_into_cmp_width(self.pwm.cmp0().read().bits())
+    /// Returns the PWM channel associated with the given index
+    pub fn channel<PIN: Pin<PWM>>(&self, pin: PIN) -> Channel<'_, PWM, PIN> {
+        Channel { pwm: self, pin }
     }
+}
 
-    fn get_duty(&self, channel: Self::Channel) -> Self::Duty {
-        let duty = match channel.cmp_index {
-            CmpIndex::Cmp1 => self.pwm.cmp1().read().bits(),
-            CmpIndex::Cmp2 => self.pwm.cmp2().read().bits(),
-            CmpIndex::Cmp3 => self.pwm.cmp3().read().bits(),
-        };
-        PWM::bits_into_cmp_width(duty)
+/// PWM channel
+pub struct Channel<'a, PWM, PIN> {
+    pwm: &'a Pwm<PWM>,
+    pin: PIN,
+}
+
+impl<'a, PWM, PIN> Channel<'a, PWM, PIN> {
+    /// Frees the PWM channel
+    pub fn free(self) -> PIN {
+        self.pin
     }
+}
 
-    fn get_max_duty(&self) -> Self::Duty {
-        self.get_period()
+impl<'a, PWM: PwmX, PIN: Pin<PWM>> Channel<'a, PWM, PIN> {
+    /// Returns the period of the PWM
+    pub fn get_period(&self) -> PWM::CmpWidth {
+        self.pwm.get_period()
     }
 
-    fn set_duty(&mut self, channel: Self::Channel, duty: Self::Duty) {
-        let duty = PWM::bits_from_cmp_width(duty.min(self.get_max_duty()));
-        match channel.cmp_index {
-            CmpIndex::Cmp1 => self.pwm.cmp1().write(|w| unsafe { w.bits(duty) }),
-            CmpIndex::Cmp2 => self.pwm.cmp2().write(|w| unsafe { w.bits(duty) }),
-            CmpIndex::Cmp3 => self.pwm.cmp3().write(|w| unsafe { w.bits(duty) }),
-        }
+    /// Returns the maximum duty cycle of the PWM (equal to the period)
+    pub fn max_duty(&self) -> PWM::CmpWidth {
+        self.pwm.get_period()
     }
 
-    fn set_period<P>(&mut self, period: P)
-    where
-        P: Into<Self::Time>,
-    {
-        let period = PWM::bits_from_cmp_width(period.into());
-        self.pwm.count().reset();
-        self.pwm.cmp0().write(|w| unsafe { w.bits(period) });
+    /// Returns the duty cycle of the PWM
+    pub fn get_duty(&self) -> PWM::CmpWidth {
+        self.pwm.get_duty(PIN::CMP_INDEX)
     }
+
+    /// Sets the duty cycle to 100%
+    pub fn enable(&mut self) {
+        self.pwm.enable(PIN::CMP_INDEX);
+    }
+
+    /// Sets the duty cycle to 0%
+    pub fn disable(&mut self) {
+        self.pwm.disable(PIN::CMP_INDEX);
+    }
+
+    /// Sets the duty cycle of the PWM
+    pub fn set_duty(&mut self, duty: PWM::CmpWidth) {
+        self.pwm.set_duty(PIN::CMP_INDEX, duty);
+    }
+}
+
+impl<'a, PWM: PwmX, PIN: Pin<PWM>> ErrorType for Channel<'a, PWM, PIN> {
+    type Error = ErrorKind;
+}
+
+impl<'a, PWM: PwmX, PIN: Pin<PWM>> SetDutyCycle for Channel<'a, PWM, PIN> {
+    fn max_duty_cycle(&self) -> u16 {
+        PWM::bits_from_cmp_width(self.max_duty()) as _
+    }
+
+    fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
+        self.pwm
+            .set_duty(PIN::CMP_INDEX, PWM::bits_into_cmp_width(duty as _));
+        Ok(())
+    }
+}
+
+mod private {
+    use super::{Pwm0, Pwm1, Pwm2};
+    use crate::gpio::{gpio0, Invert, IOF1};
+    pub trait Sealed {}
+
+    // PWM0
+    impl Sealed for Pwm0 {}
+    impl Sealed for gpio0::Pin1<IOF1<Invert>> {}
+    impl Sealed for gpio0::Pin2<IOF1<Invert>> {}
+    impl Sealed for gpio0::Pin3<IOF1<Invert>> {}
+
+    // PWM1
+    impl Sealed for Pwm1 {}
+    impl Sealed for gpio0::Pin19<IOF1<Invert>> {}
+    impl Sealed for gpio0::Pin21<IOF1<Invert>> {}
+    impl Sealed for gpio0::Pin22<IOF1<Invert>> {}
+
+    // PWM2
+    impl Sealed for Pwm2 {}
+    impl Sealed for gpio0::Pin11<IOF1<Invert>> {}
+    impl Sealed for gpio0::Pin12<IOF1<Invert>> {}
+    impl Sealed for gpio0::Pin13<IOF1<Invert>> {}
 }
diff --git a/e310x-hal/src/serial.rs b/e310x-hal/src/serial.rs
index 5e5029e..1ad8d27 100644
--- a/e310x-hal/src/serial.rs
+++ b/e310x-hal/src/serial.rs
@@ -13,63 +13,131 @@
 //! - RX: Pin 23 IOF0
 //! - Interrupt::UART1
 
-use core::convert::Infallible;
 use core::ops::Deref;
-
-use embedded_hal::serial;
+use e310x::{uart0, Uart0, Uart1};
+use embedded_hal_nb::serial::{ErrorKind, ErrorType, Read, Write};
 use nb;
 
-use crate::clock::Clocks;
-use crate::gpio::{gpio0, IOF0};
-use crate::time::Bps;
-use core::mem;
-#[allow(unused_imports)]
-use e310x::{uart0, Uart0, Uart1};
+use crate::{clock::Clocks, time::Bps};
 
-mod sealed {
-    /// TX pin
-    pub trait TxPin<UART> {}
+/// TX pin
+pub trait TxPin<UART>: private::Sealed {}
 
-    /// RX pin
-    pub trait RxPin<UART> {}
-}
+/// RX pin
+pub trait RxPin<UART>: private::Sealed {}
 
-impl<T> sealed::TxPin<Uart0> for gpio0::Pin17<IOF0<T>> {}
-impl<T> sealed::RxPin<Uart0> for gpio0::Pin16<IOF0<T>> {}
+/// UartX trait extends the UART peripheral
+pub trait UartX: Deref<Target = uart0::RegisterBlock> + private::Sealed {
+    /// Steals the UART peripheral
+    ///
+    /// # Safety
+    ///
+    /// Using this function may break the guarantees of the singleton pattern.
+    unsafe fn steal() -> Self;
+}
 
-#[cfg(feature = "g002")]
-impl<T> sealed::TxPin<Uart1> for gpio0::Pin18<IOF0<T>> {}
-#[cfg(feature = "g002")]
-impl<T> sealed::RxPin<Uart1> for gpio0::Pin23<IOF0<T>> {}
+mod impl_uart {
+    use super::{RxPin, TxPin, Uart0, Uart1, UartX};
+    use crate::gpio::{gpio0, IOF0};
+    // UART0
+    impl UartX for Uart0 {
+        unsafe fn steal() -> Self {
+            Uart0::steal()
+        }
+    }
+    impl<T> TxPin<Uart0> for gpio0::Pin17<IOF0<T>> {}
+    impl<T> RxPin<Uart0> for gpio0::Pin16<IOF0<T>> {}
 
-#[doc(hidden)]
-pub trait UartX: Deref<Target = uart0::RegisterBlock> {}
-impl UartX for Uart0 {}
-impl UartX for Uart1 {}
+    // UART1
+    impl UartX for Uart1 {
+        unsafe fn steal() -> Self {
+            Uart1::steal()
+        }
+    }
+    #[cfg(feature = "g002")]
+    impl<T> TxPin<Uart1> for gpio0::Pin18<IOF0<T>> {}
+    #[cfg(feature = "g002")]
+    impl<T> RxPin<Uart1> for gpio0::Pin23<IOF0<T>> {}
+}
 
-/// Serial abstraction
-pub struct Serial<UART, PINS> {
+/// Serial receiver half
+pub struct Rx<UART, PIN> {
     uart: UART,
-    pins: PINS,
+    pin: PIN,
+}
+
+impl<UART, PIN> Rx<UART, PIN> {
+    /// Releases the UART peripheral and associated pin
+    pub fn free(self) -> (UART, PIN) {
+        (self.uart, self.pin)
+    }
+}
+
+impl<UART: UartX, PIN: RxPin<UART>> ErrorType for Rx<UART, PIN> {
+    type Error = ErrorKind;
+}
+
+impl<UART: UartX, PIN: RxPin<UART>> Read for Rx<UART, PIN> {
+    fn read(&mut self) -> nb::Result<u8, ErrorKind> {
+        let rxdata = self.uart.rxdata().read();
+
+        if rxdata.empty().bit_is_set() {
+            Err(::nb::Error::WouldBlock)
+        } else {
+            Ok(rxdata.data().bits())
+        }
+    }
 }
 
-/// Serial receiver
-pub struct Rx<UART> {
+/// Serial transmitter half
+pub struct Tx<UART, PIN> {
     uart: UART,
+    pin: PIN,
+}
+
+impl<UART, PIN> Tx<UART, PIN> {
+    /// Releases the UART peripheral and associated pin
+    pub fn free(self) -> (UART, PIN) {
+        (self.uart, self.pin)
+    }
+}
+
+impl<UART: UartX, PIN: TxPin<UART>> ErrorType for Tx<UART, PIN> {
+    type Error = ErrorKind;
+}
+
+impl<UART: UartX, PIN: TxPin<UART>> Write for Tx<UART, PIN> {
+    fn write(&mut self, byte: u8) -> nb::Result<(), ErrorKind> {
+        let txdata = self.uart.txdata().read();
+
+        if txdata.full().bit_is_set() {
+            Err(::nb::Error::WouldBlock)
+        } else {
+            self.uart.txdata().write(|w| unsafe { w.data().bits(byte) });
+            Ok(())
+        }
+    }
+
+    fn flush(&mut self) -> nb::Result<(), ErrorKind> {
+        if self.uart.ip().read().txwm().bit_is_set() {
+            // FIFO count is below the receive watermark (1)
+            Ok(())
+        } else {
+            Err(nb::Error::WouldBlock)
+        }
+    }
 }
 
-/// Serial transmitter
-pub struct Tx<UART> {
+/// Serial abstraction
+pub struct Serial<UART, TX, RX> {
     uart: UART,
+    tx: Tx<UART, TX>,
+    rx: Rx<UART, RX>,
 }
 
-impl<UART: UartX, TX, RX> Serial<UART, (TX, RX)> {
+impl<UART: UartX, TX: TxPin<UART>, RX: RxPin<UART>> Serial<UART, TX, RX> {
     /// Configures a UART peripheral to provide serial communication
-    pub fn new(uart: UART, pins: (TX, RX), baud_rate: Bps, clocks: Clocks) -> Self
-    where
-        TX: sealed::TxPin<UART>,
-        RX: sealed::RxPin<UART>,
-    {
+    pub fn new(uart: UART, pins: (TX, RX), baud_rate: Bps, clocks: Clocks) -> Self {
         let div = clocks.tlclk().0 / baud_rate.0 - 1;
         unsafe {
             uart.ie().write(|w| w.txwm().bit(false).rxwm().bit(false));
@@ -79,7 +147,16 @@ impl<UART: UartX, TX, RX> Serial<UART, (TX, RX)> {
             uart.rxctrl().write(|w| w.enable().bit(true));
         }
 
-        Serial { uart, pins }
+        let tx = Tx {
+            uart: unsafe { UART::steal() },
+            pin: pins.0,
+        };
+        let rx = Rx {
+            uart: unsafe { UART::steal() },
+            pin: pins.1,
+        };
+
+        Serial { uart, tx, rx }
     }
 
     /// Starts listening for an interrupt event
@@ -98,85 +175,51 @@ impl<UART: UartX, TX, RX> Serial<UART, (TX, RX)> {
         self
     }
 
-    /// Splits the `Serial` abstraction into a transmitter and a
-    /// receiver half
-    pub fn split(self) -> (Tx<UART>, Rx<UART>) {
-        (
-            Tx {
-                uart: unsafe { mem::zeroed() },
-            },
-            Rx { uart: self.uart },
-        )
+    /// Splits the [`Serial`] abstraction into a transmitter and a receiver half
+    pub fn split(self) -> (Tx<UART, TX>, Rx<UART, RX>) {
+        (self.tx, self.rx)
     }
 
     /// Releases the UART peripheral and associated pins
     pub fn free(self) -> (UART, (TX, RX)) {
-        (self.uart, self.pins)
+        (self.uart, (self.tx.pin, self.rx.pin))
     }
 }
 
-impl<UART: UartX> serial::Read<u8> for Rx<UART> {
-    type Error = Infallible;
-
-    fn read(&mut self) -> nb::Result<u8, Infallible> {
-        let rxdata = self.uart.rxdata().read();
+impl<UART, TX, RX> ErrorType for Serial<UART, TX, RX> {
+    type Error = ErrorKind;
+}
 
-        if rxdata.empty().bit_is_set() {
-            Err(::nb::Error::WouldBlock)
-        } else {
-            Ok(rxdata.data().bits())
-        }
+impl<UART: UartX, TX, RX: RxPin<UART>> Read for Serial<UART, TX, RX> {
+    fn read(&mut self) -> nb::Result<u8, ErrorKind> {
+        self.rx.read()
     }
 }
 
-impl<UART: UartX> serial::Write<u8> for Tx<UART> {
-    type Error = Infallible;
-
-    fn write(&mut self, byte: u8) -> nb::Result<(), Infallible> {
-        let txdata = self.uart.txdata().read();
-
-        if txdata.full().bit_is_set() {
-            Err(::nb::Error::WouldBlock)
-        } else {
-            unsafe {
-                self.uart.txdata().write(|w| w.data().bits(byte));
-            }
-            Ok(())
-        }
+impl<UART: UartX, TX: TxPin<UART>, RX> Write for Serial<UART, TX, RX> {
+    fn write(&mut self, byte: u8) -> nb::Result<(), ErrorKind> {
+        self.tx.write(byte)
     }
 
-    fn flush(&mut self) -> nb::Result<(), Infallible> {
-        if self.uart.ip().read().txwm().bit_is_set() {
-            // FIFO count is below the receive watermark (1)
-            Ok(())
-        } else {
-            Err(nb::Error::WouldBlock)
-        }
+    fn flush(&mut self) -> nb::Result<(), ErrorKind> {
+        self.tx.flush()
     }
 }
 
-// Backward compatibility
-impl<TX, RX> Serial<Uart0, (TX, RX)> {
-    /// Configures a UART peripheral to provide serial communication
-    #[deprecated(note = "Please use Serial::new function instead")]
-    pub fn uart0(uart: Uart0, pins: (TX, RX), baud_rate: Bps, clocks: Clocks) -> Self
-    where
-        TX: sealed::TxPin<Uart0>,
-        RX: sealed::RxPin<Uart0>,
-    {
-        Self::new(uart, pins, baud_rate, clocks)
-    }
-}
+// seal the "private" traits
+mod private {
+    use crate::gpio::{gpio0, IOF0};
+    use e310x::{Uart0, Uart1};
 
-#[cfg(feature = "g002")]
-impl<TX, RX> Serial<Uart1, (TX, RX)> {
-    /// Configures a UART peripheral to provide serial communication
-    #[deprecated(note = "Please use Serial::new function instead")]
-    pub fn uart1(uart: Uart1, pins: (TX, RX), baud_rate: Bps, clocks: Clocks) -> Self
-    where
-        TX: sealed::TxPin<Uart1>,
-        RX: sealed::RxPin<Uart1>,
-    {
-        Self::new(uart, pins, baud_rate, clocks)
-    }
+    pub trait Sealed {}
+
+    impl Sealed for Uart0 {}
+    impl<T> Sealed for gpio0::Pin17<IOF0<T>> {}
+    impl<T> Sealed for gpio0::Pin16<IOF0<T>> {}
+
+    impl Sealed for Uart1 {}
+    #[cfg(feature = "g002")]
+    impl<T> Sealed for gpio0::Pin18<IOF0<T>> {}
+    #[cfg(feature = "g002")]
+    impl<T> Sealed for gpio0::Pin23<IOF0<T>> {}
 }
diff --git a/e310x-hal/src/spi/bus.rs b/e310x-hal/src/spi/bus.rs
index 3543244..fe70707 100644
--- a/e310x-hal/src/spi/bus.rs
+++ b/e310x-hal/src/spi/bus.rs
@@ -1,40 +1,91 @@
-use core::convert::Infallible;
-use embedded_hal::blocking::spi::Operation;
-pub use embedded_hal::blocking::spi::{Transfer, Write, WriteIter};
-pub use embedded_hal::spi::{FullDuplex, Phase, Polarity};
+use embedded_hal::spi::{self, ErrorKind, ErrorType, Phase, Polarity};
+use embedded_hal_nb::spi::FullDuplex;
 
-use nb;
+use super::{Pins, PinsFull, PinsNoCS, SharedBus, SpiConfig, SpiExclusiveDevice, SpiX};
 
-use super::{Pins, PinsNoCS, SharedBus, SpiConfig, SpiExclusiveDevice, SpiX};
+const EMPTY_WRITE_PAD: u8 = 0x00;
 
 /// SPI bus abstraction
 pub struct SpiBus<SPI, PINS> {
-    pub(crate) spi: SPI,
-    pub(crate) pins: PINS,
+    spi: SPI,
+    pins: PINS,
 }
 
-impl<SPI, PINS> SpiBus<SPI, PINS>
-where
-    SPI: SpiX,
-{
-    /// Construct the [SpiBus] for use with [SpiSharedDevice](super::SpiSharedDevice) or [SpiExclusiveDevice]
-    pub fn new(spi: SPI, pins: PINS) -> Self
-    where
-        PINS: Pins<SPI>,
-    {
-        Self { spi, pins }
-    }
-
+impl<SPI, PINS> SpiBus<SPI, PINS> {
     /// Releases the SPI peripheral and associated pins
     pub fn release(self) -> (SPI, PINS) {
         (self.spi, self.pins)
     }
+}
+
+impl<SPI: SpiX, PINS> SpiBus<SPI, PINS> {
+    /// Starts frame by flagging CS assert, unless CSMODE = OFF
+    pub(crate) fn start_frame(&mut self) {
+        if !self.spi.csmode().read().mode().is_off() {
+            self.spi.csmode().write(|w| w.mode().hold());
+        }
+    }
+
+    /// Finishes frame flagging CS deassert, unless CSMODE = OFF
+    pub(crate) fn end_frame(&mut self) {
+        if !self.spi.csmode().read().mode().is_off() {
+            self.spi.csmode().write(|w| w.mode().auto());
+        }
+    }
+
+    /// Read a single byte from the SPI bus.
+    ///
+    /// This function will return `nb::Error::WouldBlock` if the RX FIFO is empty.
+    fn read_input(&self) -> nb::Result<u8, ErrorKind> {
+        let rxdata = self.spi.rxdata().read();
+        if rxdata.empty().bit_is_set() {
+            Err(nb::Error::WouldBlock)
+        } else {
+            Ok(rxdata.data().bits())
+        }
+    }
+
+    /// Write a single byte to the SPI bus.
+    ///
+    /// This function will return `nb::Error::WouldBlock` if the TX FIFO is full.
+    fn write_output(&self, word: u8) -> nb::Result<(), ErrorKind> {
+        if self.spi.txdata().read().full().bit_is_set() {
+            Err(nb::Error::WouldBlock)
+        } else {
+            self.spi.txdata().write(|w| unsafe { w.data().bits(word) });
+            Ok(())
+        }
+    }
+
+    /// Wait for RX FIFO to be empty
+    ///
+    /// # Note
+    ///
+    /// Data in the RX FIFO (if any) will be lost.
+    fn wait_for_rxfifo(&self) {
+        // Ensure that RX FIFO is empty
+        while self.read_input().is_ok() {}
+    }
+}
+
+impl<SPI: SpiX, PINS: Pins<SPI>> SpiBus<SPI, PINS> {
+    /// Construct the [`SpiBus`] for use with [`SpiSharedDevice`](super::SpiSharedDevice)
+    /// or [`SpiExclusiveDevice`]
+    pub fn new(spi: SPI, pins: PINS) -> Self {
+        Self { spi, pins }
+    }
+
+    /// Create a new [`SpiExclusiveDevice`] for exclusive use on this bus
+    pub fn new_device(self, config: &SpiConfig) -> SpiExclusiveDevice<SPI, PINS> {
+        SpiExclusiveDevice::new(self, config)
+    }
 
-    /// Configure the [SpiBus] with given [SpiConfig]
-    pub(crate) fn configure(&mut self, config: &SpiConfig, cs_index: Option<u32>)
-    where
-        PINS: Pins<SPI>,
-    {
+    /// Configure the [`SpiBus`] with given [`SpiConfig`]
+    ///
+    /// # Safety
+    ///
+    /// The provided CS index must be valid for the given SPI peripheral.
+    pub(crate) unsafe fn configure(&mut self, config: &SpiConfig, cs_index: Option<u32>) {
         self.spi
             .sckdiv()
             .write(|w| unsafe { w.div().bits(config.clock_divisor as u16) });
@@ -83,50 +134,33 @@ where
 
         self.end_frame(); // ensure CS is de-asserted before we begin
     }
+}
 
-    fn wait_for_rxfifo(&self) {
-        // Ensure that RX FIFO is empty
-        while self.spi.rxdata().read().empty().bit_is_clear() {}
-    }
-
-    /// Starts frame by flagging CS assert, unless CSMODE = OFF
-    pub(crate) fn start_frame(&mut self) {
-        if !self.spi.csmode().read().mode().is_off() {
-            self.spi.csmode().write(|w| w.mode().hold());
-        }
-    }
-
-    /// Finishes frame flagging CS deassert, unless CSMODE = OFF
-    pub(crate) fn end_frame(&mut self) {
-        if !self.spi.csmode().read().mode().is_off() {
-            self.spi.csmode().write(|w| w.mode().auto());
-        }
+impl<SPI: SpiX, PINS: PinsNoCS<SPI>> SpiBus<SPI, PINS> {
+    /// Create a [`SharedBus`] for use with multiple devices.
+    pub fn shared(spi: SPI, pins: PINS) -> SharedBus<SPI, PINS> {
+        SharedBus::new(Self::new(spi, pins))
     }
+}
 
-    // ex-traits now only accessible via devices
-
-    pub(crate) fn read(&mut self) -> nb::Result<u8, Infallible> {
-        let rxdata = self.spi.rxdata().read();
+impl<SPI: SpiX, PINS> ErrorType for SpiBus<SPI, PINS> {
+    type Error = ErrorKind;
+}
 
-        if rxdata.empty().bit_is_set() {
-            Err(nb::Error::WouldBlock)
-        } else {
-            Ok(rxdata.data().bits())
-        }
+impl<SPI: SpiX, PINS: Pins<SPI>> FullDuplex for SpiBus<SPI, PINS> {
+    fn read(&mut self) -> nb::Result<u8, Self::Error> {
+        self.read_input()
     }
 
-    pub(crate) fn send(&mut self, byte: u8) -> nb::Result<(), Infallible> {
-        let txdata = self.spi.txdata().read();
-
-        if txdata.full().bit_is_set() {
-            Err(nb::Error::WouldBlock)
-        } else {
-            self.spi.txdata().write(|w| unsafe { w.data().bits(byte) });
-            Ok(())
-        }
+    fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
+        self.write_output(word)
     }
+}
 
-    pub(crate) fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Infallible> {
+// The embedded_hal::spi::SpiBus trait can only be implemented for pin tuples
+// with full ownership of the SPI bus, including MOSI, MISO, and SCK pins.
+impl<SPI: SpiX, PINS: PinsFull<SPI>> spi::SpiBus for SpiBus<SPI, PINS> {
+    fn read(&mut self, words: &mut [u8]) -> Result<(), Self::Error> {
         let mut iwrite = 0;
         let mut iread = 0;
 
@@ -134,25 +168,28 @@ where
         self.wait_for_rxfifo();
 
         while iwrite < words.len() || iread < words.len() {
-            if iwrite < words.len() && self.spi.txdata().read().full().bit_is_clear() {
-                let byte = unsafe { words.get_unchecked(iwrite) };
-                iwrite += 1;
-                self.spi.txdata().write(|w| unsafe { w.data().bits(*byte) });
+            if iwrite < words.len() {
+                match self.write_output(EMPTY_WRITE_PAD) {
+                    Ok(()) => iwrite += 1,
+                    Err(nb::Error::WouldBlock) => {}
+                    Err(nb::Error::Other(e)) => return Err(e),
+                }
             }
-
             if iread < iwrite {
-                let data = self.spi.rxdata().read();
-                if data.empty().bit_is_clear() {
-                    unsafe { *words.get_unchecked_mut(iread) = data.data().bits() };
-                    iread += 1;
+                match self.read_input() {
+                    Ok(data) => {
+                        unsafe { *words.get_unchecked_mut(iread) = data };
+                        iread += 1;
+                    }
+                    Err(nb::Error::WouldBlock) => {}
+                    Err(nb::Error::Other(e)) => return Err(e),
                 }
             }
         }
-
-        Ok(words)
+        Ok(())
     }
 
-    pub(crate) fn write(&mut self, words: &[u8]) -> Result<(), Infallible> {
+    fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
         let mut iwrite = 0;
         let mut iread = 0;
 
@@ -160,90 +197,91 @@ where
         self.wait_for_rxfifo();
 
         while iwrite < words.len() || iread < words.len() {
-            if iwrite < words.len() && self.spi.txdata().read().full().bit_is_clear() {
+            if iwrite < words.len() {
                 let byte = unsafe { words.get_unchecked(iwrite) };
-                iwrite += 1;
-                self.spi.txdata().write(|w| unsafe { w.data().bits(*byte) });
+                match self.write_output(*byte) {
+                    Ok(()) => iwrite += 1,
+                    Err(nb::Error::WouldBlock) => {}
+                    Err(nb::Error::Other(e)) => return Err(e),
+                }
             }
-
             if iread < iwrite {
-                // Read and discard byte, if any
-                if self.spi.rxdata().read().empty().bit_is_clear() {
-                    iread += 1;
+                match self.read_input() {
+                    Ok(_) => iread += 1,
+                    Err(nb::Error::WouldBlock) => {}
+                    Err(nb::Error::Other(e)) => return Err(e),
                 }
             }
         }
-
         Ok(())
     }
 
-    pub(crate) fn write_iter<WI>(&mut self, words: WI) -> Result<(), Infallible>
-    where
-        WI: IntoIterator<Item = u8>,
-    {
-        let mut iter = words.into_iter();
-
-        let mut read_count = 0;
-        let mut has_data = true;
+    fn transfer(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Self::Error> {
+        let mut iwrite = 0;
+        let mut iread = 0;
+        let max_len = read.len().max(write.len());
 
         // Ensure that RX FIFO is empty
         self.wait_for_rxfifo();
 
-        while has_data || read_count > 0 {
-            if has_data && self.spi.txdata().read().full().bit_is_clear() {
-                if let Some(byte) = iter.next() {
-                    self.spi.txdata().write(|w| unsafe { w.data().bits(byte) });
-                    read_count += 1;
-                } else {
-                    has_data = false;
+        while iwrite < max_len || iread < max_len {
+            if iwrite < max_len {
+                let byte = write.get(iwrite).unwrap_or(&EMPTY_WRITE_PAD);
+                match self.write_output(*byte) {
+                    Ok(()) => iwrite += 1,
+                    Err(nb::Error::WouldBlock) => {}
+                    Err(nb::Error::Other(e)) => return Err(e),
                 }
             }
-
-            if read_count > 0 {
-                // Read and discard byte, if any
-                if self.spi.rxdata().read().empty().bit_is_clear() {
-                    read_count -= 1;
+            if iread < iwrite {
+                match self.read_input() {
+                    Ok(data) => {
+                        if let Some(byte) = read.get_mut(iread) {
+                            *byte = data;
+                        }
+                        iread += 1;
+                    }
+                    Err(nb::Error::WouldBlock) => {}
+                    Err(nb::Error::Other(e)) => return Err(e),
                 }
             }
         }
-
         Ok(())
     }
 
-    pub(crate) fn exec(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Infallible> {
-        for op in operations {
-            match op {
-                Operation::Transfer(words) => {
-                    self.transfer(words)?;
+    fn transfer_in_place(&mut self, words: &mut [u8]) -> Result<(), Self::Error> {
+        let mut iwrite = 0;
+        let mut iread = 0;
+
+        // Ensure that RX FIFO is empty
+        self.wait_for_rxfifo();
+
+        while iwrite < words.len() || iread < words.len() {
+            if iwrite < words.len() {
+                let byte = unsafe { words.get_unchecked(iwrite) };
+                match self.write_output(*byte) {
+                    Ok(()) => iwrite += 1,
+                    Err(nb::Error::WouldBlock) => {}
+                    Err(nb::Error::Other(e)) => return Err(e),
                 }
-                Operation::Write(words) => {
-                    self.write(words)?;
+            }
+            if iread < iwrite {
+                match self.read_input() {
+                    Ok(data) => {
+                        unsafe { *words.get_unchecked_mut(iread) = data };
+                        iread += 1;
+                    }
+                    Err(nb::Error::WouldBlock) => {}
+                    Err(nb::Error::Other(e)) => return Err(e),
                 }
             }
         }
 
         Ok(())
     }
-}
 
-impl<SPI, PINS> SpiBus<SPI, PINS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
-{
-    /// Create a new [SpiExclusiveDevice] for exclusive use on this bus
-    pub fn new_device(self, config: &SpiConfig) -> SpiExclusiveDevice<SPI, PINS> {
-        SpiExclusiveDevice::new(self, config)
-    }
-}
-
-impl<SPI, PINS> SpiBus<SPI, PINS>
-where
-    SPI: SpiX,
-    PINS: PinsNoCS<SPI>,
-{
-    /// Create a [SharedBus] for use with multiple devices.
-    pub fn shared(spi: SPI, pins: PINS) -> SharedBus<SPI, PINS> {
-        SharedBus::new(Self::new(spi, pins))
+    fn flush(&mut self) -> Result<(), Self::Error> {
+        self.wait_for_rxfifo(); // TODO anything else to do here?
+        Ok(())
     }
 }
diff --git a/e310x-hal/src/spi/config.rs b/e310x-hal/src/spi/config.rs
index 61a9e8d..0323a8b 100644
--- a/e310x-hal/src/spi/config.rs
+++ b/e310x-hal/src/spi/config.rs
@@ -1,4 +1,4 @@
-use e310x::qspi0::csmode::Mode as MODE_A;
+use e310x::qspi0::csmode::Mode as CsMode;
 use embedded_hal::spi::Mode;
 
 use crate::{clock::Clocks, time::Hertz};
@@ -13,7 +13,7 @@ pub struct SpiConfig {
     /// Clock Divisor calculated from frozen core clock frequency and SPI frequency
     pub(crate) clock_divisor: u32,
     /// CS Mode
-    pub cs_mode: MODE_A,
+    pub cs_mode: CsMode,
     /// Watermark level for transmits
     pub txmark: u8,
     /// Watermark level for received
@@ -44,7 +44,7 @@ impl SpiConfig {
         Self {
             mode,
             clock_divisor,
-            cs_mode: MODE_A::Hold,
+            cs_mode: CsMode::Hold,
             txmark: 1,
             rxmark: 0,
             delays: SpiDelayConfig::default(),
diff --git a/e310x-hal/src/spi/exclusive_device.rs b/e310x-hal/src/spi/exclusive_device.rs
index 50e01db..76782fa 100644
--- a/e310x-hal/src/spi/exclusive_device.rs
+++ b/e310x-hal/src/spi/exclusive_device.rs
@@ -1,31 +1,19 @@
-use core::convert::Infallible;
-
-use embedded_hal::{
-    blocking::spi::{Operation, Transactional, Transfer, Write, WriteIter},
-    spi::FullDuplex,
-};
+use embedded_hal::spi::{ErrorKind, ErrorType, Operation, SpiBus, SpiDevice};
 
 use crate::spi::SpiConfig;
 
-use super::{Pins, SpiBus, SpiX};
+use super::{Pins, PinsFull, SpiBus as Bus, SpiX};
 
 /// SPI exclusive device abstraction
 pub struct SpiExclusiveDevice<SPI, PINS> {
-    bus: SpiBus<SPI, PINS>,
+    bus: Bus<SPI, PINS>,
 }
 
-impl<SPI, PINS> SpiExclusiveDevice<SPI, PINS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
-{
-    /// Create [SpiExclusiveDevice] using the existing [SpiBus](super::SpiBus)
-    /// with the given [SpiConfig]
-    pub fn new(mut bus: SpiBus<SPI, PINS>, config: &SpiConfig) -> Self
-    where
-        PINS: Pins<SPI>,
-    {
-        bus.configure(config, PINS::CS_INDEX);
+impl<SPI: SpiX, PINS: Pins<SPI>> SpiExclusiveDevice<SPI, PINS> {
+    /// Create [`SpiExclusiveDevice`] using existing [`SpiBus`](Bus) with the given [`SpiConfig`]
+    pub fn new(mut bus: Bus<SPI, PINS>, config: &SpiConfig) -> Self {
+        // Safety: valid CS index
+        unsafe { bus.configure(config, PINS::CS_INDEX) };
 
         Self { bus }
     }
@@ -36,85 +24,32 @@ where
     }
 }
 
-impl<SPI, PINS> FullDuplex<u8> for SpiExclusiveDevice<SPI, PINS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
-{
-    type Error = Infallible;
-
-    fn read(&mut self) -> nb::Result<u8, Infallible> {
-        self.bus.read()
-    }
-
-    fn send(&mut self, byte: u8) -> nb::Result<(), Infallible> {
-        self.bus.send(byte)
-    }
+impl<SPI: SpiX, PINS: Pins<SPI>> ErrorType for SpiExclusiveDevice<SPI, PINS> {
+    type Error = ErrorKind;
 }
 
-impl<SPI, PINS> Transfer<u8> for SpiExclusiveDevice<SPI, PINS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
-{
-    type Error = Infallible;
-
-    fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
+impl<SPI: SpiX, PINS: PinsFull<SPI>> SpiDevice for SpiExclusiveDevice<SPI, PINS> {
+    fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> {
         self.bus.start_frame();
-        let result = self.bus.transfer(words);
-        self.bus.end_frame();
 
-        result
-    }
-}
-
-impl<SPI, PINS> Write<u8> for SpiExclusiveDevice<SPI, PINS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
-{
-    type Error = Infallible;
-
-    fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
-        self.bus.start_frame();
-        let result = self.bus.write(words);
+        let mut res = Ok(());
+        for operation in operations.iter_mut() {
+            res = match operation {
+                Operation::Read(read) => self.bus.read(read),
+                Operation::Write(write) => self.bus.write(write),
+                Operation::Transfer(read, write) => self.bus.transfer(read, write),
+                Operation::TransferInPlace(read_write) => self.bus.transfer_in_place(read_write),
+                Operation::DelayNs(_ns) => todo!(),
+            };
+            if res.is_err() {
+                break;
+            }
+        }
+
+        if res.is_ok() {
+            self.bus.flush()?;
+        }
         self.bus.end_frame();
-
-        result
-    }
-}
-
-impl<SPI, PINS> WriteIter<u8> for SpiExclusiveDevice<SPI, PINS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
-{
-    type Error = Infallible;
-
-    fn write_iter<WI>(&mut self, words: WI) -> Result<(), Self::Error>
-    where
-        WI: IntoIterator<Item = u8>,
-    {
-        self.bus.start_frame();
-        let result = self.bus.write_iter(words);
-        self.bus.end_frame();
-
-        result
-    }
-}
-
-impl<SPI, PINS> Transactional<u8> for SpiExclusiveDevice<SPI, PINS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
-{
-    type Error = Infallible;
-
-    fn exec(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Infallible> {
-        self.bus.start_frame();
-        let result = self.bus.exec(operations);
-        self.bus.end_frame();
-
-        result
+        res
     }
 }
diff --git a/e310x-hal/src/spi/shared_bus.rs b/e310x-hal/src/spi/shared_bus.rs
index 6c75ebd..e95790c 100644
--- a/e310x-hal/src/spi/shared_bus.rs
+++ b/e310x-hal/src/spi/shared_bus.rs
@@ -53,9 +53,7 @@ where
 
     /// Releases the SPI peripheral and associated pins
     pub fn release(self) -> (SPI, PINS) {
-        let bus = self.0.into_inner();
-
-        (bus.spi, bus.pins)
+        self.0.into_inner().release()
     }
 }
 
diff --git a/e310x-hal/src/spi/shared_device.rs b/e310x-hal/src/spi/shared_device.rs
index 4612ca7..d22d4b2 100644
--- a/e310x-hal/src/spi/shared_device.rs
+++ b/e310x-hal/src/spi/shared_device.rs
@@ -1,12 +1,7 @@
-use core::convert::Infallible;
-
-use embedded_hal::{
-    blocking::spi::{Operation, Transactional, Transfer, Write, WriteIter},
-    spi::FullDuplex,
-};
+use embedded_hal::spi::{ErrorKind, ErrorType, Operation, SpiBus, SpiDevice};
 use riscv::interrupt;
 
-use super::{PinCS, Pins, PinsNoCS, SharedBus, SpiConfig, SpiX};
+use super::{PinCS, PinsFull, PinsNoCS, SharedBus, SpiConfig, SpiX};
 
 /// SPI shared device abstraction
 pub struct SpiSharedDevice<'bus, SPI, PINS, CS> {
@@ -15,6 +10,13 @@ pub struct SpiSharedDevice<'bus, SPI, PINS, CS> {
     config: SpiConfig,
 }
 
+impl<'bus, SPI, PINS, CS> SpiSharedDevice<'bus, SPI, PINS, CS> {
+    /// Releases the CS pin back
+    pub fn release(self) -> CS {
+        self.cs
+    }
+}
+
 impl<'bus, SPI, PINS, CS> SpiSharedDevice<'bus, SPI, PINS, CS>
 where
     SPI: SpiX,
@@ -23,143 +25,56 @@ where
 {
     /// Create shared [SpiSharedDevice] using the existing [SharedBus]
     /// and given [SpiConfig]. The config gets cloned.
-    pub fn new(bus: &'bus SharedBus<SPI, PINS>, cs: CS, config: &SpiConfig) -> Self
-    where
-        PINS: PinsNoCS<SPI>,
-    {
+    pub fn new(bus: &'bus SharedBus<SPI, PINS>, cs: CS, config: &SpiConfig) -> Self {
         Self {
             bus,
             cs,
             config: config.clone(),
         }
     }
-
-    /// Releases the CS pin back
-    pub fn release(self) -> CS {
-        self.cs
-    }
-}
-
-impl<SPI, PINS, CS> FullDuplex<u8> for SpiSharedDevice<'_, SPI, PINS, CS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
-    CS: PinCS<SPI>,
-{
-    type Error = Infallible;
-
-    fn read(&mut self) -> nb::Result<u8, Infallible> {
-        interrupt::free(|| {
-            let mut bus = self.bus.borrow_mut();
-
-            bus.configure(&self.config, Some(CS::CS_INDEX));
-
-            bus.read()
-        })
-    }
-
-    fn send(&mut self, byte: u8) -> nb::Result<(), Infallible> {
-        interrupt::free(|| {
-            let mut bus = self.bus.borrow_mut();
-
-            bus.configure(&self.config, Some(CS::CS_INDEX));
-
-            bus.send(byte)
-        })
-    }
-}
-
-impl<SPI, PINS, CS> Transfer<u8> for SpiSharedDevice<'_, SPI, PINS, CS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
-    CS: PinCS<SPI>,
-{
-    type Error = Infallible;
-
-    fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
-        interrupt::free(move || {
-            let mut bus = self.bus.borrow_mut();
-
-            bus.configure(&self.config, Some(CS::CS_INDEX));
-
-            bus.start_frame();
-            let result = bus.transfer(words);
-            bus.end_frame();
-
-            result
-        })
-    }
 }
 
-impl<SPI, PINS, CS> Write<u8> for SpiSharedDevice<'_, SPI, PINS, CS>
+impl<'bus, SPI, PINS, CS> ErrorType for SpiSharedDevice<'bus, SPI, PINS, CS>
 where
     SPI: SpiX,
-    PINS: Pins<SPI>,
-    CS: PinCS<SPI>,
-{
-    type Error = Infallible;
-
-    fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
-        interrupt::free(|| {
-            let mut bus = self.bus.borrow_mut();
-
-            bus.configure(&self.config, Some(CS::CS_INDEX));
-
-            bus.start_frame();
-            let result = bus.write(words);
-            bus.end_frame();
-
-            result
-        })
-    }
-}
-
-impl<SPI, PINS, CS> WriteIter<u8> for SpiSharedDevice<'_, SPI, PINS, CS>
-where
-    SPI: SpiX,
-    PINS: Pins<SPI>,
+    PINS: PinsNoCS<SPI>,
     CS: PinCS<SPI>,
 {
-    type Error = Infallible;
-
-    fn write_iter<WI>(&mut self, words: WI) -> Result<(), Self::Error>
-    where
-        WI: IntoIterator<Item = u8>,
-    {
-        interrupt::free(|| {
-            let mut bus = self.bus.borrow_mut();
-
-            bus.configure(&self.config, Some(CS::CS_INDEX));
-
-            bus.start_frame();
-            let result = bus.write_iter(words);
-            bus.end_frame();
-
-            result
-        })
-    }
+    type Error = ErrorKind;
 }
 
-impl<SPI, PINS, CS> Transactional<u8> for SpiSharedDevice<'_, SPI, PINS, CS>
+impl<'bus, SPI, PINS, CS> SpiDevice for SpiSharedDevice<'bus, SPI, PINS, CS>
 where
     SPI: SpiX,
-    PINS: Pins<SPI>,
+    PINS: PinsNoCS<SPI> + PinsFull<SPI>,
     CS: PinCS<SPI>,
 {
-    type Error = Infallible;
-
-    fn exec(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Infallible> {
-        interrupt::free(|| {
-            let mut bus = self.bus.borrow_mut();
-
-            bus.configure(&self.config, Some(CS::CS_INDEX));
+    fn transaction(&mut self, operations: &mut [Operation<'_, u8>]) -> Result<(), Self::Error> {
+        let mut bus =
+            interrupt::free(|| self.bus.try_borrow_mut().map_err(|_| ErrorKind::ModeFault))?;
+        // Safety: valid CS index
+        unsafe { bus.configure(&self.config, Some(CS::CS_INDEX)) };
+        bus.start_frame();
+
+        let mut res = Ok(());
+        for operation in operations.iter_mut() {
+            res = match operation {
+                Operation::Read(read) => bus.read(read),
+                Operation::Write(write) => bus.write(write),
+                Operation::Transfer(read, write) => bus.transfer(read, write),
+                Operation::TransferInPlace(read_write) => bus.transfer_in_place(read_write),
+                Operation::DelayNs(_ns) => todo!(),
+            };
+            if res.is_err() {
+                break;
+            }
+        }
 
-            bus.start_frame();
-            let result = bus.exec(operations);
-            bus.end_frame();
+        if res.is_ok() {
+            bus.flush()?;
+        }
+        bus.end_frame();
 
-            result
-        })
+        Ok(())
     }
 }
diff --git a/e310x-hal/src/spi/traits.rs b/e310x-hal/src/spi/traits.rs
index f115a5b..e55b9f1 100644
--- a/e310x-hal/src/spi/traits.rs
+++ b/e310x-hal/src/spi/traits.rs
@@ -4,26 +4,29 @@ use e310x::{qspi0, Qspi0, Qspi1, Qspi2};
 
 #[doc(hidden)]
 pub trait SpiX: Deref<Target = qspi0::RegisterBlock> + private::Sealed {}
-impl SpiX for Qspi0 {}
-impl SpiX for Qspi1 {}
-impl SpiX for Qspi2 {}
 
-/// SPI pins - DO NOT IMPLEMENT THIS TRAIT
+/// SPI pins
 ///
 /// This trait is implemented for pin tuples (), (MOSI, MISO, SCK) and (MOSI, MISO, SCK, CS)
 /// and combinations without MOSI/MISO
 pub trait Pins<SPI>: private::Sealed {
-    #[doc(hidden)]
+    /// Chip select index associated with this set of pins (if any)
     const CS_INDEX: Option<u32>;
 }
 
-/// SPI pins without CS - DO NOT IMPLEMENT THIS TRAIT
+/// Full SPI pins
+///
+/// This trait is implemented for pin tuples (MOSI, MISO, SCK) and (MOSI, MISO, SCK, CS).
+/// All variants must include MOSI, MISO, and SCK pins.
+pub trait PinsFull<SPI>: Pins<SPI> {}
+
+/// SPI pins without CS
 ///
 /// This trait is implemented for pin tuples (), (MOSI, MISO, SCK) only without CS pin
-/// and combinations without MOSI/MISO
+/// and combinations without MOSI/MISO (i.e., Pins::CS_INDEX is None)
 pub trait PinsNoCS<SPI>: Pins<SPI> {}
 
-/// SPI Chip Select pin - DO NOT IMPLEMENT THIS TRAIT
+/// SPI Chip Select pin
 ///
 /// This trait is implemented for chip select pins only
 pub trait PinCS<SPI>: private::Sealed {
@@ -32,35 +35,41 @@ pub trait PinCS<SPI>: private::Sealed {
 }
 
 /* SPI0 pins */
-impl Pins<Qspi0> for () {
-    const CS_INDEX: Option<u32> = Some(0);
+mod spi0_impl {
+    use super::{Pins, Qspi0, SpiX};
+
+    impl SpiX for Qspi0 {}
+
+    impl Pins<Qspi0> for () {
+        const CS_INDEX: Option<u32> = Some(0);
+    }
 }
 
 /* SPI1 pins */
 mod spi1_impl {
-    use super::{PinCS, Pins, PinsNoCS, Qspi1};
-    use crate::gpio::gpio0;
-    use crate::gpio::{NoInvert, IOF0};
+    use super::{PinCS, Pins, PinsFull, PinsNoCS, Qspi1, SpiX};
+    use crate::gpio::{gpio0, NoInvert, IOF0};
 
     type Mosi = gpio0::Pin3<IOF0<NoInvert>>;
     type Miso = gpio0::Pin4<IOF0<NoInvert>>;
     type Sck = gpio0::Pin5<IOF0<NoInvert>>;
-    type CS0 = gpio0::Pin2<IOF0<NoInvert>>;
-    type CS1 = gpio0::Pin8<IOF0<NoInvert>>;
-    type CS2 = gpio0::Pin9<IOF0<NoInvert>>;
-    type CS3 = gpio0::Pin10<IOF0<NoInvert>>;
+    type Cs0 = gpio0::Pin2<IOF0<NoInvert>>;
+    type Cs1 = gpio0::Pin8<IOF0<NoInvert>>;
+    type Cs2 = gpio0::Pin9<IOF0<NoInvert>>;
+    type Cs3 = gpio0::Pin10<IOF0<NoInvert>>;
+
+    impl SpiX for Qspi1 {}
 
-    // ensure only the correct CS pins can be used to make SpiSharedDevice instances
-    impl PinCS<Qspi1> for CS0 {
+    impl PinCS<Qspi1> for Cs0 {
         const CS_INDEX: u32 = 0;
     }
-    impl PinCS<Qspi1> for CS1 {
+    impl PinCS<Qspi1> for Cs1 {
         const CS_INDEX: u32 = 1;
     }
-    impl PinCS<Qspi1> for CS2 {
+    impl PinCS<Qspi1> for Cs2 {
         const CS_INDEX: u32 = 2;
     }
-    impl PinCS<Qspi1> for CS3 {
+    impl PinCS<Qspi1> for Cs3 {
         const CS_INDEX: u32 = 3;
     }
 
@@ -68,6 +77,12 @@ mod spi1_impl {
     impl PinsNoCS<Qspi1> for (Mosi, (), Sck) {}
     impl PinsNoCS<Qspi1> for ((), Miso, Sck) {}
 
+    impl PinsFull<Qspi1> for (Mosi, Miso, Sck) {}
+    impl PinsFull<Qspi1> for (Mosi, Miso, Sck, Cs0) {}
+    impl PinsFull<Qspi1> for (Mosi, Miso, Sck, Cs1) {}
+    impl PinsFull<Qspi1> for (Mosi, Miso, Sck, Cs2) {}
+    impl PinsFull<Qspi1> for (Mosi, Miso, Sck, Cs3) {}
+
     impl Pins<Qspi1> for (Mosi, Miso, Sck) {
         const CS_INDEX: Option<u32> = None;
     }
@@ -77,40 +92,40 @@ mod spi1_impl {
     impl Pins<Qspi1> for ((), Miso, Sck) {
         const CS_INDEX: Option<u32> = None;
     }
-    impl Pins<Qspi1> for (Mosi, Miso, Sck, CS0) {
+    impl Pins<Qspi1> for (Mosi, Miso, Sck, Cs0) {
         const CS_INDEX: Option<u32> = Some(0);
     }
-    impl Pins<Qspi1> for (Mosi, (), Sck, CS0) {
+    impl Pins<Qspi1> for (Mosi, (), Sck, Cs0) {
         const CS_INDEX: Option<u32> = Some(0);
     }
-    impl Pins<Qspi1> for ((), Miso, Sck, CS0) {
+    impl Pins<Qspi1> for ((), Miso, Sck, Cs0) {
         const CS_INDEX: Option<u32> = Some(0);
     }
-    impl Pins<Qspi1> for (Mosi, Miso, Sck, CS1) {
+    impl Pins<Qspi1> for (Mosi, Miso, Sck, Cs1) {
         const CS_INDEX: Option<u32> = Some(1);
     }
-    impl Pins<Qspi1> for (Mosi, (), Sck, CS1) {
+    impl Pins<Qspi1> for (Mosi, (), Sck, Cs1) {
         const CS_INDEX: Option<u32> = Some(1);
     }
-    impl Pins<Qspi1> for ((), Miso, Sck, CS1) {
+    impl Pins<Qspi1> for ((), Miso, Sck, Cs1) {
         const CS_INDEX: Option<u32> = Some(1);
     }
-    impl Pins<Qspi1> for (Mosi, Miso, Sck, CS2) {
+    impl Pins<Qspi1> for (Mosi, Miso, Sck, Cs2) {
         const CS_INDEX: Option<u32> = Some(2);
     }
-    impl Pins<Qspi1> for (Mosi, (), Sck, CS2) {
+    impl Pins<Qspi1> for (Mosi, (), Sck, Cs2) {
         const CS_INDEX: Option<u32> = Some(2);
     }
-    impl Pins<Qspi1> for ((), Miso, Sck, CS2) {
+    impl Pins<Qspi1> for ((), Miso, Sck, Cs2) {
         const CS_INDEX: Option<u32> = Some(2);
     }
-    impl Pins<Qspi1> for (Mosi, Miso, Sck, CS3) {
+    impl Pins<Qspi1> for (Mosi, Miso, Sck, Cs3) {
         const CS_INDEX: Option<u32> = Some(3);
     }
-    impl Pins<Qspi1> for (Mosi, (), Sck, CS3) {
+    impl Pins<Qspi1> for (Mosi, (), Sck, Cs3) {
         const CS_INDEX: Option<u32> = Some(3);
     }
-    impl Pins<Qspi1> for ((), Miso, Sck, CS3) {
+    impl Pins<Qspi1> for ((), Miso, Sck, Cs3) {
         const CS_INDEX: Option<u32> = Some(3);
     }
 
@@ -119,40 +134,41 @@ mod spi1_impl {
         use super::super::private::Sealed;
         use super::*;
 
-        impl Sealed for CS0 {}
-        impl Sealed for CS1 {}
-        impl Sealed for CS2 {}
-        impl Sealed for CS3 {}
+        impl Sealed for Cs0 {}
+        impl Sealed for Cs1 {}
+        impl Sealed for Cs2 {}
+        impl Sealed for Cs3 {}
         impl Sealed for (Mosi, Miso, Sck) {}
         impl Sealed for (Mosi, (), Sck) {}
         impl Sealed for ((), Miso, Sck) {}
-        impl Sealed for (Mosi, Miso, Sck, CS0) {}
-        impl Sealed for (Mosi, (), Sck, CS0) {}
-        impl Sealed for ((), Miso, Sck, CS0) {}
-        impl Sealed for (Mosi, Miso, Sck, CS1) {}
-        impl Sealed for (Mosi, (), Sck, CS1) {}
-        impl Sealed for ((), Miso, Sck, CS1) {}
-        impl Sealed for (Mosi, Miso, Sck, CS2) {}
-        impl Sealed for (Mosi, (), Sck, CS2) {}
-        impl Sealed for ((), Miso, Sck, CS2) {}
-        impl Sealed for (Mosi, Miso, Sck, CS3) {}
-        impl Sealed for (Mosi, (), Sck, CS3) {}
-        impl Sealed for ((), Miso, Sck, CS3) {}
+        impl Sealed for (Mosi, Miso, Sck, Cs0) {}
+        impl Sealed for (Mosi, (), Sck, Cs0) {}
+        impl Sealed for ((), Miso, Sck, Cs0) {}
+        impl Sealed for (Mosi, Miso, Sck, Cs1) {}
+        impl Sealed for (Mosi, (), Sck, Cs1) {}
+        impl Sealed for ((), Miso, Sck, Cs1) {}
+        impl Sealed for (Mosi, Miso, Sck, Cs2) {}
+        impl Sealed for (Mosi, (), Sck, Cs2) {}
+        impl Sealed for ((), Miso, Sck, Cs2) {}
+        impl Sealed for (Mosi, Miso, Sck, Cs3) {}
+        impl Sealed for (Mosi, (), Sck, Cs3) {}
+        impl Sealed for ((), Miso, Sck, Cs3) {}
     }
 }
 
 /* SPI2 pins */
 mod spi2_impl {
-    use super::{PinCS, Pins, PinsNoCS, Qspi2};
-    use crate::gpio::gpio0;
-    use crate::gpio::{NoInvert, IOF0};
+    use super::{PinCS, Pins, PinsFull, PinsNoCS, Qspi2, SpiX};
+    use crate::gpio::{gpio0, NoInvert, IOF0};
 
     type Mosi = gpio0::Pin27<IOF0<NoInvert>>;
     type Miso = gpio0::Pin28<IOF0<NoInvert>>;
     type Sck = gpio0::Pin29<IOF0<NoInvert>>;
-    type CS0 = gpio0::Pin26<IOF0<NoInvert>>;
+    type Cs0 = gpio0::Pin26<IOF0<NoInvert>>;
+
+    impl SpiX for Qspi2 {}
 
-    impl PinCS<Qspi2> for CS0 {
+    impl PinCS<Qspi2> for Cs0 {
         const CS_INDEX: u32 = 0;
     }
 
@@ -160,6 +176,9 @@ mod spi2_impl {
     impl PinsNoCS<Qspi2> for (Mosi, (), Sck) {}
     impl PinsNoCS<Qspi2> for ((), Miso, Sck) {}
 
+    impl PinsFull<Qspi2> for (Mosi, Miso, Sck) {}
+    impl PinsFull<Qspi2> for (Mosi, Miso, Sck, Cs0) {}
+
     impl Pins<Qspi2> for (Mosi, Miso, Sck) {
         const CS_INDEX: Option<u32> = None;
     }
@@ -169,13 +188,13 @@ mod spi2_impl {
     impl Pins<Qspi2> for ((), Miso, Sck) {
         const CS_INDEX: Option<u32> = None;
     }
-    impl Pins<Qspi2> for (Mosi, Miso, Sck, CS0) {
+    impl Pins<Qspi2> for (Mosi, Miso, Sck, Cs0) {
         const CS_INDEX: Option<u32> = Some(0);
     }
-    impl Pins<Qspi2> for (Mosi, (), Sck, CS0) {
+    impl Pins<Qspi2> for (Mosi, (), Sck, Cs0) {
         const CS_INDEX: Option<u32> = Some(0);
     }
-    impl Pins<Qspi2> for ((), Miso, Sck, CS0) {
+    impl Pins<Qspi2> for ((), Miso, Sck, Cs0) {
         const CS_INDEX: Option<u32> = Some(0);
     }
 
@@ -184,13 +203,13 @@ mod spi2_impl {
         use super::super::private::Sealed;
         use super::*;
 
-        impl Sealed for CS0 {}
+        impl Sealed for Cs0 {}
         impl Sealed for (Mosi, Miso, Sck) {}
         impl Sealed for (Mosi, (), Sck) {}
         impl Sealed for ((), Miso, Sck) {}
-        impl Sealed for (Mosi, Miso, Sck, CS0) {}
-        impl Sealed for (Mosi, (), Sck, CS0) {}
-        impl Sealed for ((), Miso, Sck, CS0) {}
+        impl Sealed for (Mosi, Miso, Sck, Cs0) {}
+        impl Sealed for (Mosi, (), Sck, Cs0) {}
+        impl Sealed for ((), Miso, Sck, Cs0) {}
     }
 }
 
diff --git a/e310x-hal/src/stdout.rs b/e310x-hal/src/stdout.rs
index 004bcc8..912d689 100644
--- a/e310x-hal/src/stdout.rs
+++ b/e310x-hal/src/stdout.rs
@@ -1,17 +1,13 @@
 //! Stdout
-pub use core::fmt::Write;
+use core::fmt::Write;
+use embedded_hal_nb::serial;
 use nb::block;
 
 /// Stdout implements the core::fmt::Write trait for hal::serial::Write
 /// implementations.
-pub struct Stdout<'p, T>(pub &'p mut T)
-where
-    T: 'p;
+pub struct Stdout<'p, T: 'p>(pub &'p mut T);
 
-impl<'p, T> Write for Stdout<'p, T>
-where
-    T: embedded_hal::serial::Write<u8>,
-{
+impl<'p, T: serial::Write> Write for Stdout<'p, T> {
     fn write_str(&mut self, s: &str) -> ::core::fmt::Result {
         for byte in s.as_bytes() {
             if *byte == b'\n' {
diff --git a/e310x/CHANGELOG.md b/e310x/CHANGELOG.md
index cd31b6c..86d8b67 100644
--- a/e310x/CHANGELOG.md
+++ b/e310x/CHANGELOG.md
@@ -8,8 +8,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 ## [Unreleased]
 
 ### Changed
-- Bump MSRV to 1.72.0 to ensure a correct behavior of portable-atomic
-- Regenerate code with `svd2rust` v0.33.4
+
+- Now CLINT and PLIC are provided by `riscv-peripheral` 0.2
+- Adapt crate to work with `riscv` 0.12 and `riscv-rt` 0.13
+- Bump MSRV to 1.76.0 to ensure a correct behavior of portable-atomic
+- Regenerate code with `svd2rust` 8b809ac2c1e1a13f30af59ee41f4d66a4995d625 (unreleased)
 
 ## [v0.11.0]
 
diff --git a/e310x/Cargo.toml b/e310x/Cargo.toml
index b73b28f..7ec7786 100644
--- a/e310x/Cargo.toml
+++ b/e310x/Cargo.toml
@@ -1,21 +1,25 @@
 [package]
 name = "e310x"
-version = "0.11.0"
+version = "0.12.0"
 repository = "https://github.com/riscv-rust/e310x"
 authors = ["David Craven <david@craven.ch>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"]
 categories = ["embedded", "hardware-support", "no-std"]
 description = "With svd2rust generated peripherals for Freedom E310 MCU's."
 keywords = ["riscv", "register", "peripheral"]
 license = "ISC"
-rust-version = "1.72"
+rust-version = "1.76"
 edition = "2021"
 
 [dependencies]
-critical-section = { version = "1.1.3", optional = true }
+critical-section = { version = "1.2.0", optional = true }
+riscv = "0.12.0"
+riscv-peripheral = "0.2.0"
+riscv-rt = { version = "0.13.0", features = ["no-interrupts"], optional = true }
 vcell = "0.1.3"
 
 [features]
-rt = []
+rt = ["riscv-rt"]
+v-trap = ["rt", "riscv-rt/v-trap"]
 g002 = []
 
 [package.metadata.docs.rs]
diff --git a/e310x/device.x b/e310x/device.x
index 2c95228..c2d6e5e 100644
--- a/e310x/device.x
+++ b/e310x/device.x
@@ -3,6 +3,14 @@ MEMORY
     RAM : ORIGIN = 0x80000000, LENGTH = 16K
 }
 
+/* Core interrupt sources and trap handlers */
+PROVIDE(MachineSoft = DefaultHandler);
+PROVIDE(_start_MachineSoft_trap = _start_DefaultHandler_trap);
+PROVIDE(MachineTimer = DefaultHandler);
+PROVIDE(_start_MachineTimer_trap = _start_DefaultHandler_trap);
+PROVIDE(MachineExternal = DefaultHandler);
+PROVIDE(_start_MachineExternal_trap = _start_DefaultHandler_trap);
+/* External interrupt sources */
 PROVIDE(WATCHDOG = DefaultHandler);
 PROVIDE(RTC = DefaultHandler);
 PROVIDE(UART0 = DefaultHandler);
diff --git a/e310x/settings.yaml b/e310x/settings.yaml
new file mode 100644
index 0000000..e081b54
--- /dev/null
+++ b/e310x/settings.yaml
@@ -0,0 +1,52 @@
+riscv_config:
+  core_interrupts:
+    - name: "MachineSoft"
+      value: 3
+      description: "Machine Software Interrupt"
+    - name: "MachineTimer"
+      value: 7
+      description: "Machine Timer Interrupt"
+    - name: "MachineExternal"
+      value: 11
+      description: "Machine External Interrupt"
+
+  priorities:
+    - name: "P0"
+      value: 0
+      description: "Priority level 0"
+    - name: "P1"
+      value: 1
+      description: "Priority level 1"
+    - name: "P2"
+      value: 2
+      description: "Priority level 2"
+    - name: "P3"
+      value: 3
+      description: "Priority level 3"
+    - name: "P4"
+      value: 4
+      description: "Priority level 4"
+    - name: "P5"
+      value: 5
+      description: "Priority level 5"
+    - name: "P6"
+      value: 6
+      description: "Priority level 6"
+    - name: "P7"
+      value: 7
+      description: "Priority level 7"
+
+  harts:
+    - name: "H0"
+      value: 0
+      description: "Hart 0"
+
+  clint:
+    name: "CLINT"
+    freq: 32768
+    async_delay: false
+
+  plic:
+    name: "PLIC"
+    core_interrupt: "MachineExternal"
+    hart_id: "H0"
diff --git a/e310x/src/aonclk/lfrosccfg.rs b/e310x/src/aonclk/lfrosccfg.rs
index 2576e2a..8e9cd21 100644
--- a/e310x/src/aonclk/lfrosccfg.rs
+++ b/e310x/src/aonclk/lfrosccfg.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:5"]
     #[inline(always)]
-    #[must_use]
     pub fn div(&mut self) -> DivW<LfrosccfgSpec> {
         DivW::new(self, 0)
     }
     #[doc = "Bits 16:20"]
     #[inline(always)]
-    #[must_use]
     pub fn trim(&mut self) -> TrimW<LfrosccfgSpec> {
         TrimW::new(self, 16)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<LfrosccfgSpec> {
         EnableW::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn ready(&mut self) -> ReadyW<LfrosccfgSpec> {
         ReadyW::new(self, 31)
     }
diff --git a/e310x/src/clint.rs b/e310x/src/clint.rs
deleted file mode 100644
index 4e222f0..0000000
--- a/e310x/src/clint.rs
+++ /dev/null
@@ -1,68 +0,0 @@
-#[repr(C)]
-#[doc = "Register block"]
-pub struct RegisterBlock {
-    msip: Msip,
-    _reserved1: [u8; 0x3ffc],
-    mtimecmp: Mtimecmp,
-    mtimecmph: Mtimecmph,
-    _reserved3: [u8; 0x7ff0],
-    mtime: Mtime,
-    mtimeh: Mtimeh,
-}
-impl RegisterBlock {
-    #[doc = "0x00 - Hart 0 software interrupt register"]
-    #[inline(always)]
-    pub const fn msip(&self) -> &Msip {
-        &self.msip
-    }
-    #[doc = "0x4000 - Hart 0 time comparator register"]
-    #[inline(always)]
-    pub const fn mtimecmp(&self) -> &Mtimecmp {
-        &self.mtimecmp
-    }
-    #[doc = "0x4004 - Hart 0 time comparator register"]
-    #[inline(always)]
-    pub const fn mtimecmph(&self) -> &Mtimecmph {
-        &self.mtimecmph
-    }
-    #[doc = "0xbff8 - Timer register"]
-    #[inline(always)]
-    pub const fn mtime(&self) -> &Mtime {
-        &self.mtime
-    }
-    #[doc = "0xbffc - Timer register"]
-    #[inline(always)]
-    pub const fn mtimeh(&self) -> &Mtimeh {
-        &self.mtimeh
-    }
-}
-#[doc = "msip (rw) register accessor: Hart 0 software interrupt register\n\nYou can [`read`](crate::Reg::read) this register and get [`msip::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msip::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msip`]
-module"]
-#[doc(alias = "msip")]
-pub type Msip = crate::Reg<msip::MsipSpec>;
-#[doc = "Hart 0 software interrupt register"]
-pub mod msip;
-#[doc = "mtimecmp (rw) register accessor: Hart 0 time comparator register\n\nYou can [`read`](crate::Reg::read) this register and get [`mtimecmp::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mtimecmp::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmp`]
-module"]
-#[doc(alias = "mtimecmp")]
-pub type Mtimecmp = crate::Reg<mtimecmp::MtimecmpSpec>;
-#[doc = "Hart 0 time comparator register"]
-pub mod mtimecmp;
-#[doc = "mtimecmph (rw) register accessor: Hart 0 time comparator register\n\nYou can [`read`](crate::Reg::read) this register and get [`mtimecmph::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mtimecmph::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimecmph`]
-module"]
-#[doc(alias = "mtimecmph")]
-pub type Mtimecmph = crate::Reg<mtimecmph::MtimecmphSpec>;
-#[doc = "Hart 0 time comparator register"]
-pub mod mtimecmph;
-#[doc = "mtime (rw) register accessor: Timer register\n\nYou can [`read`](crate::Reg::read) this register and get [`mtime::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mtime::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtime`]
-module"]
-#[doc(alias = "mtime")]
-pub type Mtime = crate::Reg<mtime::MtimeSpec>;
-#[doc = "Timer register"]
-pub mod mtime;
-#[doc = "mtimeh (rw) register accessor: Timer register\n\nYou can [`read`](crate::Reg::read) this register and get [`mtimeh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mtimeh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mtimeh`]
-module"]
-#[doc(alias = "mtimeh")]
-pub type Mtimeh = crate::Reg<mtimeh::MtimehSpec>;
-#[doc = "Timer register"]
-pub mod mtimeh;
diff --git a/e310x/src/clint/msip.rs b/e310x/src/clint/msip.rs
deleted file mode 100644
index f8ba2bc..0000000
--- a/e310x/src/clint/msip.rs
+++ /dev/null
@@ -1,27 +0,0 @@
-#[doc = "Register `msip` reader"]
-pub type R = crate::R<MsipSpec>;
-#[doc = "Register `msip` writer"]
-pub type W = crate::W<MsipSpec>;
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        write!(f, "{}", self.bits())
-    }
-}
-impl W {}
-#[doc = "Hart 0 software interrupt register\n\nYou can [`read`](crate::Reg::read) this register and get [`msip::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`msip::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct MsipSpec;
-impl crate::RegisterSpec for MsipSpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`msip::R`](R) reader structure"]
-impl crate::Readable for MsipSpec {}
-#[doc = "`write(|w| ..)` method takes [`msip::W`](W) writer structure"]
-impl crate::Writable for MsipSpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets msip to value 0"]
-impl crate::Resettable for MsipSpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/clint/mtime.rs b/e310x/src/clint/mtime.rs
deleted file mode 100644
index e8b419c..0000000
--- a/e310x/src/clint/mtime.rs
+++ /dev/null
@@ -1,27 +0,0 @@
-#[doc = "Register `mtime` reader"]
-pub type R = crate::R<MtimeSpec>;
-#[doc = "Register `mtime` writer"]
-pub type W = crate::W<MtimeSpec>;
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        write!(f, "{}", self.bits())
-    }
-}
-impl W {}
-#[doc = "Timer register\n\nYou can [`read`](crate::Reg::read) this register and get [`mtime::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mtime::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct MtimeSpec;
-impl crate::RegisterSpec for MtimeSpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`mtime::R`](R) reader structure"]
-impl crate::Readable for MtimeSpec {}
-#[doc = "`write(|w| ..)` method takes [`mtime::W`](W) writer structure"]
-impl crate::Writable for MtimeSpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets mtime to value 0"]
-impl crate::Resettable for MtimeSpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/clint/mtimecmp.rs b/e310x/src/clint/mtimecmp.rs
deleted file mode 100644
index ad97205..0000000
--- a/e310x/src/clint/mtimecmp.rs
+++ /dev/null
@@ -1,27 +0,0 @@
-#[doc = "Register `mtimecmp` reader"]
-pub type R = crate::R<MtimecmpSpec>;
-#[doc = "Register `mtimecmp` writer"]
-pub type W = crate::W<MtimecmpSpec>;
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        write!(f, "{}", self.bits())
-    }
-}
-impl W {}
-#[doc = "Hart 0 time comparator register\n\nYou can [`read`](crate::Reg::read) this register and get [`mtimecmp::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mtimecmp::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct MtimecmpSpec;
-impl crate::RegisterSpec for MtimecmpSpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`mtimecmp::R`](R) reader structure"]
-impl crate::Readable for MtimecmpSpec {}
-#[doc = "`write(|w| ..)` method takes [`mtimecmp::W`](W) writer structure"]
-impl crate::Writable for MtimecmpSpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets mtimecmp to value 0"]
-impl crate::Resettable for MtimecmpSpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/clint/mtimecmph.rs b/e310x/src/clint/mtimecmph.rs
deleted file mode 100644
index d70cff4..0000000
--- a/e310x/src/clint/mtimecmph.rs
+++ /dev/null
@@ -1,27 +0,0 @@
-#[doc = "Register `mtimecmph` reader"]
-pub type R = crate::R<MtimecmphSpec>;
-#[doc = "Register `mtimecmph` writer"]
-pub type W = crate::W<MtimecmphSpec>;
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        write!(f, "{}", self.bits())
-    }
-}
-impl W {}
-#[doc = "Hart 0 time comparator register\n\nYou can [`read`](crate::Reg::read) this register and get [`mtimecmph::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mtimecmph::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct MtimecmphSpec;
-impl crate::RegisterSpec for MtimecmphSpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`mtimecmph::R`](R) reader structure"]
-impl crate::Readable for MtimecmphSpec {}
-#[doc = "`write(|w| ..)` method takes [`mtimecmph::W`](W) writer structure"]
-impl crate::Writable for MtimecmphSpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets mtimecmph to value 0"]
-impl crate::Resettable for MtimecmphSpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/clint/mtimeh.rs b/e310x/src/clint/mtimeh.rs
deleted file mode 100644
index 4de4968..0000000
--- a/e310x/src/clint/mtimeh.rs
+++ /dev/null
@@ -1,27 +0,0 @@
-#[doc = "Register `mtimeh` reader"]
-pub type R = crate::R<MtimehSpec>;
-#[doc = "Register `mtimeh` writer"]
-pub type W = crate::W<MtimehSpec>;
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        write!(f, "{}", self.bits())
-    }
-}
-impl W {}
-#[doc = "Timer register\n\nYou can [`read`](crate::Reg::read) this register and get [`mtimeh::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mtimeh::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct MtimehSpec;
-impl crate::RegisterSpec for MtimehSpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`mtimeh::R`](R) reader structure"]
-impl crate::Readable for MtimehSpec {}
-#[doc = "`write(|w| ..)` method takes [`mtimeh::W`](W) writer structure"]
-impl crate::Writable for MtimehSpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets mtimeh to value 0"]
-impl crate::Resettable for MtimehSpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/generic.rs b/e310x/src/generic.rs
index 5c6d2a6..e7e9158 100644
--- a/e310x/src/generic.rs
+++ b/e310x/src/generic.rs
@@ -147,6 +147,7 @@ pub mod raw {
         }
     }
 
+    #[must_use = "after creating `FieldWriter` you need to call field value setting method"]
     pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe>
     where
         REG: Writable + RegisterSpec,
@@ -174,6 +175,7 @@ pub mod raw {
         }
     }
 
+    #[must_use = "after creating `BitWriter` you need to call bit setting method"]
     pub struct BitWriter<'a, REG, FI = bool, M = BitM>
     where
         REG: Writable + RegisterSpec,
diff --git a/e310x/src/gpio0/drive.rs b/e310x/src/gpio0/drive.rs
index dd5cd3c..e11fe05 100644
--- a/e310x/src/gpio0/drive.rs
+++ b/e310x/src/gpio0/drive.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<DriveSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<DriveSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<DriveSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<DriveSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<DriveSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<DriveSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<DriveSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<DriveSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<DriveSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<DriveSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<DriveSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<DriveSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<DriveSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<DriveSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<DriveSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<DriveSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<DriveSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<DriveSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<DriveSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<DriveSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<DriveSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<DriveSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<DriveSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<DriveSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<DriveSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<DriveSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<DriveSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<DriveSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<DriveSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<DriveSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<DriveSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<DriveSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/fall_ie.rs b/e310x/src/gpio0/fall_ie.rs
index 80e5d99..c055233 100644
--- a/e310x/src/gpio0/fall_ie.rs
+++ b/e310x/src/gpio0/fall_ie.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<FallIeSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<FallIeSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<FallIeSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<FallIeSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<FallIeSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<FallIeSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<FallIeSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<FallIeSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<FallIeSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<FallIeSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<FallIeSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<FallIeSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<FallIeSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<FallIeSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<FallIeSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<FallIeSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<FallIeSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<FallIeSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<FallIeSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<FallIeSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<FallIeSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<FallIeSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<FallIeSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<FallIeSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<FallIeSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<FallIeSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<FallIeSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<FallIeSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<FallIeSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<FallIeSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<FallIeSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<FallIeSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/fall_ip.rs b/e310x/src/gpio0/fall_ip.rs
index 36df848..ebc2dab 100644
--- a/e310x/src/gpio0/fall_ip.rs
+++ b/e310x/src/gpio0/fall_ip.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<FallIpSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<FallIpSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<FallIpSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<FallIpSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<FallIpSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<FallIpSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<FallIpSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<FallIpSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<FallIpSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<FallIpSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<FallIpSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<FallIpSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<FallIpSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<FallIpSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<FallIpSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<FallIpSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<FallIpSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<FallIpSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<FallIpSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<FallIpSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<FallIpSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<FallIpSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<FallIpSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<FallIpSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<FallIpSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<FallIpSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<FallIpSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<FallIpSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<FallIpSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<FallIpSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<FallIpSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<FallIpSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/high_ie.rs b/e310x/src/gpio0/high_ie.rs
index 627853b..3209092 100644
--- a/e310x/src/gpio0/high_ie.rs
+++ b/e310x/src/gpio0/high_ie.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<HighIeSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<HighIeSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<HighIeSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<HighIeSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<HighIeSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<HighIeSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<HighIeSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<HighIeSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<HighIeSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<HighIeSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<HighIeSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<HighIeSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<HighIeSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<HighIeSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<HighIeSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<HighIeSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<HighIeSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<HighIeSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<HighIeSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<HighIeSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<HighIeSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<HighIeSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<HighIeSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<HighIeSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<HighIeSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<HighIeSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<HighIeSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<HighIeSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<HighIeSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<HighIeSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<HighIeSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<HighIeSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/high_ip.rs b/e310x/src/gpio0/high_ip.rs
index eb02239..0844d80 100644
--- a/e310x/src/gpio0/high_ip.rs
+++ b/e310x/src/gpio0/high_ip.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<HighIpSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<HighIpSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<HighIpSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<HighIpSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<HighIpSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<HighIpSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<HighIpSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<HighIpSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<HighIpSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<HighIpSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<HighIpSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<HighIpSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<HighIpSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<HighIpSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<HighIpSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<HighIpSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<HighIpSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<HighIpSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<HighIpSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<HighIpSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<HighIpSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<HighIpSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<HighIpSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<HighIpSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<HighIpSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<HighIpSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<HighIpSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<HighIpSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<HighIpSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<HighIpSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<HighIpSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<HighIpSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/input_en.rs b/e310x/src/gpio0/input_en.rs
index 5348ebe..8cb602b 100644
--- a/e310x/src/gpio0/input_en.rs
+++ b/e310x/src/gpio0/input_en.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<InputEnSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<InputEnSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<InputEnSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<InputEnSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<InputEnSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<InputEnSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<InputEnSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<InputEnSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<InputEnSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<InputEnSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<InputEnSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<InputEnSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<InputEnSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<InputEnSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<InputEnSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<InputEnSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<InputEnSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<InputEnSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<InputEnSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<InputEnSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<InputEnSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<InputEnSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<InputEnSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<InputEnSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<InputEnSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<InputEnSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<InputEnSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<InputEnSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<InputEnSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<InputEnSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<InputEnSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<InputEnSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/input_val.rs b/e310x/src/gpio0/input_val.rs
index 710e706..95e06ad 100644
--- a/e310x/src/gpio0/input_val.rs
+++ b/e310x/src/gpio0/input_val.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<InputValSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<InputValSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<InputValSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<InputValSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<InputValSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<InputValSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<InputValSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<InputValSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<InputValSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<InputValSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<InputValSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<InputValSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<InputValSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<InputValSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<InputValSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<InputValSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<InputValSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<InputValSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<InputValSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<InputValSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<InputValSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<InputValSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<InputValSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<InputValSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<InputValSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<InputValSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<InputValSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<InputValSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<InputValSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<InputValSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<InputValSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<InputValSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/iof_en.rs b/e310x/src/gpio0/iof_en.rs
index cd9590a..c7aeb9a 100644
--- a/e310x/src/gpio0/iof_en.rs
+++ b/e310x/src/gpio0/iof_en.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<IofEnSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<IofEnSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<IofEnSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<IofEnSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<IofEnSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<IofEnSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<IofEnSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<IofEnSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<IofEnSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<IofEnSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<IofEnSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<IofEnSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<IofEnSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<IofEnSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<IofEnSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<IofEnSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<IofEnSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<IofEnSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<IofEnSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<IofEnSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<IofEnSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<IofEnSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<IofEnSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<IofEnSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<IofEnSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<IofEnSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<IofEnSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<IofEnSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<IofEnSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<IofEnSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<IofEnSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<IofEnSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/iof_sel.rs b/e310x/src/gpio0/iof_sel.rs
index b0cb56c..b0b394d 100644
--- a/e310x/src/gpio0/iof_sel.rs
+++ b/e310x/src/gpio0/iof_sel.rs
@@ -1863,193 +1863,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<IofSelSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<IofSelSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<IofSelSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<IofSelSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<IofSelSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<IofSelSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<IofSelSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<IofSelSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<IofSelSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<IofSelSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<IofSelSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<IofSelSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<IofSelSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<IofSelSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<IofSelSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<IofSelSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<IofSelSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<IofSelSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<IofSelSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<IofSelSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<IofSelSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<IofSelSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<IofSelSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<IofSelSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<IofSelSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<IofSelSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<IofSelSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<IofSelSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<IofSelSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<IofSelSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<IofSelSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<IofSelSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/low_ie.rs b/e310x/src/gpio0/low_ie.rs
index b696aea..260e0a2 100644
--- a/e310x/src/gpio0/low_ie.rs
+++ b/e310x/src/gpio0/low_ie.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<LowIeSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<LowIeSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<LowIeSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<LowIeSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<LowIeSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<LowIeSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<LowIeSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<LowIeSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<LowIeSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<LowIeSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<LowIeSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<LowIeSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<LowIeSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<LowIeSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<LowIeSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<LowIeSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<LowIeSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<LowIeSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<LowIeSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<LowIeSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<LowIeSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<LowIeSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<LowIeSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<LowIeSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<LowIeSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<LowIeSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<LowIeSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<LowIeSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<LowIeSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<LowIeSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<LowIeSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<LowIeSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/low_ip.rs b/e310x/src/gpio0/low_ip.rs
index f9660d4..2902074 100644
--- a/e310x/src/gpio0/low_ip.rs
+++ b/e310x/src/gpio0/low_ip.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<LowIpSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<LowIpSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<LowIpSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<LowIpSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<LowIpSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<LowIpSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<LowIpSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<LowIpSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<LowIpSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<LowIpSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<LowIpSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<LowIpSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<LowIpSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<LowIpSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<LowIpSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<LowIpSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<LowIpSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<LowIpSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<LowIpSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<LowIpSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<LowIpSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<LowIpSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<LowIpSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<LowIpSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<LowIpSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<LowIpSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<LowIpSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<LowIpSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<LowIpSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<LowIpSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<LowIpSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<LowIpSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/out_xor.rs b/e310x/src/gpio0/out_xor.rs
index dde20db..8d38451 100644
--- a/e310x/src/gpio0/out_xor.rs
+++ b/e310x/src/gpio0/out_xor.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<OutXorSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<OutXorSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<OutXorSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<OutXorSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<OutXorSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<OutXorSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<OutXorSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<OutXorSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<OutXorSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<OutXorSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<OutXorSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<OutXorSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<OutXorSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<OutXorSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<OutXorSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<OutXorSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<OutXorSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<OutXorSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<OutXorSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<OutXorSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<OutXorSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<OutXorSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<OutXorSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<OutXorSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<OutXorSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<OutXorSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<OutXorSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<OutXorSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<OutXorSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<OutXorSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<OutXorSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<OutXorSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/output_en.rs b/e310x/src/gpio0/output_en.rs
index 3e56491..f51e43d 100644
--- a/e310x/src/gpio0/output_en.rs
+++ b/e310x/src/gpio0/output_en.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<OutputEnSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<OutputEnSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<OutputEnSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<OutputEnSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<OutputEnSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<OutputEnSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<OutputEnSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<OutputEnSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<OutputEnSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<OutputEnSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<OutputEnSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<OutputEnSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<OutputEnSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<OutputEnSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<OutputEnSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<OutputEnSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<OutputEnSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<OutputEnSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<OutputEnSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<OutputEnSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<OutputEnSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<OutputEnSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<OutputEnSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<OutputEnSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<OutputEnSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<OutputEnSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<OutputEnSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<OutputEnSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<OutputEnSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<OutputEnSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<OutputEnSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<OutputEnSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/output_val.rs b/e310x/src/gpio0/output_val.rs
index 876de01..48b1645 100644
--- a/e310x/src/gpio0/output_val.rs
+++ b/e310x/src/gpio0/output_val.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<OutputValSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<OutputValSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<OutputValSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<OutputValSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<OutputValSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<OutputValSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<OutputValSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<OutputValSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<OutputValSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<OutputValSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<OutputValSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<OutputValSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<OutputValSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<OutputValSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<OutputValSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<OutputValSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<OutputValSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<OutputValSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<OutputValSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<OutputValSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<OutputValSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<OutputValSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<OutputValSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<OutputValSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<OutputValSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<OutputValSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<OutputValSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<OutputValSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<OutputValSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<OutputValSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<OutputValSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<OutputValSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/pullup.rs b/e310x/src/gpio0/pullup.rs
index c3ef136..3a31897 100644
--- a/e310x/src/gpio0/pullup.rs
+++ b/e310x/src/gpio0/pullup.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<PullupSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<PullupSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<PullupSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<PullupSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<PullupSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<PullupSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<PullupSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<PullupSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<PullupSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<PullupSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<PullupSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<PullupSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<PullupSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<PullupSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<PullupSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<PullupSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<PullupSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<PullupSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<PullupSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<PullupSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<PullupSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<PullupSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<PullupSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<PullupSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<PullupSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<PullupSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<PullupSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<PullupSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<PullupSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<PullupSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<PullupSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<PullupSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/rise_ie.rs b/e310x/src/gpio0/rise_ie.rs
index c3d628b..a422759 100644
--- a/e310x/src/gpio0/rise_ie.rs
+++ b/e310x/src/gpio0/rise_ie.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<RiseIeSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<RiseIeSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<RiseIeSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<RiseIeSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<RiseIeSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<RiseIeSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<RiseIeSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<RiseIeSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<RiseIeSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<RiseIeSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<RiseIeSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<RiseIeSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<RiseIeSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<RiseIeSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<RiseIeSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<RiseIeSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<RiseIeSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<RiseIeSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<RiseIeSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<RiseIeSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<RiseIeSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<RiseIeSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<RiseIeSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<RiseIeSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<RiseIeSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<RiseIeSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<RiseIeSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<RiseIeSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<RiseIeSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<RiseIeSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<RiseIeSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<RiseIeSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/gpio0/rise_ip.rs b/e310x/src/gpio0/rise_ip.rs
index 1d70a1f..60b0ea6 100644
--- a/e310x/src/gpio0/rise_ip.rs
+++ b/e310x/src/gpio0/rise_ip.rs
@@ -295,193 +295,161 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn pin0(&mut self) -> Pin0W<RiseIpSpec> {
         Pin0W::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn pin1(&mut self) -> Pin1W<RiseIpSpec> {
         Pin1W::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn pin2(&mut self) -> Pin2W<RiseIpSpec> {
         Pin2W::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn pin3(&mut self) -> Pin3W<RiseIpSpec> {
         Pin3W::new(self, 3)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pin4(&mut self) -> Pin4W<RiseIpSpec> {
         Pin4W::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pin5(&mut self) -> Pin5W<RiseIpSpec> {
         Pin5W::new(self, 5)
     }
     #[doc = "Bit 6"]
     #[inline(always)]
-    #[must_use]
     pub fn pin6(&mut self) -> Pin6W<RiseIpSpec> {
         Pin6W::new(self, 6)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn pin7(&mut self) -> Pin7W<RiseIpSpec> {
         Pin7W::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn pin8(&mut self) -> Pin8W<RiseIpSpec> {
         Pin8W::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn pin9(&mut self) -> Pin9W<RiseIpSpec> {
         Pin9W::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn pin10(&mut self) -> Pin10W<RiseIpSpec> {
         Pin10W::new(self, 10)
     }
     #[doc = "Bit 11"]
     #[inline(always)]
-    #[must_use]
     pub fn pin11(&mut self) -> Pin11W<RiseIpSpec> {
         Pin11W::new(self, 11)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn pin12(&mut self) -> Pin12W<RiseIpSpec> {
         Pin12W::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn pin13(&mut self) -> Pin13W<RiseIpSpec> {
         Pin13W::new(self, 13)
     }
     #[doc = "Bit 14"]
     #[inline(always)]
-    #[must_use]
     pub fn pin14(&mut self) -> Pin14W<RiseIpSpec> {
         Pin14W::new(self, 14)
     }
     #[doc = "Bit 15"]
     #[inline(always)]
-    #[must_use]
     pub fn pin15(&mut self) -> Pin15W<RiseIpSpec> {
         Pin15W::new(self, 15)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn pin16(&mut self) -> Pin16W<RiseIpSpec> {
         Pin16W::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn pin17(&mut self) -> Pin17W<RiseIpSpec> {
         Pin17W::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn pin18(&mut self) -> Pin18W<RiseIpSpec> {
         Pin18W::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn pin19(&mut self) -> Pin19W<RiseIpSpec> {
         Pin19W::new(self, 19)
     }
     #[doc = "Bit 20"]
     #[inline(always)]
-    #[must_use]
     pub fn pin20(&mut self) -> Pin20W<RiseIpSpec> {
         Pin20W::new(self, 20)
     }
     #[doc = "Bit 21"]
     #[inline(always)]
-    #[must_use]
     pub fn pin21(&mut self) -> Pin21W<RiseIpSpec> {
         Pin21W::new(self, 21)
     }
     #[doc = "Bit 22"]
     #[inline(always)]
-    #[must_use]
     pub fn pin22(&mut self) -> Pin22W<RiseIpSpec> {
         Pin22W::new(self, 22)
     }
     #[doc = "Bit 23"]
     #[inline(always)]
-    #[must_use]
     pub fn pin23(&mut self) -> Pin23W<RiseIpSpec> {
         Pin23W::new(self, 23)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn pin24(&mut self) -> Pin24W<RiseIpSpec> {
         Pin24W::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn pin25(&mut self) -> Pin25W<RiseIpSpec> {
         Pin25W::new(self, 25)
     }
     #[doc = "Bit 26"]
     #[inline(always)]
-    #[must_use]
     pub fn pin26(&mut self) -> Pin26W<RiseIpSpec> {
         Pin26W::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn pin27(&mut self) -> Pin27W<RiseIpSpec> {
         Pin27W::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn pin28(&mut self) -> Pin28W<RiseIpSpec> {
         Pin28W::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn pin29(&mut self) -> Pin29W<RiseIpSpec> {
         Pin29W::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn pin30(&mut self) -> Pin30W<RiseIpSpec> {
         Pin30W::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn pin31(&mut self) -> Pin31W<RiseIpSpec> {
         Pin31W::new(self, 31)
     }
diff --git a/e310x/src/i2c0.rs b/e310x/src/i2c0.rs
index 493193a..1161c0f 100644
--- a/e310x/src/i2c0.rs
+++ b/e310x/src/i2c0.rs
@@ -31,17 +31,17 @@ impl RegisterBlock {
     #[doc = "0x10 - Status register"]
     #[inline(always)]
     pub const fn sr(&self) -> &Sr {
-        unsafe { &*(self as *const Self).cast::<u8>().add(16).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(16).cast() }
     }
     #[doc = "0x10 - Command register"]
     #[inline(always)]
     pub const fn cr(&self) -> &Cr {
-        unsafe { &*(self as *const Self).cast::<u8>().add(16).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(16).cast() }
     }
     #[doc = "0x10 - Command register / Status register"]
     #[inline(always)]
     pub const fn cr_sr(&self) -> &CrSr {
-        unsafe { &*(self as *const Self).cast::<u8>().add(16).cast() }
+        unsafe { &*core::ptr::from_ref(self).cast::<u8>().add(16).cast() }
     }
 }
 #[doc = "prer_lo (rw) register accessor: Clock Prescale register lo-byte\n\nYou can [`read`](crate::Reg::read) this register and get [`prer_lo::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`prer_lo::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prer_lo`]
diff --git a/e310x/src/i2c0/cr.rs b/e310x/src/i2c0/cr.rs
index 3f6fbb3..3800fce 100644
--- a/e310x/src/i2c0/cr.rs
+++ b/e310x/src/i2c0/cr.rs
@@ -44,37 +44,31 @@ pub type StaW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0 - Interrupt acknowledge. When set, clears a pending interrupt"]
     #[inline(always)]
-    #[must_use]
     pub fn iack(&mut self) -> IackW<CrSpec> {
         IackW::new(self, 0)
     }
     #[doc = "Bit 3 - When a receiver, sent ACK (0) or NACK (1)"]
     #[inline(always)]
-    #[must_use]
     pub fn ack(&mut self) -> AckW<CrSpec> {
         AckW::new(self, 3)
     }
     #[doc = "Bit 4 - Write to slave"]
     #[inline(always)]
-    #[must_use]
     pub fn wr(&mut self) -> WrW<CrSpec> {
         WrW::new(self, 4)
     }
     #[doc = "Bit 5 - Read from slave"]
     #[inline(always)]
-    #[must_use]
     pub fn rd(&mut self) -> RdW<CrSpec> {
         RdW::new(self, 5)
     }
     #[doc = "Bit 6 - Generate stop condition"]
     #[inline(always)]
-    #[must_use]
     pub fn sto(&mut self) -> StoW<CrSpec> {
         StoW::new(self, 6)
     }
     #[doc = "Bit 7 - Generate (repeated) start condition"]
     #[inline(always)]
-    #[must_use]
     pub fn sta(&mut self) -> StaW<CrSpec> {
         StaW::new(self, 7)
     }
diff --git a/e310x/src/i2c0/ctr.rs b/e310x/src/i2c0/ctr.rs
index 474cca8..2108cef 100644
--- a/e310x/src/i2c0/ctr.rs
+++ b/e310x/src/i2c0/ctr.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bit 6 - I2C core interrupt enable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn ien(&mut self) -> IenW<CtrSpec> {
         IenW::new(self, 6)
     }
     #[doc = "Bit 7 - I2C core enable bit"]
     #[inline(always)]
-    #[must_use]
     pub fn en(&mut self) -> EnW<CtrSpec> {
         EnW::new(self, 7)
     }
diff --git a/e310x/src/i2c0/prer_hi.rs b/e310x/src/i2c0/prer_hi.rs
index 1b9029a..ce91b6a 100644
--- a/e310x/src/i2c0/prer_hi.rs
+++ b/e310x/src/i2c0/prer_hi.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:7"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<PrerHiSpec> {
         ValueW::new(self, 0)
     }
diff --git a/e310x/src/i2c0/prer_lo.rs b/e310x/src/i2c0/prer_lo.rs
index b00c9d6..2e774da 100644
--- a/e310x/src/i2c0/prer_lo.rs
+++ b/e310x/src/i2c0/prer_lo.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:7"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<PrerLoSpec> {
         ValueW::new(self, 0)
     }
diff --git a/e310x/src/i2c0/txr_rxr.rs b/e310x/src/i2c0/txr_rxr.rs
index 9684ac7..786cebc 100644
--- a/e310x/src/i2c0/txr_rxr.rs
+++ b/e310x/src/i2c0/txr_rxr.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:7"]
     #[inline(always)]
-    #[must_use]
     pub fn data(&mut self) -> DataW<TxrRxrSpec> {
         DataW::new(self, 0)
     }
diff --git a/e310x/src/interrupt.rs b/e310x/src/interrupt.rs
index fa18484..1d045f7 100644
--- a/e310x/src/interrupt.rs
+++ b/e310x/src/interrupt.rs
@@ -1,7 +1,66 @@
-#[doc = r"Enumeration of all the interrupts."]
-#[derive(Copy, Clone, Debug, PartialEq, Eq)]
-#[repr(u16)]
-pub enum Interrupt {
+#[doc = r" Core interrupts. These interrupts are handled by the core itself."]
+# [riscv :: pac_enum (unsafe CoreInterruptNumber)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum CoreInterrupt {
+    #[doc = "3 - Machine Software Interrupt"]
+    MachineSoft = 3,
+    #[doc = "7 - Machine Timer Interrupt"]
+    MachineTimer = 7,
+    #[doc = "11 - Machine External Interrupt"]
+    MachineExternal = 11,
+}
+pub use riscv::interrupt::Exception;
+#[doc = r" Priority levels in the device"]
+# [riscv :: pac_enum (unsafe PriorityNumber)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum Priority {
+    #[doc = "0 - Priority level 0"]
+    P0 = 0,
+    #[doc = "1 - Priority level 1"]
+    P1 = 1,
+    #[doc = "2 - Priority level 2"]
+    P2 = 2,
+    #[doc = "3 - Priority level 3"]
+    P3 = 3,
+    #[doc = "4 - Priority level 4"]
+    P4 = 4,
+    #[doc = "5 - Priority level 5"]
+    P5 = 5,
+    #[doc = "6 - Priority level 6"]
+    P6 = 6,
+    #[doc = "7 - Priority level 7"]
+    P7 = 7,
+}
+#[doc = r" HARTs in the device"]
+# [riscv :: pac_enum (unsafe HartIdNumber)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum Hart {
+    #[doc = "0 - Hart 0"]
+    H0 = 0,
+}
+pub use riscv::{
+    interrupt::{disable, enable, free, nested},
+    ExceptionNumber, HartIdNumber, InterruptNumber, PriorityNumber,
+};
+pub type Trap = riscv::interrupt::Trap<CoreInterrupt, Exception>;
+#[doc = r" Retrieves the cause of a trap in the current hart."]
+#[doc = r""]
+#[doc = r" If the raw cause is not a valid interrupt or exception for the target, it returns an error."]
+#[inline]
+pub fn try_cause() -> riscv::result::Result<Trap> {
+    riscv::interrupt::try_cause()
+}
+#[doc = r" Retrieves the cause of a trap in the current hart (machine mode)."]
+#[doc = r""]
+#[doc = r" If the raw cause is not a valid interrupt or exception for the target, it panics."]
+#[inline]
+pub fn cause() -> Trap {
+    try_cause().unwrap()
+}
+#[doc = r" External interrupts. These interrupts are handled by the external peripherals."]
+# [riscv :: pac_enum (unsafe ExternalInterruptNumber)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum ExternalInterrupt {
     #[doc = "1 - WATCHDOG"]
     WATCHDOG = 1,
     #[doc = "2 - RTC"]
@@ -107,105 +166,12 @@ pub enum Interrupt {
     #[doc = "52 - I2C0"]
     I2C0 = 52,
 }
-#[doc = r" TryFromInterruptError"]
-#[derive(Debug, Copy, Clone)]
-pub struct TryFromInterruptError(());
-impl Interrupt {
-    #[doc = r" Attempt to convert a given value into an `Interrupt`"]
-    #[inline]
-    pub fn try_from(value: u8) -> Result<Self, TryFromInterruptError> {
-        match value {
-            1 => Ok(Interrupt::WATCHDOG),
-            2 => Ok(Interrupt::RTC),
-            3 => Ok(Interrupt::UART0),
-            4 => Ok(Interrupt::UART1),
-            5 => Ok(Interrupt::QSPI0),
-            6 => Ok(Interrupt::QSPI1),
-            7 => Ok(Interrupt::QSPI2),
-            8 => Ok(Interrupt::GPIO0),
-            9 => Ok(Interrupt::GPIO1),
-            10 => Ok(Interrupt::GPIO2),
-            11 => Ok(Interrupt::GPIO3),
-            12 => Ok(Interrupt::GPIO4),
-            13 => Ok(Interrupt::GPIO5),
-            14 => Ok(Interrupt::GPIO6),
-            15 => Ok(Interrupt::GPIO7),
-            16 => Ok(Interrupt::GPIO8),
-            17 => Ok(Interrupt::GPIO9),
-            18 => Ok(Interrupt::GPIO10),
-            19 => Ok(Interrupt::GPIO11),
-            20 => Ok(Interrupt::GPIO12),
-            21 => Ok(Interrupt::GPIO13),
-            22 => Ok(Interrupt::GPIO14),
-            23 => Ok(Interrupt::GPIO15),
-            24 => Ok(Interrupt::GPIO16),
-            25 => Ok(Interrupt::GPIO17),
-            26 => Ok(Interrupt::GPIO18),
-            27 => Ok(Interrupt::GPIO19),
-            28 => Ok(Interrupt::GPIO20),
-            29 => Ok(Interrupt::GPIO21),
-            30 => Ok(Interrupt::GPIO22),
-            31 => Ok(Interrupt::GPIO23),
-            32 => Ok(Interrupt::GPIO24),
-            33 => Ok(Interrupt::GPIO25),
-            34 => Ok(Interrupt::GPIO26),
-            35 => Ok(Interrupt::GPIO27),
-            36 => Ok(Interrupt::GPIO28),
-            37 => Ok(Interrupt::GPIO29),
-            38 => Ok(Interrupt::GPIO30),
-            39 => Ok(Interrupt::GPIO31),
-            40 => Ok(Interrupt::PWM0CMP0),
-            41 => Ok(Interrupt::PWM0CMP1),
-            42 => Ok(Interrupt::PWM0CMP2),
-            43 => Ok(Interrupt::PWM0CMP3),
-            44 => Ok(Interrupt::PWM1CMP0),
-            45 => Ok(Interrupt::PWM1CMP1),
-            46 => Ok(Interrupt::PWM1CMP2),
-            47 => Ok(Interrupt::PWM1CMP3),
-            48 => Ok(Interrupt::PWM2CMP0),
-            49 => Ok(Interrupt::PWM2CMP1),
-            50 => Ok(Interrupt::PWM2CMP2),
-            51 => Ok(Interrupt::PWM2CMP3),
-            52 => Ok(Interrupt::I2C0),
-            _ => Err(TryFromInterruptError(())),
-        }
+#[cfg(feature = "rt")]
+#[riscv_rt::core_interrupt(CoreInterrupt::MachineExternal)]
+fn plic_handler() {
+    let claim = crate::PLIC::ctx(Hart::H0).claim();
+    if let Some(s) = claim.claim::<ExternalInterrupt>() {
+        unsafe { _dispatch_external_interrupt(s.number()) }
+        claim.complete(s);
     }
 }
-#[cfg(feature = "rt")]
-#[macro_export]
-#[doc = r" Assigns a handler to an interrupt"]
-#[doc = r""]
-#[doc = r" This macro takes two arguments: the name of an interrupt and the path to the"]
-#[doc = r" function that will be used as the handler of that interrupt. That function"]
-#[doc = r" must have signature `fn()`."]
-#[doc = r""]
-#[doc = r" Optionally, a third argument may be used to declare interrupt local data."]
-#[doc = r" The handler will have exclusive access to these *local* variables on each"]
-#[doc = r" invocation. If the third argument is used then the signature of the handler"]
-#[doc = r" function must be `fn(&mut $NAME::Locals)` where `$NAME` is the first argument"]
-#[doc = r" passed to the macro."]
-#[doc = r""]
-#[doc = r" # Example"]
-#[doc = r""]
-#[doc = r" ``` ignore"]
-#[doc = r" interrupt!(TIM2, periodic);"]
-#[doc = r""]
-#[doc = r" fn periodic() {"]
-#[doc = r#"     print!(".");"#]
-#[doc = r" }"]
-#[doc = r""]
-#[doc = r" interrupt!(TIM3, tick, locals: {"]
-#[doc = r"     tick: bool = false;"]
-#[doc = r" });"]
-#[doc = r""]
-#[doc = r" fn tick(locals: &mut TIM3::Locals) {"]
-#[doc = r"     locals.tick = !locals.tick;"]
-#[doc = r""]
-#[doc = r"     if locals.tick {"]
-#[doc = r#"         println!("Tick");"#]
-#[doc = r"     } else {"]
-#[doc = r#"         println!("Tock");"#]
-#[doc = r"     }"]
-#[doc = r" }"]
-#[doc = r" ```"]
-macro_rules ! interrupt { ($ NAME : ident , $ path : path , locals : { $ ($ lvar : ident : $ lty : ty = $ lval : expr ;) * }) => { # [allow (non_snake_case)] mod $ NAME { pub struct Locals { $ (pub $ lvar : $ lty ,) * } } # [allow (non_snake_case)] # [no_mangle] pub extern "C" fn $ NAME () { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; static mut LOCALS : self :: $ NAME :: Locals = self :: $ NAME :: Locals { $ ($ lvar : $ lval ,) * } ; let f : fn (& mut self :: $ NAME :: Locals) = $ path ; f (unsafe { & mut LOCALS }) ; } } ; ($ NAME : ident , $ path : path) => { # [allow (non_snake_case)] # [no_mangle] pub extern "C" fn $ NAME () { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; let f : fn () = $ path ; f () ; } } }
diff --git a/e310x/src/lib.rs b/e310x/src/lib.rs
index f617f42..111cdef 100644
--- a/e310x/src/lib.rs
+++ b/e310x/src/lib.rs
@@ -1,5 +1,5 @@
-#![doc = "Peripheral access API for FE310 microcontrollers (generated using svd2rust v0.33.4 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
-svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.4/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
+#![doc = "Peripheral access API for FE310 microcontrollers (generated using svd2rust v0.33.5 (90ef2a6 2024-10-21))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next]
+svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.5/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
 #![allow(non_camel_case_types)]
 #![allow(non_snake_case)]
 #![no_std]
@@ -9,220 +9,10 @@ use core::ops::Deref;
 use generic::*;
 #[doc = "Common register and bit access and modify traits"]
 pub mod generic;
-#[cfg(feature = "rt")]
-extern "C" {
-    fn WATCHDOG();
-    fn RTC();
-    fn UART0();
-    fn UART1();
-    fn QSPI0();
-    fn QSPI1();
-    fn QSPI2();
-    fn GPIO0();
-    fn GPIO1();
-    fn GPIO2();
-    fn GPIO3();
-    fn GPIO4();
-    fn GPIO5();
-    fn GPIO6();
-    fn GPIO7();
-    fn GPIO8();
-    fn GPIO9();
-    fn GPIO10();
-    fn GPIO11();
-    fn GPIO12();
-    fn GPIO13();
-    fn GPIO14();
-    fn GPIO15();
-    fn GPIO16();
-    fn GPIO17();
-    fn GPIO18();
-    fn GPIO19();
-    fn GPIO20();
-    fn GPIO21();
-    fn GPIO22();
-    fn GPIO23();
-    fn GPIO24();
-    fn GPIO25();
-    fn GPIO26();
-    fn GPIO27();
-    fn GPIO28();
-    fn GPIO29();
-    fn GPIO30();
-    fn GPIO31();
-    fn PWM0CMP0();
-    fn PWM0CMP1();
-    fn PWM0CMP2();
-    fn PWM0CMP3();
-    fn PWM1CMP0();
-    fn PWM1CMP1();
-    fn PWM1CMP2();
-    fn PWM1CMP3();
-    fn PWM2CMP0();
-    fn PWM2CMP1();
-    fn PWM2CMP2();
-    fn PWM2CMP3();
-    fn I2C0();
-}
-#[doc(hidden)]
-#[repr(C)]
-pub union Vector {
-    pub _handler: unsafe extern "C" fn(),
-    pub _reserved: usize,
-}
-#[cfg(feature = "rt")]
-#[doc(hidden)]
-#[no_mangle]
-pub static __EXTERNAL_INTERRUPTS: [Vector; 53] = [
-    Vector { _reserved: 0 },
-    Vector { _handler: WATCHDOG },
-    Vector { _handler: RTC },
-    Vector { _handler: UART0 },
-    Vector { _handler: UART1 },
-    Vector { _handler: QSPI0 },
-    Vector { _handler: QSPI1 },
-    Vector { _handler: QSPI2 },
-    Vector { _handler: GPIO0 },
-    Vector { _handler: GPIO1 },
-    Vector { _handler: GPIO2 },
-    Vector { _handler: GPIO3 },
-    Vector { _handler: GPIO4 },
-    Vector { _handler: GPIO5 },
-    Vector { _handler: GPIO6 },
-    Vector { _handler: GPIO7 },
-    Vector { _handler: GPIO8 },
-    Vector { _handler: GPIO9 },
-    Vector { _handler: GPIO10 },
-    Vector { _handler: GPIO11 },
-    Vector { _handler: GPIO12 },
-    Vector { _handler: GPIO13 },
-    Vector { _handler: GPIO14 },
-    Vector { _handler: GPIO15 },
-    Vector { _handler: GPIO16 },
-    Vector { _handler: GPIO17 },
-    Vector { _handler: GPIO18 },
-    Vector { _handler: GPIO19 },
-    Vector { _handler: GPIO20 },
-    Vector { _handler: GPIO21 },
-    Vector { _handler: GPIO22 },
-    Vector { _handler: GPIO23 },
-    Vector { _handler: GPIO24 },
-    Vector { _handler: GPIO25 },
-    Vector { _handler: GPIO26 },
-    Vector { _handler: GPIO27 },
-    Vector { _handler: GPIO28 },
-    Vector { _handler: GPIO29 },
-    Vector { _handler: GPIO30 },
-    Vector { _handler: GPIO31 },
-    Vector { _handler: PWM0CMP0 },
-    Vector { _handler: PWM0CMP1 },
-    Vector { _handler: PWM0CMP2 },
-    Vector { _handler: PWM0CMP3 },
-    Vector { _handler: PWM1CMP0 },
-    Vector { _handler: PWM1CMP1 },
-    Vector { _handler: PWM1CMP2 },
-    Vector { _handler: PWM1CMP3 },
-    Vector { _handler: PWM2CMP0 },
-    Vector { _handler: PWM2CMP1 },
-    Vector { _handler: PWM2CMP2 },
-    Vector { _handler: PWM2CMP3 },
-    Vector { _handler: I2C0 },
-];
-#[doc(hidden)]
+#[doc = r" Interrupt numbers, priority levels, and HART IDs."]
 pub mod interrupt;
-pub use self::interrupt::Interrupt;
-#[doc = "Coreplex Local Interrupts"]
-pub struct Clint {
-    _marker: PhantomData<*const ()>,
-}
-unsafe impl Send for Clint {}
-impl Clint {
-    #[doc = r"Pointer to the register block"]
-    pub const PTR: *const clint::RegisterBlock = 0x0200_0000 as *const _;
-    #[doc = r"Return the pointer to the register block"]
-    #[inline(always)]
-    pub const fn ptr() -> *const clint::RegisterBlock {
-        Self::PTR
-    }
-    #[doc = r" Steal an instance of this peripheral"]
-    #[doc = r""]
-    #[doc = r" # Safety"]
-    #[doc = r""]
-    #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"]
-    #[doc = r" that may race with any existing instances, for example by only"]
-    #[doc = r" accessing read-only or write-only registers, or by consuming the"]
-    #[doc = r" original peripheral and using critical sections to coordinate"]
-    #[doc = r" access between multiple new instances."]
-    #[doc = r""]
-    #[doc = r" Additionally, other software such as HALs may rely on only one"]
-    #[doc = r" peripheral instance existing to ensure memory safety; ensure"]
-    #[doc = r" no stolen instances are passed to such software."]
-    pub unsafe fn steal() -> Self {
-        Self {
-            _marker: PhantomData,
-        }
-    }
-}
-impl Deref for Clint {
-    type Target = clint::RegisterBlock;
-    #[inline(always)]
-    fn deref(&self) -> &Self::Target {
-        unsafe { &*Self::PTR }
-    }
-}
-impl core::fmt::Debug for Clint {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        f.debug_struct("Clint").finish()
-    }
-}
-#[doc = "Coreplex Local Interrupts"]
-pub mod clint;
-#[doc = "Platform Level Interrupt Control"]
-pub struct Plic {
-    _marker: PhantomData<*const ()>,
-}
-unsafe impl Send for Plic {}
-impl Plic {
-    #[doc = r"Pointer to the register block"]
-    pub const PTR: *const plic::RegisterBlock = 0x0c00_0000 as *const _;
-    #[doc = r"Return the pointer to the register block"]
-    #[inline(always)]
-    pub const fn ptr() -> *const plic::RegisterBlock {
-        Self::PTR
-    }
-    #[doc = r" Steal an instance of this peripheral"]
-    #[doc = r""]
-    #[doc = r" # Safety"]
-    #[doc = r""]
-    #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"]
-    #[doc = r" that may race with any existing instances, for example by only"]
-    #[doc = r" accessing read-only or write-only registers, or by consuming the"]
-    #[doc = r" original peripheral and using critical sections to coordinate"]
-    #[doc = r" access between multiple new instances."]
-    #[doc = r""]
-    #[doc = r" Additionally, other software such as HALs may rely on only one"]
-    #[doc = r" peripheral instance existing to ensure memory safety; ensure"]
-    #[doc = r" no stolen instances are passed to such software."]
-    pub unsafe fn steal() -> Self {
-        Self {
-            _marker: PhantomData,
-        }
-    }
-}
-impl Deref for Plic {
-    type Target = plic::RegisterBlock;
-    #[inline(always)]
-    fn deref(&self) -> &Self::Target {
-        unsafe { &*Self::PTR }
-    }
-}
-impl core::fmt::Debug for Plic {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        f.debug_struct("Plic").finish()
-    }
-}
-#[doc = "Platform Level Interrupt Control"]
-pub mod plic;
+riscv_peripheral :: clint_codegen ! (base 0x2000000 , freq 32768 , mtimecmps [mtimecmp0 = (crate :: interrupt :: Hart :: H0 , "[0](crate::interrupt::Hart::H0)")] , msips [msip0 = (crate :: interrupt :: Hart :: H0 , "[0](crate::interrupt::Hart::H0)")] ,);
+riscv_peripheral :: plic_codegen ! (base 0xC000000 , ctxs [ctx0 = (crate :: interrupt :: Hart :: H0 , "[0](crate::interrupt::Hart::H0)")] ,);
 #[doc = "Watchdog"]
 pub struct Wdog {
     _marker: PhantomData<*const ()>,
@@ -1010,10 +800,6 @@ static mut DEVICE_PERIPHERALS: bool = false;
 #[doc = r" All the peripherals."]
 #[allow(non_snake_case)]
 pub struct Peripherals {
-    #[doc = "CLINT"]
-    pub clint: Clint,
-    #[doc = "PLIC"]
-    pub plic: Plic,
     #[doc = "WDOG"]
     pub wdog: Wdog,
     #[doc = "RTC"]
@@ -1070,8 +856,6 @@ impl Peripherals {
     pub unsafe fn steal() -> Self {
         DEVICE_PERIPHERALS = true;
         Peripherals {
-            clint: Clint::steal(),
-            plic: Plic::steal(),
             wdog: Wdog::steal(),
             rtc: Rtc::steal(),
             aonclk: Aonclk::steal(),
diff --git a/e310x/src/plic.rs b/e310x/src/plic.rs
deleted file mode 100644
index 0fcb34a..0000000
--- a/e310x/src/plic.rs
+++ /dev/null
@@ -1,87 +0,0 @@
-#[repr(C)]
-#[doc = "Register block"]
-pub struct RegisterBlock {
-    priority: [Priority; 53],
-    _reserved1: [u8; 0x0f2c],
-    pending: [Pending; 2],
-    _reserved2: [u8; 0x0ff8],
-    enable: [Enable; 2],
-    _reserved3: [u8; 0x001f_dff8],
-    threshold: Threshold,
-    claim: Claim,
-}
-impl RegisterBlock {
-    #[doc = "0x00..0xd4 - Interrupt Priority Register"]
-    #[inline(always)]
-    pub const fn priority(&self, n: usize) -> &Priority {
-        &self.priority[n]
-    }
-    #[doc = "Iterator for array of:"]
-    #[doc = "0x00..0xd4 - Interrupt Priority Register"]
-    #[inline(always)]
-    pub fn priority_iter(&self) -> impl Iterator<Item = &Priority> {
-        self.priority.iter()
-    }
-    #[doc = "0x1000..0x1008 - Interrupt Pending Register"]
-    #[inline(always)]
-    pub const fn pending(&self, n: usize) -> &Pending {
-        &self.pending[n]
-    }
-    #[doc = "Iterator for array of:"]
-    #[doc = "0x1000..0x1008 - Interrupt Pending Register"]
-    #[inline(always)]
-    pub fn pending_iter(&self) -> impl Iterator<Item = &Pending> {
-        self.pending.iter()
-    }
-    #[doc = "0x2000..0x2008 - Interrupt Enable Register"]
-    #[inline(always)]
-    pub const fn enable(&self, n: usize) -> &Enable {
-        &self.enable[n]
-    }
-    #[doc = "Iterator for array of:"]
-    #[doc = "0x2000..0x2008 - Interrupt Enable Register"]
-    #[inline(always)]
-    pub fn enable_iter(&self) -> impl Iterator<Item = &Enable> {
-        self.enable.iter()
-    }
-    #[doc = "0x200000 - Priority Threshold Register"]
-    #[inline(always)]
-    pub const fn threshold(&self) -> &Threshold {
-        &self.threshold
-    }
-    #[doc = "0x200004 - Claim/Complete Register"]
-    #[inline(always)]
-    pub const fn claim(&self) -> &Claim {
-        &self.claim
-    }
-}
-#[doc = "priority (rw) register accessor: Interrupt Priority Register\n\nYou can [`read`](crate::Reg::read) this register and get [`priority::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`priority::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@priority`]
-module"]
-#[doc(alias = "priority")]
-pub type Priority = crate::Reg<priority::PrioritySpec>;
-#[doc = "Interrupt Priority Register"]
-pub mod priority;
-#[doc = "pending (rw) register accessor: Interrupt Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pending::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pending::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pending`]
-module"]
-#[doc(alias = "pending")]
-pub type Pending = crate::Reg<pending::PendingSpec>;
-#[doc = "Interrupt Pending Register"]
-pub mod pending;
-#[doc = "enable (rw) register accessor: Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@enable`]
-module"]
-#[doc(alias = "enable")]
-pub type Enable = crate::Reg<enable::EnableSpec>;
-#[doc = "Interrupt Enable Register"]
-pub mod enable;
-#[doc = "threshold (rw) register accessor: Priority Threshold Register\n\nYou can [`read`](crate::Reg::read) this register and get [`threshold::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`threshold::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@threshold`]
-module"]
-#[doc(alias = "threshold")]
-pub type Threshold = crate::Reg<threshold::ThresholdSpec>;
-#[doc = "Priority Threshold Register"]
-pub mod threshold;
-#[doc = "claim (rw) register accessor: Claim/Complete Register\n\nYou can [`read`](crate::Reg::read) this register and get [`claim::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`claim::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@claim`]
-module"]
-#[doc(alias = "claim")]
-pub type Claim = crate::Reg<claim::ClaimSpec>;
-#[doc = "Claim/Complete Register"]
-pub mod claim;
diff --git a/e310x/src/plic/claim.rs b/e310x/src/plic/claim.rs
deleted file mode 100644
index 94bbdef..0000000
--- a/e310x/src/plic/claim.rs
+++ /dev/null
@@ -1,27 +0,0 @@
-#[doc = "Register `claim` reader"]
-pub type R = crate::R<ClaimSpec>;
-#[doc = "Register `claim` writer"]
-pub type W = crate::W<ClaimSpec>;
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        write!(f, "{}", self.bits())
-    }
-}
-impl W {}
-#[doc = "Claim/Complete Register\n\nYou can [`read`](crate::Reg::read) this register and get [`claim::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`claim::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct ClaimSpec;
-impl crate::RegisterSpec for ClaimSpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`claim::R`](R) reader structure"]
-impl crate::Readable for ClaimSpec {}
-#[doc = "`write(|w| ..)` method takes [`claim::W`](W) writer structure"]
-impl crate::Writable for ClaimSpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets claim to value 0"]
-impl crate::Resettable for ClaimSpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/plic/enable.rs b/e310x/src/plic/enable.rs
deleted file mode 100644
index 49582b8..0000000
--- a/e310x/src/plic/enable.rs
+++ /dev/null
@@ -1,28 +0,0 @@
-#[doc = "Register `enable[%s]` reader"]
-pub type R = crate::R<EnableSpec>;
-#[doc = "Register `enable[%s]` writer"]
-pub type W = crate::W<EnableSpec>;
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        write!(f, "{}", self.bits())
-    }
-}
-impl W {}
-#[doc = "Interrupt Enable Register\n\nYou can [`read`](crate::Reg::read) this register and get [`enable::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`enable::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct EnableSpec;
-impl crate::RegisterSpec for EnableSpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`enable::R`](R) reader structure"]
-impl crate::Readable for EnableSpec {}
-#[doc = "`write(|w| ..)` method takes [`enable::W`](W) writer structure"]
-impl crate::Writable for EnableSpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets enable[%s]
-to value 0"]
-impl crate::Resettable for EnableSpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/plic/pending.rs b/e310x/src/plic/pending.rs
deleted file mode 100644
index 7edf1ec..0000000
--- a/e310x/src/plic/pending.rs
+++ /dev/null
@@ -1,28 +0,0 @@
-#[doc = "Register `pending[%s]` reader"]
-pub type R = crate::R<PendingSpec>;
-#[doc = "Register `pending[%s]` writer"]
-pub type W = crate::W<PendingSpec>;
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        write!(f, "{}", self.bits())
-    }
-}
-impl W {}
-#[doc = "Interrupt Pending Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pending::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pending::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct PendingSpec;
-impl crate::RegisterSpec for PendingSpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`pending::R`](R) reader structure"]
-impl crate::Readable for PendingSpec {}
-#[doc = "`write(|w| ..)` method takes [`pending::W`](W) writer structure"]
-impl crate::Writable for PendingSpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets pending[%s]
-to value 0"]
-impl crate::Resettable for PendingSpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/plic/priority.rs b/e310x/src/plic/priority.rs
deleted file mode 100644
index b63d655..0000000
--- a/e310x/src/plic/priority.rs
+++ /dev/null
@@ -1,175 +0,0 @@
-#[doc = "Register `priority[%s]` reader"]
-pub type R = crate::R<PrioritySpec>;
-#[doc = "Register `priority[%s]` writer"]
-pub type W = crate::W<PrioritySpec>;
-#[doc = "\n\nValue on reset: 0"]
-#[derive(Clone, Copy, Debug, PartialEq, Eq)]
-#[repr(u8)]
-pub enum Priority {
-    #[doc = "0: Priority 0 (never interrupt)"]
-    P0 = 0,
-    #[doc = "1: Priority 1"]
-    P1 = 1,
-    #[doc = "2: Priority 2"]
-    P2 = 2,
-    #[doc = "3: Priority 3"]
-    P3 = 3,
-    #[doc = "4: Priority 4"]
-    P4 = 4,
-    #[doc = "5: Priority 5"]
-    P5 = 5,
-    #[doc = "6: Priority 6"]
-    P6 = 6,
-    #[doc = "7: Priority 7"]
-    P7 = 7,
-}
-impl From<Priority> for u8 {
-    #[inline(always)]
-    fn from(variant: Priority) -> Self {
-        variant as _
-    }
-}
-impl crate::FieldSpec for Priority {
-    type Ux = u8;
-}
-impl crate::IsEnum for Priority {}
-#[doc = "Field `priority` reader - "]
-pub type PriorityR = crate::FieldReader<Priority>;
-impl PriorityR {
-    #[doc = "Get enumerated values variant"]
-    #[inline(always)]
-    pub const fn variant(&self) -> Priority {
-        match self.bits {
-            0 => Priority::P0,
-            1 => Priority::P1,
-            2 => Priority::P2,
-            3 => Priority::P3,
-            4 => Priority::P4,
-            5 => Priority::P5,
-            6 => Priority::P6,
-            7 => Priority::P7,
-            _ => unreachable!(),
-        }
-    }
-    #[doc = "Priority 0 (never interrupt)"]
-    #[inline(always)]
-    pub fn is_p0(&self) -> bool {
-        *self == Priority::P0
-    }
-    #[doc = "Priority 1"]
-    #[inline(always)]
-    pub fn is_p1(&self) -> bool {
-        *self == Priority::P1
-    }
-    #[doc = "Priority 2"]
-    #[inline(always)]
-    pub fn is_p2(&self) -> bool {
-        *self == Priority::P2
-    }
-    #[doc = "Priority 3"]
-    #[inline(always)]
-    pub fn is_p3(&self) -> bool {
-        *self == Priority::P3
-    }
-    #[doc = "Priority 4"]
-    #[inline(always)]
-    pub fn is_p4(&self) -> bool {
-        *self == Priority::P4
-    }
-    #[doc = "Priority 5"]
-    #[inline(always)]
-    pub fn is_p5(&self) -> bool {
-        *self == Priority::P5
-    }
-    #[doc = "Priority 6"]
-    #[inline(always)]
-    pub fn is_p6(&self) -> bool {
-        *self == Priority::P6
-    }
-    #[doc = "Priority 7"]
-    #[inline(always)]
-    pub fn is_p7(&self) -> bool {
-        *self == Priority::P7
-    }
-}
-#[doc = "Field `priority` writer - "]
-pub type PriorityW<'a, REG> = crate::FieldWriter<'a, REG, 3, Priority, crate::Safe>;
-impl<'a, REG> PriorityW<'a, REG>
-where
-    REG: crate::Writable + crate::RegisterSpec,
-    REG::Ux: From<u8>,
-{
-    #[doc = "Priority 0 (never interrupt)"]
-    #[inline(always)]
-    pub fn p0(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P0)
-    }
-    #[doc = "Priority 1"]
-    #[inline(always)]
-    pub fn p1(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P1)
-    }
-    #[doc = "Priority 2"]
-    #[inline(always)]
-    pub fn p2(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P2)
-    }
-    #[doc = "Priority 3"]
-    #[inline(always)]
-    pub fn p3(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P3)
-    }
-    #[doc = "Priority 4"]
-    #[inline(always)]
-    pub fn p4(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P4)
-    }
-    #[doc = "Priority 5"]
-    #[inline(always)]
-    pub fn p5(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P5)
-    }
-    #[doc = "Priority 6"]
-    #[inline(always)]
-    pub fn p6(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P6)
-    }
-    #[doc = "Priority 7"]
-    #[inline(always)]
-    pub fn p7(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P7)
-    }
-}
-impl R {
-    #[doc = "Bits 0:2"]
-    #[inline(always)]
-    pub fn priority(&self) -> PriorityR {
-        PriorityR::new((self.bits & 7) as u8)
-    }
-}
-impl W {
-    #[doc = "Bits 0:2"]
-    #[inline(always)]
-    #[must_use]
-    pub fn priority(&mut self) -> PriorityW<PrioritySpec> {
-        PriorityW::new(self, 0)
-    }
-}
-#[doc = "Interrupt Priority Register\n\nYou can [`read`](crate::Reg::read) this register and get [`priority::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`priority::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct PrioritySpec;
-impl crate::RegisterSpec for PrioritySpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`priority::R`](R) reader structure"]
-impl crate::Readable for PrioritySpec {}
-#[doc = "`write(|w| ..)` method takes [`priority::W`](W) writer structure"]
-impl crate::Writable for PrioritySpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets priority[%s]
-to value 0"]
-impl crate::Resettable for PrioritySpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/plic/threshold.rs b/e310x/src/plic/threshold.rs
deleted file mode 100644
index 69a870d..0000000
--- a/e310x/src/plic/threshold.rs
+++ /dev/null
@@ -1,174 +0,0 @@
-#[doc = "Register `threshold` reader"]
-pub type R = crate::R<ThresholdSpec>;
-#[doc = "Register `threshold` writer"]
-pub type W = crate::W<ThresholdSpec>;
-#[doc = "\n\nValue on reset: 0"]
-#[derive(Clone, Copy, Debug, PartialEq, Eq)]
-#[repr(u8)]
-pub enum Priority {
-    #[doc = "0: Allow interrupts with priority > 0"]
-    P0 = 0,
-    #[doc = "1: Allow interrupts with priority > 1"]
-    P1 = 1,
-    #[doc = "2: Allow interrupts with priority > 2"]
-    P2 = 2,
-    #[doc = "3: Allow interrupts with priority > 3"]
-    P3 = 3,
-    #[doc = "4: Allow interrupts with priority > 4"]
-    P4 = 4,
-    #[doc = "5: Allow interrupts with priority > 5"]
-    P5 = 5,
-    #[doc = "6: Allow interrupts with priority > 6"]
-    P6 = 6,
-    #[doc = "7: Mask all interrupts"]
-    P7 = 7,
-}
-impl From<Priority> for u8 {
-    #[inline(always)]
-    fn from(variant: Priority) -> Self {
-        variant as _
-    }
-}
-impl crate::FieldSpec for Priority {
-    type Ux = u8;
-}
-impl crate::IsEnum for Priority {}
-#[doc = "Field `priority` reader - "]
-pub type PriorityR = crate::FieldReader<Priority>;
-impl PriorityR {
-    #[doc = "Get enumerated values variant"]
-    #[inline(always)]
-    pub const fn variant(&self) -> Priority {
-        match self.bits {
-            0 => Priority::P0,
-            1 => Priority::P1,
-            2 => Priority::P2,
-            3 => Priority::P3,
-            4 => Priority::P4,
-            5 => Priority::P5,
-            6 => Priority::P6,
-            7 => Priority::P7,
-            _ => unreachable!(),
-        }
-    }
-    #[doc = "Allow interrupts with priority > 0"]
-    #[inline(always)]
-    pub fn is_p0(&self) -> bool {
-        *self == Priority::P0
-    }
-    #[doc = "Allow interrupts with priority > 1"]
-    #[inline(always)]
-    pub fn is_p1(&self) -> bool {
-        *self == Priority::P1
-    }
-    #[doc = "Allow interrupts with priority > 2"]
-    #[inline(always)]
-    pub fn is_p2(&self) -> bool {
-        *self == Priority::P2
-    }
-    #[doc = "Allow interrupts with priority > 3"]
-    #[inline(always)]
-    pub fn is_p3(&self) -> bool {
-        *self == Priority::P3
-    }
-    #[doc = "Allow interrupts with priority > 4"]
-    #[inline(always)]
-    pub fn is_p4(&self) -> bool {
-        *self == Priority::P4
-    }
-    #[doc = "Allow interrupts with priority > 5"]
-    #[inline(always)]
-    pub fn is_p5(&self) -> bool {
-        *self == Priority::P5
-    }
-    #[doc = "Allow interrupts with priority > 6"]
-    #[inline(always)]
-    pub fn is_p6(&self) -> bool {
-        *self == Priority::P6
-    }
-    #[doc = "Mask all interrupts"]
-    #[inline(always)]
-    pub fn is_p7(&self) -> bool {
-        *self == Priority::P7
-    }
-}
-#[doc = "Field `priority` writer - "]
-pub type PriorityW<'a, REG> = crate::FieldWriter<'a, REG, 3, Priority, crate::Safe>;
-impl<'a, REG> PriorityW<'a, REG>
-where
-    REG: crate::Writable + crate::RegisterSpec,
-    REG::Ux: From<u8>,
-{
-    #[doc = "Allow interrupts with priority > 0"]
-    #[inline(always)]
-    pub fn p0(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P0)
-    }
-    #[doc = "Allow interrupts with priority > 1"]
-    #[inline(always)]
-    pub fn p1(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P1)
-    }
-    #[doc = "Allow interrupts with priority > 2"]
-    #[inline(always)]
-    pub fn p2(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P2)
-    }
-    #[doc = "Allow interrupts with priority > 3"]
-    #[inline(always)]
-    pub fn p3(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P3)
-    }
-    #[doc = "Allow interrupts with priority > 4"]
-    #[inline(always)]
-    pub fn p4(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P4)
-    }
-    #[doc = "Allow interrupts with priority > 5"]
-    #[inline(always)]
-    pub fn p5(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P5)
-    }
-    #[doc = "Allow interrupts with priority > 6"]
-    #[inline(always)]
-    pub fn p6(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P6)
-    }
-    #[doc = "Mask all interrupts"]
-    #[inline(always)]
-    pub fn p7(self) -> &'a mut crate::W<REG> {
-        self.variant(Priority::P7)
-    }
-}
-impl R {
-    #[doc = "Bits 0:2"]
-    #[inline(always)]
-    pub fn priority(&self) -> PriorityR {
-        PriorityR::new((self.bits & 7) as u8)
-    }
-}
-impl W {
-    #[doc = "Bits 0:2"]
-    #[inline(always)]
-    #[must_use]
-    pub fn priority(&mut self) -> PriorityW<ThresholdSpec> {
-        PriorityW::new(self, 0)
-    }
-}
-#[doc = "Priority Threshold Register\n\nYou can [`read`](crate::Reg::read) this register and get [`threshold::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`threshold::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct ThresholdSpec;
-impl crate::RegisterSpec for ThresholdSpec {
-    type Ux = u32;
-}
-#[doc = "`read()` method returns [`threshold::R`](R) reader structure"]
-impl crate::Readable for ThresholdSpec {}
-#[doc = "`write(|w| ..)` method takes [`threshold::W`](W) writer structure"]
-impl crate::Writable for ThresholdSpec {
-    type Safety = crate::Unsafe;
-    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
-}
-#[doc = "`reset()` method sets threshold to value 0"]
-impl crate::Resettable for ThresholdSpec {
-    const RESET_VALUE: u32 = 0;
-}
diff --git a/e310x/src/pmu/pmucause.rs b/e310x/src/pmu/pmucause.rs
index f716e32..eabe01a 100644
--- a/e310x/src/pmu/pmucause.rs
+++ b/e310x/src/pmu/pmucause.rs
@@ -163,13 +163,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:1"]
     #[inline(always)]
-    #[must_use]
     pub fn wakeupcause(&mut self) -> WakeupcauseW<PmucauseSpec> {
         WakeupcauseW::new(self, 0)
     }
     #[doc = "Bits 8:9"]
     #[inline(always)]
-    #[must_use]
     pub fn resetcause(&mut self) -> ResetcauseW<PmucauseSpec> {
         ResetcauseW::new(self, 8)
     }
diff --git a/e310x/src/pmu/pmuie.rs b/e310x/src/pmu/pmuie.rs
index 023c965..91a9175 100644
--- a/e310x/src/pmu/pmuie.rs
+++ b/e310x/src/pmu/pmuie.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn rtc(&mut self) -> RtcW<PmuieSpec> {
         RtcW::new(self, 1)
     }
     #[doc = "Bit 2"]
     #[inline(always)]
-    #[must_use]
     pub fn dwakeup(&mut self) -> DwakeupW<PmuieSpec> {
         DwakeupW::new(self, 2)
     }
     #[doc = "Bit 3"]
     #[inline(always)]
-    #[must_use]
     pub fn awakeup(&mut self) -> AwakeupW<PmuieSpec> {
         AwakeupW::new(self, 3)
     }
diff --git a/e310x/src/pmu/pmusleep.rs b/e310x/src/pmu/pmusleep.rs
index 7cdc56d..1aee511 100644
--- a/e310x/src/pmu/pmusleep.rs
+++ b/e310x/src/pmu/pmusleep.rs
@@ -5,7 +5,6 @@ pub type SleepW<'a, REG> = crate::BitWriter<'a, REG>;
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn sleep(&mut self) -> SleepW<PmusleepSpec> {
         SleepW::new(self, 0)
     }
diff --git a/e310x/src/pmu/pmusleeppm.rs b/e310x/src/pmu/pmusleeppm.rs
index cf59af6..ec6a724 100644
--- a/e310x/src/pmu/pmusleeppm.rs
+++ b/e310x/src/pmu/pmusleeppm.rs
@@ -61,37 +61,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:3"]
     #[inline(always)]
-    #[must_use]
     pub fn delay(&mut self) -> DelayW<PmusleeppmSpec> {
         DelayW::new(self, 0)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pmu_out_0_en(&mut self) -> PmuOut0EnW<PmusleeppmSpec> {
         PmuOut0EnW::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pmu_out_1_en(&mut self) -> PmuOut1EnW<PmusleeppmSpec> {
         PmuOut1EnW::new(self, 5)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn corerst(&mut self) -> CorerstW<PmusleeppmSpec> {
         CorerstW::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn hfclkrst(&mut self) -> HfclkrstW<PmusleeppmSpec> {
         HfclkrstW::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn isolate(&mut self) -> IsolateW<PmusleeppmSpec> {
         IsolateW::new(self, 9)
     }
diff --git a/e310x/src/pmu/pmuwakepm.rs b/e310x/src/pmu/pmuwakepm.rs
index 030488e..4825b40 100644
--- a/e310x/src/pmu/pmuwakepm.rs
+++ b/e310x/src/pmu/pmuwakepm.rs
@@ -61,37 +61,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:3"]
     #[inline(always)]
-    #[must_use]
     pub fn delay(&mut self) -> DelayW<PmuwakepmSpec> {
         DelayW::new(self, 0)
     }
     #[doc = "Bit 4"]
     #[inline(always)]
-    #[must_use]
     pub fn pmu_out_0_en(&mut self) -> PmuOut0EnW<PmuwakepmSpec> {
         PmuOut0EnW::new(self, 4)
     }
     #[doc = "Bit 5"]
     #[inline(always)]
-    #[must_use]
     pub fn pmu_out_1_en(&mut self) -> PmuOut1EnW<PmuwakepmSpec> {
         PmuOut1EnW::new(self, 5)
     }
     #[doc = "Bit 7"]
     #[inline(always)]
-    #[must_use]
     pub fn corerst(&mut self) -> CorerstW<PmuwakepmSpec> {
         CorerstW::new(self, 7)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn hfclkrst(&mut self) -> HfclkrstW<PmuwakepmSpec> {
         HfclkrstW::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn isolate(&mut self) -> IsolateW<PmuwakepmSpec> {
         IsolateW::new(self, 9)
     }
diff --git a/e310x/src/prci/hfrosccfg.rs b/e310x/src/prci/hfrosccfg.rs
index a9d2491..7aad64d 100644
--- a/e310x/src/prci/hfrosccfg.rs
+++ b/e310x/src/prci/hfrosccfg.rs
@@ -43,25 +43,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:5"]
     #[inline(always)]
-    #[must_use]
     pub fn div(&mut self) -> DivW<HfrosccfgSpec> {
         DivW::new(self, 0)
     }
     #[doc = "Bits 16:20"]
     #[inline(always)]
-    #[must_use]
     pub fn trim(&mut self) -> TrimW<HfrosccfgSpec> {
         TrimW::new(self, 16)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<HfrosccfgSpec> {
         EnableW::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn ready(&mut self) -> ReadyW<HfrosccfgSpec> {
         ReadyW::new(self, 31)
     }
diff --git a/e310x/src/prci/hfxosccfg.rs b/e310x/src/prci/hfxosccfg.rs
index ad2cdc9..a29ca19 100644
--- a/e310x/src/prci/hfxosccfg.rs
+++ b/e310x/src/prci/hfxosccfg.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<HfxosccfgSpec> {
         EnableW::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn ready(&mut self) -> ReadyW<HfxosccfgSpec> {
         ReadyW::new(self, 31)
     }
diff --git a/e310x/src/prci/pllcfg.rs b/e310x/src/prci/pllcfg.rs
index cd00cd4..4501cba 100644
--- a/e310x/src/prci/pllcfg.rs
+++ b/e310x/src/prci/pllcfg.rs
@@ -221,43 +221,36 @@ impl R {
 impl W {
     #[doc = "Bits 0:2"]
     #[inline(always)]
-    #[must_use]
     pub fn pllr(&mut self) -> PllrW<PllcfgSpec> {
         PllrW::new(self, 0)
     }
     #[doc = "Bits 4:9"]
     #[inline(always)]
-    #[must_use]
     pub fn pllf(&mut self) -> PllfW<PllcfgSpec> {
         PllfW::new(self, 4)
     }
     #[doc = "Bits 10:11"]
     #[inline(always)]
-    #[must_use]
     pub fn pllq(&mut self) -> PllqW<PllcfgSpec> {
         PllqW::new(self, 10)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn sel(&mut self) -> SelW<PllcfgSpec> {
         SelW::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn refsel(&mut self) -> RefselW<PllcfgSpec> {
         RefselW::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn bypass(&mut self) -> BypassW<PllcfgSpec> {
         BypassW::new(self, 18)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn lock(&mut self) -> LockW<PllcfgSpec> {
         LockW::new(self, 31)
     }
diff --git a/e310x/src/prci/plloutdiv.rs b/e310x/src/prci/plloutdiv.rs
index 44b4b49..b3fb059 100644
--- a/e310x/src/prci/plloutdiv.rs
+++ b/e310x/src/prci/plloutdiv.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:5"]
     #[inline(always)]
-    #[must_use]
     pub fn div(&mut self) -> DivW<PlloutdivSpec> {
         DivW::new(self, 0)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn divby1(&mut self) -> Divby1W<PlloutdivSpec> {
         Divby1W::new(self, 8)
     }
diff --git a/e310x/src/pwm0/cfg.rs b/e310x/src/pwm0/cfg.rs
index 29adbd8..6916b32 100644
--- a/e310x/src/pwm0/cfg.rs
+++ b/e310x/src/pwm0/cfg.rs
@@ -169,109 +169,91 @@ impl R {
 impl W {
     #[doc = "Bits 0:3"]
     #[inline(always)]
-    #[must_use]
     pub fn scale(&mut self) -> ScaleW<CfgSpec> {
         ScaleW::new(self, 0)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn sticky(&mut self) -> StickyW<CfgSpec> {
         StickyW::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn zerocmp(&mut self) -> ZerocmpW<CfgSpec> {
         ZerocmpW::new(self, 9)
     }
     #[doc = "Bit 10"]
     #[inline(always)]
-    #[must_use]
     pub fn deglitch(&mut self) -> DeglitchW<CfgSpec> {
         DeglitchW::new(self, 10)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn enalways(&mut self) -> EnalwaysW<CfgSpec> {
         EnalwaysW::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn enoneshot(&mut self) -> EnoneshotW<CfgSpec> {
         EnoneshotW::new(self, 13)
     }
     #[doc = "Bit 16"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp0center(&mut self) -> Cmp0centerW<CfgSpec> {
         Cmp0centerW::new(self, 16)
     }
     #[doc = "Bit 17"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp1center(&mut self) -> Cmp1centerW<CfgSpec> {
         Cmp1centerW::new(self, 17)
     }
     #[doc = "Bit 18"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp2center(&mut self) -> Cmp2centerW<CfgSpec> {
         Cmp2centerW::new(self, 18)
     }
     #[doc = "Bit 19"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp3center(&mut self) -> Cmp3centerW<CfgSpec> {
         Cmp3centerW::new(self, 19)
     }
     #[doc = "Bit 24"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp0gang(&mut self) -> Cmp0gangW<CfgSpec> {
         Cmp0gangW::new(self, 24)
     }
     #[doc = "Bit 25"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp1gang(&mut self) -> Cmp1gangW<CfgSpec> {
         Cmp1gangW::new(self, 25)
     }
     #[doc = "Bits 26:36"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp2gang(&mut self) -> Cmp2gangW<CfgSpec> {
         Cmp2gangW::new(self, 26)
     }
     #[doc = "Bit 27"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp3gang(&mut self) -> Cmp3gangW<CfgSpec> {
         Cmp3gangW::new(self, 27)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp0ip(&mut self) -> Cmp0ipW<CfgSpec> {
         Cmp0ipW::new(self, 28)
     }
     #[doc = "Bit 29"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp1ip(&mut self) -> Cmp1ipW<CfgSpec> {
         Cmp1ipW::new(self, 29)
     }
     #[doc = "Bit 30"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp2ip(&mut self) -> Cmp2ipW<CfgSpec> {
         Cmp2ipW::new(self, 30)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn cmp3ip(&mut self) -> Cmp3ipW<CfgSpec> {
         Cmp3ipW::new(self, 31)
     }
diff --git a/e310x/src/pwm0/cmp0.rs b/e310x/src/pwm0/cmp0.rs
index ae5e513..04be4bb 100644
--- a/e310x/src/pwm0/cmp0.rs
+++ b/e310x/src/pwm0/cmp0.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<Cmp0Spec> {
         ValueW::new(self, 0)
     }
diff --git a/e310x/src/pwm0/cmp1.rs b/e310x/src/pwm0/cmp1.rs
index ab2467e..f572068 100644
--- a/e310x/src/pwm0/cmp1.rs
+++ b/e310x/src/pwm0/cmp1.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<Cmp1Spec> {
         ValueW::new(self, 0)
     }
diff --git a/e310x/src/pwm0/cmp2.rs b/e310x/src/pwm0/cmp2.rs
index 4b8e903..09ebfe1 100644
--- a/e310x/src/pwm0/cmp2.rs
+++ b/e310x/src/pwm0/cmp2.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<Cmp2Spec> {
         ValueW::new(self, 0)
     }
diff --git a/e310x/src/pwm0/cmp3.rs b/e310x/src/pwm0/cmp3.rs
index c40bd1e..c3f60a7 100644
--- a/e310x/src/pwm0/cmp3.rs
+++ b/e310x/src/pwm0/cmp3.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<Cmp3Spec> {
         ValueW::new(self, 0)
     }
diff --git a/e310x/src/qspi0/csmode.rs b/e310x/src/qspi0/csmode.rs
index acad207..bc1621b 100644
--- a/e310x/src/qspi0/csmode.rs
+++ b/e310x/src/qspi0/csmode.rs
@@ -85,7 +85,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - Chip select mode"]
     #[inline(always)]
-    #[must_use]
     pub fn mode(&mut self) -> ModeW<CsmodeSpec> {
         ModeW::new(self, 0)
     }
diff --git a/e310x/src/qspi0/delay0.rs b/e310x/src/qspi0/delay0.rs
index 328caa7..dbf3898 100644
--- a/e310x/src/qspi0/delay0.rs
+++ b/e310x/src/qspi0/delay0.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - CS to SCK Delay"]
     #[inline(always)]
-    #[must_use]
     pub fn cssck(&mut self) -> CssckW<Delay0Spec> {
         CssckW::new(self, 0)
     }
     #[doc = "Bits 16:23 - SCK to CS Delay"]
     #[inline(always)]
-    #[must_use]
     pub fn sckcs(&mut self) -> SckcsW<Delay0Spec> {
         SckcsW::new(self, 16)
     }
diff --git a/e310x/src/qspi0/delay1.rs b/e310x/src/qspi0/delay1.rs
index 83f393d..2b9a0a6 100644
--- a/e310x/src/qspi0/delay1.rs
+++ b/e310x/src/qspi0/delay1.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Minimum CS inactive time"]
     #[inline(always)]
-    #[must_use]
     pub fn intercs(&mut self) -> IntercsW<Delay1Spec> {
         IntercsW::new(self, 0)
     }
     #[doc = "Bits 16:23 - Maximum interframe delay"]
     #[inline(always)]
-    #[must_use]
     pub fn interxfr(&mut self) -> InterxfrW<Delay1Spec> {
         InterxfrW::new(self, 16)
     }
diff --git a/e310x/src/qspi0/fctrl.rs b/e310x/src/qspi0/fctrl.rs
index 9336ba8..9d3bd34 100644
--- a/e310x/src/qspi0/fctrl.rs
+++ b/e310x/src/qspi0/fctrl.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bit 0 - SPI Flash Mode Select"]
     #[inline(always)]
-    #[must_use]
     pub fn en(&mut self) -> EnW<FctrlSpec> {
         EnW::new(self, 0)
     }
diff --git a/e310x/src/qspi0/ffmt.rs b/e310x/src/qspi0/ffmt.rs
index e8493cf..a50a5a9 100644
--- a/e310x/src/qspi0/ffmt.rs
+++ b/e310x/src/qspi0/ffmt.rs
@@ -286,49 +286,41 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Enable sending of command"]
     #[inline(always)]
-    #[must_use]
     pub fn cmd_en(&mut self) -> CmdEnW<FfmtSpec> {
         CmdEnW::new(self, 0)
     }
     #[doc = "Bits 1:3 - Number of address bytes (0 to 4)"]
     #[inline(always)]
-    #[must_use]
     pub fn addr_len(&mut self) -> AddrLenW<FfmtSpec> {
         AddrLenW::new(self, 1)
     }
     #[doc = "Bits 4:7 - Number of dummy cycles"]
     #[inline(always)]
-    #[must_use]
     pub fn pad_cnt(&mut self) -> PadCntW<FfmtSpec> {
         PadCntW::new(self, 4)
     }
     #[doc = "Bits 8:9 - Protocol for transmitting command"]
     #[inline(always)]
-    #[must_use]
     pub fn cmd_proto(&mut self) -> CmdProtoW<FfmtSpec> {
         CmdProtoW::new(self, 8)
     }
     #[doc = "Bits 10:11 - Protocol for transmitting address and padding"]
     #[inline(always)]
-    #[must_use]
     pub fn addr_proto(&mut self) -> AddrProtoW<FfmtSpec> {
         AddrProtoW::new(self, 10)
     }
     #[doc = "Bits 12:13 - Protocol for receiving data bytes"]
     #[inline(always)]
-    #[must_use]
     pub fn data_proto(&mut self) -> DataProtoW<FfmtSpec> {
         DataProtoW::new(self, 12)
     }
     #[doc = "Bits 16:23 - Value of command byte"]
     #[inline(always)]
-    #[must_use]
     pub fn cmd_code(&mut self) -> CmdCodeW<FfmtSpec> {
         CmdCodeW::new(self, 16)
     }
     #[doc = "Bits 24:31 - First 8 bits to transmit during dummy cycles"]
     #[inline(always)]
-    #[must_use]
     pub fn pad_code(&mut self) -> PadCodeW<FfmtSpec> {
         PadCodeW::new(self, 24)
     }
diff --git a/e310x/src/qspi0/fmt.rs b/e310x/src/qspi0/fmt.rs
index ae575bd..cdbefc3 100644
--- a/e310x/src/qspi0/fmt.rs
+++ b/e310x/src/qspi0/fmt.rs
@@ -210,25 +210,21 @@ impl R {
 impl W {
     #[doc = "Bits 0:1 - SPI protocol"]
     #[inline(always)]
-    #[must_use]
     pub fn proto(&mut self) -> ProtoW<FmtSpec> {
         ProtoW::new(self, 0)
     }
     #[doc = "Bit 2 - SPI endianness"]
     #[inline(always)]
-    #[must_use]
     pub fn endian(&mut self) -> EndianW<FmtSpec> {
         EndianW::new(self, 2)
     }
     #[doc = "Bit 3 - SPI I/O direction"]
     #[inline(always)]
-    #[must_use]
     pub fn dir(&mut self) -> DirW<FmtSpec> {
         DirW::new(self, 3)
     }
     #[doc = "Bits 16:19 - Number of bits per frame"]
     #[inline(always)]
-    #[must_use]
     pub fn len(&mut self) -> LenW<FmtSpec> {
         LenW::new(self, 16)
     }
diff --git a/e310x/src/qspi0/ie.rs b/e310x/src/qspi0/ie.rs
index cd5ebab..ff2bbad 100644
--- a/e310x/src/qspi0/ie.rs
+++ b/e310x/src/qspi0/ie.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transmit watermark enable"]
     #[inline(always)]
-    #[must_use]
     pub fn txwm(&mut self) -> TxwmW<IeSpec> {
         TxwmW::new(self, 0)
     }
     #[doc = "Bit 1 - Receive watermark enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rxwm(&mut self) -> RxwmW<IeSpec> {
         RxwmW::new(self, 1)
     }
diff --git a/e310x/src/qspi0/ip.rs b/e310x/src/qspi0/ip.rs
index 5fffd47..9877dcc 100644
--- a/e310x/src/qspi0/ip.rs
+++ b/e310x/src/qspi0/ip.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Transmit watermark enable"]
     #[inline(always)]
-    #[must_use]
     pub fn txwm(&mut self) -> TxwmW<IpSpec> {
         TxwmW::new(self, 0)
     }
     #[doc = "Bit 1 - Receive watermark enable"]
     #[inline(always)]
-    #[must_use]
     pub fn rxwm(&mut self) -> RxwmW<IpSpec> {
         RxwmW::new(self, 1)
     }
diff --git a/e310x/src/qspi0/rxdata.rs b/e310x/src/qspi0/rxdata.rs
index ae16b59..1a8339b 100644
--- a/e310x/src/qspi0/rxdata.rs
+++ b/e310x/src/qspi0/rxdata.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Received data"]
     #[inline(always)]
-    #[must_use]
     pub fn data(&mut self) -> DataW<RxdataSpec> {
         DataW::new(self, 0)
     }
     #[doc = "Bit 31 - FIFO empty flag"]
     #[inline(always)]
-    #[must_use]
     pub fn empty(&mut self) -> EmptyW<RxdataSpec> {
         EmptyW::new(self, 31)
     }
diff --git a/e310x/src/qspi0/rxmark.rs b/e310x/src/qspi0/rxmark.rs
index 36dc6df..7082ae4 100644
--- a/e310x/src/qspi0/rxmark.rs
+++ b/e310x/src/qspi0/rxmark.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Receive watermark"]
     #[inline(always)]
-    #[must_use]
     pub fn rxmark(&mut self) -> RxmarkW<RxmarkSpec> {
         RxmarkW::new(self, 0)
     }
diff --git a/e310x/src/qspi0/sckdiv.rs b/e310x/src/qspi0/sckdiv.rs
index df80afe..5f9309b 100644
--- a/e310x/src/qspi0/sckdiv.rs
+++ b/e310x/src/qspi0/sckdiv.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:11 - Divisor for serial clock"]
     #[inline(always)]
-    #[must_use]
     pub fn div(&mut self) -> DivW<SckdivSpec> {
         DivW::new(self, 0)
     }
diff --git a/e310x/src/qspi0/sckmode.rs b/e310x/src/qspi0/sckmode.rs
index e4a274c..cabc433 100644
--- a/e310x/src/qspi0/sckmode.rs
+++ b/e310x/src/qspi0/sckmode.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bit 0 - Serial clock phase"]
     #[inline(always)]
-    #[must_use]
     pub fn pha(&mut self) -> PhaW<SckmodeSpec> {
         PhaW::new(self, 0)
     }
     #[doc = "Bit 1 - Serial clock polarity"]
     #[inline(always)]
-    #[must_use]
     pub fn pol(&mut self) -> PolW<SckmodeSpec> {
         PolW::new(self, 1)
     }
diff --git a/e310x/src/qspi0/txdata.rs b/e310x/src/qspi0/txdata.rs
index 6764a25..ea01657 100644
--- a/e310x/src/qspi0/txdata.rs
+++ b/e310x/src/qspi0/txdata.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7 - Transmit data"]
     #[inline(always)]
-    #[must_use]
     pub fn data(&mut self) -> DataW<TxdataSpec> {
         DataW::new(self, 0)
     }
     #[doc = "Bit 31 - FIFO full flag"]
     #[inline(always)]
-    #[must_use]
     pub fn full(&mut self) -> FullW<TxdataSpec> {
         FullW::new(self, 31)
     }
diff --git a/e310x/src/qspi0/txmark.rs b/e310x/src/qspi0/txmark.rs
index 4f93a7b..4580df7 100644
--- a/e310x/src/qspi0/txmark.rs
+++ b/e310x/src/qspi0/txmark.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:2 - Transmit watermark"]
     #[inline(always)]
-    #[must_use]
     pub fn txmark(&mut self) -> TxmarkW<TxmarkSpec> {
         TxmarkW::new(self, 0)
     }
diff --git a/e310x/src/rtc/rtccfg.rs b/e310x/src/rtc/rtccfg.rs
index 3c377a2..1f2fdf9 100644
--- a/e310x/src/rtc/rtccfg.rs
+++ b/e310x/src/rtc/rtccfg.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bits 0:3"]
     #[inline(always)]
-    #[must_use]
     pub fn scale(&mut self) -> ScaleW<RtccfgSpec> {
         ScaleW::new(self, 0)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn enalways(&mut self) -> EnalwaysW<RtccfgSpec> {
         EnalwaysW::new(self, 12)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn cmpip(&mut self) -> CmpipW<RtccfgSpec> {
         CmpipW::new(self, 28)
     }
diff --git a/e310x/src/rtc/rtchi.rs b/e310x/src/rtc/rtchi.rs
index 948227e..285c5f7 100644
--- a/e310x/src/rtc/rtchi.rs
+++ b/e310x/src/rtc/rtchi.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<RtchiSpec> {
         ValueW::new(self, 0)
     }
diff --git a/e310x/src/uart0/div.rs b/e310x/src/uart0/div.rs
index b319636..d977d54 100644
--- a/e310x/src/uart0/div.rs
+++ b/e310x/src/uart0/div.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<DivSpec> {
         ValueW::new(self, 0)
     }
diff --git a/e310x/src/uart0/ie.rs b/e310x/src/uart0/ie.rs
index 23bed86..afedfaa 100644
--- a/e310x/src/uart0/ie.rs
+++ b/e310x/src/uart0/ie.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn txwm(&mut self) -> TxwmW<IeSpec> {
         TxwmW::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn rxwm(&mut self) -> RxwmW<IeSpec> {
         RxwmW::new(self, 1)
     }
diff --git a/e310x/src/uart0/ip.rs b/e310x/src/uart0/ip.rs
index e8a97e1..5dd9cfe 100644
--- a/e310x/src/uart0/ip.rs
+++ b/e310x/src/uart0/ip.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn txwm(&mut self) -> TxwmW<IpSpec> {
         TxwmW::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn rxwm(&mut self) -> RxwmW<IpSpec> {
         RxwmW::new(self, 1)
     }
diff --git a/e310x/src/uart0/rxctrl.rs b/e310x/src/uart0/rxctrl.rs
index 82e9f35..7748ff7 100644
--- a/e310x/src/uart0/rxctrl.rs
+++ b/e310x/src/uart0/rxctrl.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<RxctrlSpec> {
         EnableW::new(self, 0)
     }
     #[doc = "Bits 16:18"]
     #[inline(always)]
-    #[must_use]
     pub fn counter(&mut self) -> CounterW<RxctrlSpec> {
         CounterW::new(self, 16)
     }
diff --git a/e310x/src/uart0/rxdata.rs b/e310x/src/uart0/rxdata.rs
index 186129a..30fe1cb 100644
--- a/e310x/src/uart0/rxdata.rs
+++ b/e310x/src/uart0/rxdata.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7"]
     #[inline(always)]
-    #[must_use]
     pub fn data(&mut self) -> DataW<RxdataSpec> {
         DataW::new(self, 0)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn empty(&mut self) -> EmptyW<RxdataSpec> {
         EmptyW::new(self, 31)
     }
diff --git a/e310x/src/uart0/txctrl.rs b/e310x/src/uart0/txctrl.rs
index de13546..53645e1 100644
--- a/e310x/src/uart0/txctrl.rs
+++ b/e310x/src/uart0/txctrl.rs
@@ -34,19 +34,16 @@ impl R {
 impl W {
     #[doc = "Bit 0"]
     #[inline(always)]
-    #[must_use]
     pub fn enable(&mut self) -> EnableW<TxctrlSpec> {
         EnableW::new(self, 0)
     }
     #[doc = "Bit 1"]
     #[inline(always)]
-    #[must_use]
     pub fn nstop(&mut self) -> NstopW<TxctrlSpec> {
         NstopW::new(self, 1)
     }
     #[doc = "Bits 16:18"]
     #[inline(always)]
-    #[must_use]
     pub fn counter(&mut self) -> CounterW<TxctrlSpec> {
         CounterW::new(self, 16)
     }
diff --git a/e310x/src/uart0/txdata.rs b/e310x/src/uart0/txdata.rs
index e6e23e4..052cbc2 100644
--- a/e310x/src/uart0/txdata.rs
+++ b/e310x/src/uart0/txdata.rs
@@ -25,13 +25,11 @@ impl R {
 impl W {
     #[doc = "Bits 0:7"]
     #[inline(always)]
-    #[must_use]
     pub fn data(&mut self) -> DataW<TxdataSpec> {
         DataW::new(self, 0)
     }
     #[doc = "Bit 31"]
     #[inline(always)]
-    #[must_use]
     pub fn full(&mut self) -> FullW<TxdataSpec> {
         FullW::new(self, 31)
     }
diff --git a/e310x/src/wdog/wdogcfg.rs b/e310x/src/wdog/wdogcfg.rs
index 35fc668..deaca13 100644
--- a/e310x/src/wdog/wdogcfg.rs
+++ b/e310x/src/wdog/wdogcfg.rs
@@ -61,37 +61,31 @@ impl R {
 impl W {
     #[doc = "Bits 0:3"]
     #[inline(always)]
-    #[must_use]
     pub fn scale(&mut self) -> ScaleW<WdogcfgSpec> {
         ScaleW::new(self, 0)
     }
     #[doc = "Bit 8"]
     #[inline(always)]
-    #[must_use]
     pub fn rsten(&mut self) -> RstenW<WdogcfgSpec> {
         RstenW::new(self, 8)
     }
     #[doc = "Bit 9"]
     #[inline(always)]
-    #[must_use]
     pub fn zerocmp(&mut self) -> ZerocmpW<WdogcfgSpec> {
         ZerocmpW::new(self, 9)
     }
     #[doc = "Bit 12"]
     #[inline(always)]
-    #[must_use]
     pub fn enalways(&mut self) -> EnalwaysW<WdogcfgSpec> {
         EnalwaysW::new(self, 12)
     }
     #[doc = "Bit 13"]
     #[inline(always)]
-    #[must_use]
     pub fn encoreawake(&mut self) -> EncoreawakeW<WdogcfgSpec> {
         EncoreawakeW::new(self, 13)
     }
     #[doc = "Bit 28"]
     #[inline(always)]
-    #[must_use]
     pub fn cmpip(&mut self) -> CmpipW<WdogcfgSpec> {
         CmpipW::new(self, 28)
     }
diff --git a/e310x/src/wdog/wdogcmp.rs b/e310x/src/wdog/wdogcmp.rs
index 49dbb9a..204629d 100644
--- a/e310x/src/wdog/wdogcmp.rs
+++ b/e310x/src/wdog/wdogcmp.rs
@@ -16,7 +16,6 @@ impl R {
 impl W {
     #[doc = "Bits 0:15"]
     #[inline(always)]
-    #[must_use]
     pub fn value(&mut self) -> ValueW<WdogcmpSpec> {
         ValueW::new(self, 0)
     }
diff --git a/e310x/update.sh b/e310x/update.sh
index f6b8e84..63cae82 100755
--- a/e310x/update.sh
+++ b/e310x/update.sh
@@ -2,10 +2,10 @@
 set -x
 set -e
 
-# used svd2rust v0.26.0
+# used svd2rust 8b809ac2c1e1a13f30af59ee41f4d66a4995d625 (unreleased)
 rm -rf src
 mkdir src
-svd2rust --target riscv -g -i e310x.svd
+../../svd2rust/target/release/svd2rust --target riscv --settings settings.yaml -g -i e310x.svd
 mv generic.rs src/
 form -i lib.rs -o src/
 rm lib.rs
diff --git a/hifive1-examples/.cargo/config.toml b/hifive1-examples/.cargo/config.toml
new file mode 100644
index 0000000..685d595
--- /dev/null
+++ b/hifive1-examples/.cargo/config.toml
@@ -0,0 +1,11 @@
+[target.'cfg(all(target_arch = "riscv32", target_os = "none"))']
+runner = "qemu-system-riscv32 -machine sifive_e,revb=true -nographic -semihosting-config enable=on,target=native -kernel" # Uncomment for QEMU
+# runner = "riscv64-unknown-elf-gdb -q -x gdb_init" # Uncomment for hardware (no semihosting)
+# runner = "riscv64-unknown-elf-gdb -q -x gdb_init_sh" # Uncomment for hardware (semihosting)
+rustflags = [
+    "-C", "link-arg=-Thifive1-link.x",
+    "--cfg", "portable_atomic_target_feature=\"zaamo\"",
+]
+
+[build]
+target = "riscv32imc-unknown-none-elf"
diff --git a/hifive1-examples/Cargo.toml b/hifive1-examples/Cargo.toml
new file mode 100644
index 0000000..97bb37f
--- /dev/null
+++ b/hifive1-examples/Cargo.toml
@@ -0,0 +1,24 @@
+[package]
+name = "hifive1-examples"
+version = "0.1.0"
+repository = "https://github.com/riscv-rust/e310x"
+authors = ["David Craven <david@craven.ch>"]
+categories = ["embedded", "hardware-support", "no-std"]
+description = "Running examples for HiFive1 and LoFive boards"
+keywords = ["riscv", "register", "peripheral"]
+license = "ISC"
+edition = "2021"
+rust-version = "1.72"
+
+[workspace]
+
+[dependencies]
+critical-section = { version = "1.2.0" }
+hifive1 = { path = "../hifive1", version = "0.14.0", features = ["board-hifive1-revb"] } # Change to your board
+riscv = { version = "0.12.1" }
+riscv-rt = { version = "0.13.0", features = ["single-hart"] }
+panic-halt = "0.2.0"
+semihosting = { version = "0.1",  features = ["stdio", "panic-handler"] }
+
+[features]
+v-trap = ["hifive1/v-trap"]
diff --git a/hifive1-examples/examples/button_poll.rs b/hifive1-examples/examples/button_poll.rs
new file mode 100644
index 0000000..80698e5
--- /dev/null
+++ b/hifive1-examples/examples/button_poll.rs
@@ -0,0 +1,58 @@
+//! Example of polling a button and turning on a LED when the button is pressed.
+//!
+//! # Hardware
+//!
+//! - HiFive1 or RED-V board
+//! - A button connected to pin 9
+
+#![no_std]
+#![no_main]
+
+use hifive1::{
+    clock,
+    hal::{e310x::CLINT, prelude::*, DeviceResources},
+    pin, sprintln, Led,
+};
+extern crate panic_halt;
+
+#[riscv_rt::entry]
+fn main() -> ! {
+    let dr = DeviceResources::take().unwrap();
+    let p = dr.peripherals;
+    let pins = dr.pins;
+
+    // Configure clocks
+    let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into());
+
+    // Configure UART for stdout
+    hifive1::stdout::configure(
+        p.UART0,
+        pin!(pins, uart0_tx),
+        pin!(pins, uart0_rx),
+        115_200.bps(),
+        clocks,
+    );
+
+    // Configure button pin as pull-up input
+    let mut button = pins.pin9.into_pull_up_input();
+
+    // get blue LED pin
+    let pin = pin!(pins, led_blue);
+    let mut led = pin.into_inverted_output();
+
+    // Get the sleep struct from CLINT
+    let mut sleep = CLINT::delay();
+
+    const STEP: u32 = 1000; // 1s
+    loop {
+        if button.is_low().unwrap() {
+            sprintln!("Button pressed");
+            led.on();
+        } else {
+            sprintln!("Button released");
+            led.off();
+        }
+        sprintln!("LED is on: {}", led.is_on());
+        sleep.delay_ms(STEP);
+    }
+}
diff --git a/hifive1-examples/examples/hello_world.rs b/hifive1-examples/examples/hello_world.rs
new file mode 100644
index 0000000..0ec23a6
--- /dev/null
+++ b/hifive1-examples/examples/hello_world.rs
@@ -0,0 +1,37 @@
+//! Prints "hello world!" to the host console.
+//!
+//! If "semihosting" feature is enabled, the message is printed using semihosting.
+//! Otherwise, the message is printed using the UART0 peripheral.
+
+#![no_std]
+#![no_main]
+
+extern crate panic_halt;
+use hifive1::{
+    hal::{prelude::*, DeviceResources},
+    pin, sprintln as println,
+};
+
+#[riscv_rt::entry]
+fn main() -> ! {
+    let dr = DeviceResources::take().unwrap();
+    let p = dr.peripherals;
+    let pins = dr.pins;
+
+    // Configure clocks
+    let clocks = hifive1::clock::configure(p.PRCI, p.AONCLK, 320.mhz().into());
+
+    // Configure UART for stdout
+    hifive1::stdout::configure(
+        p.UART0,
+        pin!(pins, uart0_tx),
+        pin!(pins, uart0_rx),
+        115_200.bps(),
+        clocks,
+    );
+
+    println!("Hello, world!");
+    loop {
+        riscv::asm::wfi();
+    }
+}
diff --git a/hifive1-examples/examples/led_blink.rs b/hifive1-examples/examples/led_blink.rs
new file mode 100644
index 0000000..bfe607e
--- /dev/null
+++ b/hifive1-examples/examples/led_blink.rs
@@ -0,0 +1,45 @@
+//! Basic blinking LEDs example using mtime/mtimecmp registers for "sleep" in a loop.
+//! Blinks each led once and goes to the next one.
+
+#![no_std]
+#![no_main]
+
+use hifive1::{
+    clock,
+    hal::{e310x::CLINT, prelude::*, DeviceResources},
+    pin, sprintln, Led,
+};
+extern crate panic_halt;
+
+#[riscv_rt::entry]
+fn main() -> ! {
+    let dr = DeviceResources::take().unwrap();
+    let p = dr.peripherals;
+    let pins = dr.pins;
+
+    // Configure clocks
+    let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into());
+
+    // Configure UART for stdout
+    hifive1::stdout::configure(
+        p.UART0,
+        pin!(pins, uart0_tx),
+        pin!(pins, uart0_rx),
+        115_200.bps(),
+        clocks,
+    );
+
+    // get blue LED pin
+    let pin = pin!(pins, led_blue);
+    let mut led = pin.into_inverted_output();
+
+    // Get the sleep struct from CLINT
+    let mut sleep = CLINT::delay();
+
+    const STEP: u32 = 1000; // 1s
+    loop {
+        Led::toggle(&mut led);
+        sprintln!("LED toggled. New state: {}", led.is_on());
+        sleep.delay_ms(STEP);
+    }
+}
diff --git a/hifive1-examples/examples/led_pwm.rs b/hifive1-examples/examples/led_pwm.rs
new file mode 100644
index 0000000..3392e75
--- /dev/null
+++ b/hifive1-examples/examples/led_pwm.rs
@@ -0,0 +1,57 @@
+//! Demonstration of the PWM peripheral to control the brightness of an LED.
+//!
+//! # Hardware
+//!
+//! - HiFive1 or Red-V board
+//! - LED connected to pin 1
+#![no_std]
+#![no_main]
+
+use hifive1::{
+    clock,
+    hal::{e310x::CLINT, prelude::*, DeviceResources},
+    pin, sprintln,
+};
+extern crate panic_halt;
+
+#[riscv_rt::entry]
+fn main() -> ! {
+    let dr = DeviceResources::take().unwrap();
+    let p = dr.peripherals;
+    let pins = dr.pins;
+
+    // Configure clocks
+    let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into());
+
+    // Configure UART for stdout
+    hifive1::stdout::configure(
+        p.UART0,
+        pin!(pins, uart0_tx),
+        pin!(pins, uart0_rx),
+        115_200.bps(),
+        clocks,
+    );
+
+    // get blue LED pin
+    let pin = pin!(pins, pwm0_cmp1).into_inverted_iof1();
+
+    let mut pwm0 = hifive1::hal::pwm::Pwm::new(p.PWM0);
+    pwm0.set_period(255);
+
+    let mut channel = pwm0.channel(pin);
+
+    // Get the sleep struct from CLINT
+    let mut sleep = CLINT::delay();
+
+    const STEP: u32 = 1000; // 1s
+    const DUTY_DELTA: u8 = 32;
+
+    let mut duty: u8 = 0;
+    loop {
+        sprintln!("Duty: {}", duty);
+        channel.set_duty_cycle(duty as u16).unwrap();
+        duty = duty.wrapping_add(DUTY_DELTA);
+
+        sleep.delay_ms(STEP);
+    }
+}
diff --git a/hifive1-examples/examples/rgb_blink.rs b/hifive1-examples/examples/rgb_blink.rs
new file mode 100644
index 0000000..dcea2e7
--- /dev/null
+++ b/hifive1-examples/examples/rgb_blink.rs
@@ -0,0 +1,49 @@
+//! Basic blinking LEDs example using mtime/mtimecmp registers for "sleep" in a loop.
+//! Blinks each led once and goes to the next one.
+
+#![no_std]
+#![no_main]
+
+use hifive1::{
+    clock,
+    hal::{e310x::CLINT, prelude::*, DeviceResources},
+    pin, pins, sprintln, Led,
+};
+extern crate panic_halt;
+
+#[riscv_rt::entry]
+fn main() -> ! {
+    let dr = DeviceResources::take().unwrap();
+    let p = dr.peripherals;
+    let pins = dr.pins;
+
+    // Configure clocks
+    let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into());
+
+    // Configure UART for stdout
+    hifive1::stdout::configure(
+        p.UART0,
+        pin!(pins, uart0_tx),
+        pin!(pins, uart0_rx),
+        115_200.bps(),
+        clocks,
+    );
+
+    // get all 3 led pins in a tuple (each pin is it's own type here)
+    let rgb_pins = pins!(pins, (led_red, led_green, led_blue));
+    let mut tleds = hifive1::rgb(rgb_pins.0, rgb_pins.1, rgb_pins.2);
+    // get leds as the Led trait in an array so we can index them
+    let mut ileds: [&mut dyn Led; 3] = [&mut tleds.0, &mut tleds.1, &mut tleds.2];
+
+    // Get the sleep struct from CLINT
+    let mut sleep = CLINT::delay();
+
+    const STEP: u32 = 1000; // 1s
+    loop {
+        for (i, led) in ileds.iter_mut().enumerate() {
+            led.toggle().unwrap();
+            sprintln!("LED {} toggled. New state: {}", i, led.is_on());
+            sleep.delay_ms(STEP);
+        }
+    }
+}
diff --git a/hifive1-examples/examples/sh_hello_world.rs b/hifive1-examples/examples/sh_hello_world.rs
new file mode 100644
index 0000000..3721524
--- /dev/null
+++ b/hifive1-examples/examples/sh_hello_world.rs
@@ -0,0 +1,13 @@
+//! Prints "hello world!" to the host console using semihosting.
+
+#![no_std]
+#![no_main]
+
+extern crate hifive1;
+use semihosting::{println, process::exit};
+
+#[riscv_rt::entry]
+fn main() -> ! {
+    println!("Hello, world!");
+    exit(0);
+}
diff --git a/hifive1-examples/examples/sh_led_blink.rs b/hifive1-examples/examples/sh_led_blink.rs
new file mode 100644
index 0000000..e0ee160
--- /dev/null
+++ b/hifive1-examples/examples/sh_led_blink.rs
@@ -0,0 +1,41 @@
+//! Basic blinking LEDs example using mtime/mtimecmp registers for "sleep" in a loop.
+//! Blinks each led once and goes to the next one.
+
+#![no_std]
+#![no_main]
+
+use hifive1::{
+    clock,
+    hal::{e310x::CLINT, prelude::*, DeviceResources},
+    pin, Led,
+};
+use semihosting::{println, process::exit};
+
+#[riscv_rt::entry]
+fn main() -> ! {
+    let dr = DeviceResources::take().unwrap();
+    let p = dr.peripherals;
+    let pins = dr.pins;
+
+    // Configure clocks
+    let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into());
+
+    // get all 3 led pins in a tuple (each pin is it's own type here)
+    let pin = pin!(pins, led_blue);
+    let mut led = pin.into_inverted_output();
+
+    // Get the sleep struct from CLINT
+    let mut sleep = CLINT::delay();
+
+    const N_TOGGLE: usize = 4;
+    const STEP: u32 = 500; // 500 ms
+
+    println!("Toggling LED {} times", N_TOGGLE);
+    for _ in 0..N_TOGGLE {
+        Led::toggle(&mut led);
+        println!("LED toggled. New state: {}", led.is_on());
+        sleep.delay_ms(STEP);
+    }
+    println!("Done toggling LED");
+    exit(0);
+}
diff --git a/hifive1-examples/examples/sh_rgb_blink.rs b/hifive1-examples/examples/sh_rgb_blink.rs
new file mode 100644
index 0000000..78cc761
--- /dev/null
+++ b/hifive1-examples/examples/sh_rgb_blink.rs
@@ -0,0 +1,45 @@
+//! Basic blinking LEDs example using mtime/mtimecmp registers for "sleep" in a loop.
+//! Blinks each led once and goes to the next one.
+
+#![no_std]
+#![no_main]
+
+use hifive1::{
+    clock,
+    hal::{e310x::CLINT, prelude::*, DeviceResources},
+    pins, Led,
+};
+use semihosting::{println, process::exit};
+
+#[riscv_rt::entry]
+fn main() -> ! {
+    let dr = DeviceResources::take().unwrap();
+    let p = dr.peripherals;
+    let pins = dr.pins;
+
+    // Configure clocks
+    let clocks = clock::configure(p.PRCI, p.AONCLK, 320.mhz().into());
+
+    // get all 3 led pins in a tuple (each pin is it's own type here)
+    let rgb_pins = pins!(pins, (led_red, led_green, led_blue));
+    let mut tleds = hifive1::rgb(rgb_pins.0, rgb_pins.1, rgb_pins.2);
+    // get leds as the Led trait in an array so we can index them
+    let mut ileds: [&mut dyn Led; 3] = [&mut tleds.0, &mut tleds.1, &mut tleds.2];
+
+    // Get the sleep struct from CLINT
+    let mut sleep = CLINT::delay();
+
+    const N_TOGGLES: usize = 4;
+    const STEP: u32 = 500; // 500ms
+
+    println!("Toggling LEDs {} times", N_TOGGLES);
+    for _ in 0..N_TOGGLES {
+        for (i, led) in ileds.iter_mut().enumerate() {
+            led.toggle().unwrap();
+            println!("LED {i} toggled. New state: {}", led.is_on());
+            sleep.delay_ms(STEP);
+        }
+    }
+    println!("Done toggling LEDs");
+    exit(0);
+}
diff --git a/hifive1-examples/gdb_init b/hifive1-examples/gdb_init
new file mode 100644
index 0000000..8719bc8
--- /dev/null
+++ b/hifive1-examples/gdb_init
@@ -0,0 +1,12 @@
+# GDB init file for HiFive1 boards
+
+# set history save on # uncomment to save history
+set confirm off
+set remotetimeout 240
+set print asm-demangle on
+
+target extended-remote :3333
+monitor reset halt
+load
+continue # uncomment to start running after loading
+# quit # uncomment to exit after loading
diff --git a/hifive1-examples/gdb_init_sh b/hifive1-examples/gdb_init_sh
new file mode 100644
index 0000000..925f2f9
--- /dev/null
+++ b/hifive1-examples/gdb_init_sh
@@ -0,0 +1,13 @@
+# GDB init file for HiFive1 boards (including semihosting)
+
+# set history save on # uncomment to save history
+set confirm off
+set remotetimeout 240
+set print asm-demangle on
+
+target extended-remote :3333
+monitor reset halt
+monitor arm semihosting enable
+load
+continue # uncomment to start running after loading
+# quit # uncomment to exit after loading
diff --git a/hifive1-examples/openocd.sh b/hifive1-examples/openocd.sh
new file mode 100755
index 0000000..2587073
--- /dev/null
+++ b/hifive1-examples/openocd.sh
@@ -0,0 +1,33 @@
+#!/bin/bash
+
+# This script runs OpenOCD with the specified configuration file
+# for the HiFive1 board. The configuration file is selected based
+# on the revb argument, which is a boolean flag that indicates
+# whether the HiFive1 Rev B board is being used. If the revb
+# argument is not provided, the default configuration file for
+# the HiFive1 Rev A board is used.
+
+# Default path to OpenOCD
+OPENOCD_PATH="openocd"
+REVB=false
+
+# Parse command-line arguments
+while [[ "$#" -gt 0 ]]; do
+    case $1 in
+        -p|--path) OPENOCD_PATH="$2"; shift ;;
+        revb) REVB=true ;;
+        *) echo "Unknown parameter passed: $1"; exit 1 ;;
+    esac
+    shift
+done
+
+# Determine the configuration file based on the revb argument
+if [ "$REVB" = true ]; then
+    CONFIG_FILE="sifive-hifive1-revb.cfg"
+else
+    CONFIG_FILE="sifive-hifive1.cfg"
+fi
+
+# Run OpenOCD with the specified configuration file
+echo "Running $OPENOCD_PATH -f board/$CONFIG_FILE"
+$OPENOCD_PATH -f board/$CONFIG_FILE
diff --git a/hifive1-examples/src/main.rs b/hifive1-examples/src/main.rs
new file mode 100644
index 0000000..a39f54a
--- /dev/null
+++ b/hifive1-examples/src/main.rs
@@ -0,0 +1,42 @@
+//! Prints "hello world!" to the host console using the on-board UART.
+//!
+//! # Note
+//!
+//! We have noticed that using the UART while debugging with GDB can cause
+//! the GDB session to hang. Thus, you will probably want to run this example
+//! without GDB. Otherwise, you might not be able to see the output.
+
+#![no_std]
+#![no_main]
+
+use hifive1::{
+    hal::{prelude::*, DeviceResources},
+    pin, sprintln,
+};
+
+extern crate panic_halt;
+
+#[riscv_rt::entry]
+fn main() -> ! {
+    let dr = DeviceResources::take().unwrap();
+    let p = dr.peripherals;
+    let pins = dr.pins;
+
+    // Configure clocks
+    let clocks = hifive1::clock::configure(p.PRCI, p.AONCLK, 320.mhz().into());
+
+    // Configure UART for stdout
+    hifive1::stdout::configure(
+        p.UART0,
+        pin!(pins, uart0_tx),
+        pin!(pins, uart0_rx),
+        115_200.bps(),
+        clocks,
+    );
+
+    sprintln!("Hello, world!");
+
+    loop {
+        riscv::asm::wfi();
+    }
+}
diff --git a/hifive1/CHANGELOG.md b/hifive1/CHANGELOG.md
index 40286ad..6dc5b8c 100644
--- a/hifive1/CHANGELOG.md
+++ b/hifive1/CHANGELOG.md
@@ -6,9 +6,11 @@ The format is based on [Keep a Changelog](http://keepachangelog.com/)
 and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
+- Fix Led implementation, as pins are configured as inverted outputs
+- Adapt to embedded-hal 1.0
 - Replace static muts with Mutexes
 - Apply clippy changes
-- Bump MSRV to 1.72
+- Bump MSRV to 1.76
 - Adapt to new Cargo workspace
 - Use inline assembly instead of binary blobs for flash
 
diff --git a/hifive1/Cargo.toml b/hifive1/Cargo.toml
index ac01280..b85027d 100644
--- a/hifive1/Cargo.toml
+++ b/hifive1/Cargo.toml
@@ -1,21 +1,20 @@
 [package]
 name = "hifive1"
-version = "0.13.0"
-repository = "https://github.com/riscv-rust/hifive1"
+version = "0.14.0"
+repository = "https://github.com/riscv-rust/e310x"
 authors = ["David Craven <david@craven.ch>"]
 categories = ["embedded", "hardware-support", "no-std"]
 description = "Board support crate for HiFive1 and LoFive boards"
 keywords = ["riscv", "register", "peripheral"]
 license = "ISC"
 edition = "2021"
-rust-version = "1.72"
+rust-version = "1.76"
 
 [dependencies]
 critical-section = { version = "1.1.3" }
-e310x-hal = { path = "../e310x-hal", version = "0.11.0" }
-embedded-hal = "0.2.7"
-riscv = "0.10.1"
+e310x-hal = { path = "../e310x-hal", version = "0.12.0" }
 nb = "1.0.0"
+riscv = "0.12.1"
 
 [features]
 board-hifive1 = []
@@ -23,7 +22,7 @@ board-hifive1-revb = ["e310x-hal/g002"]
 board-redv = ["e310x-hal/g002"]
 board-lofive = []
 board-lofive-r1 = ["e310x-hal/g002"]
-virq = ["e310x-hal/virq"]
+v-trap = ["e310x-hal/v-trap"]
 
 [package.metadata.docs.rs]
 features = ['board-hifive1-revb']
diff --git a/hifive1/src/gpio.rs b/hifive1/src/gpio.rs
index abb2d74..ab0014d 100644
--- a/hifive1/src/gpio.rs
+++ b/hifive1/src/gpio.rs
@@ -9,6 +9,7 @@
 ///   - `uart0_<x>` — UART pins where `<x>` is one of (`tx`, `rx`)
 ///   - `dig#` — Digital/physical pins on the board where `#` is from range 0..19
 ///   - `led_<x>` - Internal LED light pins where `<x>` is one of (`red`, `green`, `blue`)
+///   - `pwmN_cmp#` - PWM channels where `N`` is from range 0..2 and `#` is from range 1..3
 ///
 /// # Example
 ///
@@ -127,6 +128,34 @@ macro_rules! pin {
     ($gpio:ident, led_blue) => {
         $gpio.pin21
     };
+    // PWM channels
+    ($gpio:ident, pwm0_cmp1) => {
+        $gpio.pin1
+    };
+    ($gpio:ident, pwm0_cmp2) => {
+        $gpio.pin2
+    };
+    ($gpio:ident, pwm0_cmp3) => {
+        $gpio.pin3
+    };
+    ($gpio:ident, pwm1_cmp1) => {
+        $gpio.pin19
+    };
+    ($gpio:ident, pwm1_cmp2) => {
+        $gpio.pin21
+    };
+    ($gpio:ident, pwm1_cmp3) => {
+        $gpio.pin22
+    };
+    ($gpio:ident, pwm2_cmp1) => {
+        $gpio.pin11
+    };
+    ($gpio:ident, pwm2_cmp2) => {
+        $gpio.pin12
+    };
+    ($gpio:ident, pwm2_cmp3) => {
+        $gpio.pin13
+    };
 }
 
 #[cfg(feature = "board-redv")]
@@ -140,6 +169,7 @@ macro_rules! pin {
 ///   - `uart0_<x>` — UART pins where `<x>` is one of (`tx`, `rx`)
 ///   - `dig#` — Digital/physical pins on the board where `#` is from range 0..19
 ///   - `led_<x>` - Internal LED light pins where `<x>` is one of (`red`, `green`, `blue`)
+///  - `pwmN_cmp#` - PWM channels where `N`` is from range 0..2 and `#` is from range 1..3
 ///
 /// # Example
 ///
@@ -252,6 +282,34 @@ macro_rules! pin {
     ($gpio:ident, led_blue) => {
         $gpio.pin5
     };
+    // PWM channels
+    ($gpio:ident, pwm0_cmp1) => {
+        $gpio.pin1
+    };
+    ($gpio:ident, pwm0_cmp2) => {
+        $gpio.pin2
+    };
+    ($gpio:ident, pwm0_cmp3) => {
+        $gpio.pin3
+    };
+    ($gpio:ident, pwm1_cmp1) => {
+        $gpio.pin19
+    };
+    ($gpio:ident, pwm1_cmp2) => {
+        $gpio.pin21
+    };
+    ($gpio:ident, pwm1_cmp3) => {
+        $gpio.pin22
+    };
+    ($gpio:ident, pwm2_cmp1) => {
+        $gpio.pin11
+    };
+    ($gpio:ident, pwm2_cmp2) => {
+        $gpio.pin12
+    };
+    ($gpio:ident, pwm2_cmp3) => {
+        $gpio.pin13
+    };
 }
 
 ///
diff --git a/hifive1/src/led.rs b/hifive1/src/led.rs
index c06bb3a..2601fee 100644
--- a/hifive1/src/led.rs
+++ b/hifive1/src/led.rs
@@ -8,12 +8,15 @@
 //! RedV
 //! - Blue = Pin 5
 
+use core::convert::Infallible;
 #[cfg(feature = "board-redv")]
 use e310x_hal::gpio::gpio0::Pin5;
 #[cfg(any(feature = "board-hifive1", feature = "board-hifive1-revb"))]
 use e310x_hal::gpio::gpio0::{Pin19, Pin21, Pin22};
-use e310x_hal::gpio::{Invert, Output, Regular};
-use embedded_hal::digital::v2::{OutputPin, ToggleableOutputPin};
+use e310x_hal::{
+    gpio::{Invert, Output, Regular},
+    prelude::*,
+};
 
 #[cfg(any(feature = "board-hifive1", feature = "board-hifive1-revb"))]
 /// Red LED
@@ -41,7 +44,10 @@ pub fn rgb<X, Y, Z>(red: Pin22<X>, green: Pin19<Y>, blue: Pin21<Z>) -> (RED, GRE
 }
 
 /// Generic LED
-pub trait Led {
+pub trait Led: StatefulOutputPin<Error = Infallible> {
+    /// Returns true if the LED is on
+    fn is_on(&mut self) -> bool;
+
     /// Turns the LED off
     fn off(&mut self);
 
@@ -49,7 +55,9 @@ pub trait Led {
     fn on(&mut self);
 
     /// Toggles the LED state
-    fn toggle(&mut self);
+    fn toggle(&mut self) {
+        StatefulOutputPin::toggle(self).unwrap();
+    }
 }
 
 /// Macro to implement the Led trait for each of the board LEDs
@@ -57,16 +65,16 @@ macro_rules! led_impl {
     ($($LEDTYPE:ident),+) => {
         $(
             impl Led for $LEDTYPE {
-                fn off(&mut self) {
-                    self.set_low().unwrap();
+                fn is_on(&mut self) -> bool {
+                    self.is_set_low().unwrap()
                 }
 
-                fn on(&mut self) {
+                fn off(&mut self) {
                     self.set_high().unwrap();
                 }
 
-                fn toggle(&mut self) {
-                    ToggleableOutputPin::toggle(self).unwrap();
+                fn on(&mut self) {
+                    self.set_low().unwrap();
                 }
             }
         )+
diff --git a/hifive1/src/stdout.rs b/hifive1/src/stdout.rs
index c325747..ec6e4e0 100644
--- a/hifive1/src/stdout.rs
+++ b/hifive1/src/stdout.rs
@@ -1,35 +1,41 @@
 //! Stdout based on the UART hooked up to FTDI or J-Link
 
-use core::{fmt, ptr};
+use core::{
+    fmt::{self, Write as CoreWrite},
+    ptr,
+};
 use e310x_hal::{
     clock::Clocks,
     e310x::Uart0,
-    gpio::gpio0::{Pin16, Pin17},
+    gpio::{
+        gpio0::{Pin16, Pin17},
+        NoInvert, IOF0,
+    },
     prelude::*,
     serial::{Rx, Serial, Tx},
     time::Bps,
 };
 use nb::block;
 
-struct SerialWrapper(Tx<Uart0>);
+struct SerialWrapper(Tx<Uart0, Pin17<IOF0<NoInvert>>>);
 
 static mut STDOUT: Option<SerialWrapper> = None;
 
-impl core::fmt::Write for SerialWrapper {
+impl CoreWrite for SerialWrapper {
     fn write_str(&mut self, s: &str) -> fmt::Result {
         for byte in s.as_bytes() {
             if *byte == b'\n' {
                 let res = block!(self.0.write(b'\r'));
 
                 if res.is_err() {
-                    return Err(::core::fmt::Error);
+                    return Err(fmt::Error);
                 }
             }
 
             let res = block!(self.0.write(*byte));
 
             if res.is_err() {
-                return Err(::core::fmt::Error);
+                return Err(fmt::Error);
             }
         }
         Ok(())
@@ -43,7 +49,7 @@ pub fn configure<X, Y>(
     rx: Pin16<Y>,
     baud_rate: Bps,
     clocks: Clocks,
-) -> Rx<Uart0> {
+) -> Rx<Uart0, Pin16<IOF0<NoInvert>>> {
     let tx = tx.into_iof0();
     let rx = rx.into_iof0();
     let serial = Serial::new(uart, (tx, rx), baud_rate, clocks);