From 714efe58a4bba1c4a91dd2798aae317261430cfc Mon Sep 17 00:00:00 2001
From: Anusha <anushar2191@gmail.com>
Date: Thu, 26 Sep 2024 11:43:33 +0530
Subject: [PATCH] Add support for Zhinx extension

---
 riscv_isac/InstructionObject.py | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/riscv_isac/InstructionObject.py b/riscv_isac/InstructionObject.py
index 9396e6a..0f140d1 100644
--- a/riscv_isac/InstructionObject.py
+++ b/riscv_isac/InstructionObject.py
@@ -674,16 +674,22 @@ def evaluate_reg_sem_f_ext(self, reg_val, flen, iflen, postfix, f_ext_vars, inxF
         
 
         if flen > iflen:
-            if inxFlag:
+             if inxFlag and iflen == 16:
+                if bin_val[16] == '1' :
+                   sgnd_bin_val = bin(reg_val &((1<<flen)-1) | ((1<<flen) - (1<<iflen)))[2:] 
+                   f_ext_vars['rs'+postfix+'_sgn_prefix'] = int(sgnd_bin_val[0:iflen],2)
+                else:
+                   f_ext_vars['rs'+postfix+'_sgn_prefix'] = int(0x0)
+             elif inxFlag and iflen == 32:
                 if bin_val[32] == '1' :
                    sgnd_bin_val = bin(reg_val &((1<<flen)-1) | ((1<<flen) - (1<<iflen)))[2:] 
                    f_ext_vars['rs'+postfix+'_sgn_prefix'] = int(sgnd_bin_val[0:iflen],2)
                 else:
                    f_ext_vars['rs'+postfix+'_sgn_prefix'] = int(0x0)
-            else:
+             else:
                 bin_val =bin(reg_val &((1<<flen)-1) | ((1<<flen) - (1<<iflen)))[2:]
-            f_ext_vars['rs'+postfix+'_nan_prefix'] =  int(bin_val[0:iflen],2)
-            bin_val = bin_val[flen-iflen:]
+                f_ext_vars['rs'+postfix+'_nan_prefix'] =  int(bin_val[0:iflen],2)
+             bin_val = bin_val[flen-iflen:]
        
 
         f_ext_vars['fs'+postfix] = int(bin_val[0], 2)