From 19338c63a11659892768d10874363a3217040672 Mon Sep 17 00:00:00 2001 From: Tim Hutt Date: Thu, 9 Jan 2025 22:38:05 +0000 Subject: [PATCH] Clarify misa.M behaviour with Zmmul (#1793) This clarifies how the combination of misa.M and Zmmul affect the requirements on implementing multiply and division. --- src/machine.adoc | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/machine.adoc b/src/machine.adoc index c9412578e..261f3f41e 100644 --- a/src/machine.adoc +++ b/src/machine.adoc @@ -192,10 +192,17 @@ supervisor modes respectively. The "X" bit will be set if there are any non-standard extensions. -When "B" bit is 1, the implementation supports the instructions provided by the -Zba, Zbb, and Zbs extensions. When "B" bit is 0, it indicates that the +When the "B" bit is 1, the implementation supports the instructions provided by the +Zba, Zbb, and Zbs extensions. When the "B" bit is 0, it indicates that the implementation may not support one or more of the Zba, Zbb, or Zbs extensions. +When the "M" bit is 1, the implementation supports all multiply and +division instructions defined by the M extension. When the "M" bit +is 0, it indicates that the implementation may not support those +instructions. However if the Zmmul extension is suppported then +the multiply instructions it specifies are supported irrespective +of the value of the "M" bit. + [NOTE] ==== The `misa` CSR exposes a rudimentary catalog of CPU features to