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In RISC-V unprivileged architecture(Version, 20240411), it only says that "A clean operation performs a write transfer to another cache or to memory, ....."
Should a cache-block management instruction(cbo.flush, cbo.invalid, cbo.clean) check page and access permissions, just like a store?
For example, should a cache-block management instruction check write permission of a PTE?
The text was updated successfully, but these errors were encountered:
In RISC-V unprivileged architecture(Version, 20240411), it only says that "A clean operation performs a write transfer to another cache or to memory, ....."
Should a cache-block management instruction(cbo.flush, cbo.invalid, cbo.clean) check page and access permissions, just like a store?
For example, should a cache-block management instruction check write permission of a PTE?
The text was updated successfully, but these errors were encountered: