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[BEQI/BNEI] map uimm=0 into -1 constant #209

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jnk0le opened this issue Jan 21, 2023 · 1 comment
Open

[BEQI/BNEI] map uimm=0 into -1 constant #209

jnk0le opened this issue Jan 21, 2023 · 1 comment
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future idea Something for a future version of the spec

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@jnk0le
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jnk0le commented Jan 21, 2023

-1 is popular return error code.
It can also be used to check if arbitrary bitfield (>5 bits long) is or isn't all ones (after the slli+srai or p.extract or tio.sbfextracti)

V ext is already doing signed immediates from rs1 position, so there is rather medium/low value of sticking with exact Zicsr like uimm encoding.

To apply it to HCA, only the lambda needs to be modified:

https://github.com/riscv/riscv-code-size-reduction/blob/main/benchmarks/HCA/hca#L200

(lambda instruction: True if (int(instruction["Immediate"]) == -1) else utils.fit_in_field(int(instruction["Immediate"]),"unsigned",5)))
@abukharmeh abukharmeh added the future idea Something for a future version of the spec label Jan 25, 2023
@jnk0le
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jnk0le commented May 13, 2023

The solution to uimm=0 assymetry could be a change of uimm mapping in CSR instructions.

==== Xicsrmz

Implemented similarly to Zicsr with `uimm=0` mapped into -1 constant.

NOTE: `csrrsi`/`csrrci` with `uimm=0` still doesn't write and cause write side effects.

NOTE: This extensions allows to sync `csrrwi` instruction, with some other extensions 
<<XTightlyCoupledIO>>, as to not cause additional immediate formats.

NOTE: `csrrw rd, csr, x0` can still be used to write a zero into csr.

from https://github.com/jnk0le/riscv-total-embedded/blob/master/riscv-total-embedded.adoc#32-xicsrmz

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