Provide vlo*, vector load ordered variants with consecutive pairing

[David-Horner]

RVWMO allows PoR load instructions, even with 0 to vl ordered cache request issuing, to provide results from a global memory order that are not in chronological order, and especially are not in dependency order as RVWMO imposed to concurrently updating harts (see discussions in #501 (comment)) .

PoR - a679250

With #534, allowing non-strict 0 to vl processing order the available result sets is substantially increased. Specifically, Rule 2 is eliminated with respect to all element reads (including overlapping non-identical addresses).

To allow vector loads to provide as close to fully deterministic and concurrent hart RVWMO rule consistent return set as is possible, I propose we define new load instructions designated vlo*, for ordered that RVWMO pair each element read with the read of the next consecutive elements read in 0 to vl order.

An outstanding consideration is whether masked out elements participate in the read pairing.
PoR is silent on the matter, however, it states

Masked vector loads do not update inactive elements in the destination vector register group.

My preference, as a concession to "intuitive" expectations, is that masked out elements are skipped, that the pairing is between the current unmasked element and the next unmasked element in 0 to vl order.

I believe the current PoR load opcode mapping should remain. However, it may be instructive to rename vl* as vlu*, especially if #534 is adopted.
The current naming could initially be an alias with vlu*

[kasanovic]

Moved to post v1.0 discussion.