From 0642a01179570f340367a0646c63ec875fac7285 Mon Sep 17 00:00:00 2001 From: Rot127 Date: Sat, 16 Mar 2024 04:11:58 -0500 Subject: [PATCH] Fix and add unittests. --- .github/workflows/black.yaml | 2 +- .github/workflows/flake8.yml | 2 +- .github/workflows/reuse.yaml | 2 +- .github/workflows/unittests.yaml | 22 ++++++++++++++++++++++ LLVMImporter.py | 7 ++++--- 5 files changed, 29 insertions(+), 6 deletions(-) create mode 100644 .github/workflows/unittests.yaml diff --git a/.github/workflows/black.yaml b/.github/workflows/black.yaml index 86c2ad89..398a0ff1 100644 --- a/.github/workflows/black.yaml +++ b/.github/workflows/black.yaml @@ -1,6 +1,6 @@ name: black -on: [pull_request] +on: [pull_request, push] jobs: linter: diff --git a/.github/workflows/flake8.yml b/.github/workflows/flake8.yml index 02c7616c..9f1d001c 100644 --- a/.github/workflows/flake8.yml +++ b/.github/workflows/flake8.yml @@ -1,6 +1,6 @@ name: flake8 -on: [pull_request] +on: [pull_request, push] jobs: linter: diff --git a/.github/workflows/reuse.yaml b/.github/workflows/reuse.yaml index 64e93a27..05f9dd5c 100644 --- a/.github/workflows/reuse.yaml +++ b/.github/workflows/reuse.yaml @@ -1,6 +1,6 @@ name: reuse -on: [pull_request] +on: [pull_request, push] jobs: linter: diff --git a/.github/workflows/unittests.yaml b/.github/workflows/unittests.yaml new file mode 100644 index 00000000..d41cb5c5 --- /dev/null +++ b/.github/workflows/unittests.yaml @@ -0,0 +1,22 @@ +name: Unit Tests + +on: [pull_request, push] + +jobs: + run: + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v3 + - name: Set up Python 3.11 + uses: actions/setup-python@v3 + with: + python-version: '3.11' + - name: Install + run: | + python3 -m pip install --upgrade pip + pip3 install -r requirements.txt + pip3 install . + - name: Run unit tests + run: | + cd Tests + python3 -m unittest discover -s . -t . diff --git a/LLVMImporter.py b/LLVMImporter.py index baf27e21..8eb0e399 100755 --- a/LLVMImporter.py +++ b/LLVMImporter.py @@ -51,7 +51,7 @@ class LLVMImporter: sub_instruction_names = list() sub_instructions = dict() hardware_regs = dict() - rzil_compiler = None + rzilcompiler = None edited_files: [str] = list() def __init__(self, build_json: bool, gen_rzil: bool, skip_pcpp: bool, rzil_compile: bool, test_mode=False): @@ -202,7 +202,7 @@ def generate_hexagon_json(self): def setup_rzil_compiler(self): log("Init compiler") - self.rzil_compiler = Compiler(ArchEnum.HEXAGON) + self.rzilcompiler = Compiler(ArchEnum.HEXAGON) if not self.skip_pcpp: self.rzilcompiler.run_preprocessor() @@ -352,7 +352,8 @@ def parse_instructions(self) -> None: t.n = i t.postfix = f"Succ. compiled: {compiled_insn}/{len(no_pseudo)}" t.update() - self.rzilcompiler.transformer.ext.report_missing_fcns() + if self.gen_rzil: + self.rzilcompiler.transformer.ext.report_missing_fcns() log("Parsed {} normal instructions.".format(len(self.normal_instructions))) log("Parsed {} sub-instructions.".format(len(self.sub_instructions)))