From 39e0845abcb26f3d19ab1200852d77ba3e592417 Mon Sep 17 00:00:00 2001
From: Ales Katona <ales@katona.me>
Date: Sat, 25 Jun 2022 16:29:22 -0700
Subject: [PATCH 1/3] add embedded-hal v1.0.0-alpha.7 support

---
 CHANGELOG.md |  4 +++
 Cargo.toml   |  4 +--
 src/delay.rs | 74 +++++++---------------------------------------------
 3 files changed, 16 insertions(+), 66 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index c2082d1c..744197e0 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -10,6 +10,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 ### Fixed
 
 - Fix `asm::delay()` to ensure count register is always reloaded
+### Changed
+
+ - Use new `DelayUs` trait from `embedded-hal` `v1.0.0-alpha.7`
+   - NOTE: this removes `DelayMs` and `DelayUs` with `u64` version
 
 ## [v0.8.0] - 2022-04-20
 
diff --git a/Cargo.toml b/Cargo.toml
index 25a14779..4b2fc637 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "riscv"
-version = "0.8.0"
+version = "0.9.0-alpha.1"
 rust-version = "1.59"
 repository = "https://github.com/rust-embedded/riscv"
 authors = ["The RISC-V Team <risc-v@teams.rust-embedded.org>"]
@@ -19,4 +19,4 @@ targets = [
 [dependencies]
 bare-metal = "1.0.0"
 bit_field = "0.10.0"
-embedded-hal = "0.2.6"
+embedded-hal = "1.0.0-alpha.7"
diff --git a/src/delay.rs b/src/delay.rs
index 041cb479..d52bd70f 100644
--- a/src/delay.rs
+++ b/src/delay.rs
@@ -1,6 +1,7 @@
-//! Delay devices and providers
+use core::convert::Infallible;
+
 use crate::register::mcycle;
-use embedded_hal::blocking::delay::{DelayMs, DelayUs};
+use embedded_hal::delay::blocking::DelayUs;
 
 /// Machine mode cycle counter (`mcycle`) as a delay provider
 #[derive(Copy, Clone)]
@@ -17,71 +18,16 @@ impl McycleDelay {
     }
 }
 
-impl DelayUs<u64> for McycleDelay {
+impl DelayUs for McycleDelay {
+    type Error = Infallible;
+
     #[inline]
-    fn delay_us(&mut self, us: u64) {
+    fn delay_us(&mut self, us: u32) -> Result<(), Self::Error> {
         let t0 = mcycle::read64();
-        let clock = (us * (self.ticks_second as u64)) / 1_000_000;
+        let us_64: u64 = us.into();
+        let clock = (us_64 * (self.ticks_second as u64)) / 1_000_000u64;
         while mcycle::read64().wrapping_sub(t0) <= clock {}
-    }
-}
 
-impl DelayUs<u32> for McycleDelay {
-    #[inline(always)]
-    fn delay_us(&mut self, us: u32) {
-        self.delay_us(us as u64)
-    }
-}
-
-// Implemented for constructions like `delay.delay_us(50_000);`
-impl DelayUs<i32> for McycleDelay {
-    #[inline(always)]
-    fn delay_us(&mut self, us: i32) {
-        assert!(us >= 0);
-        self.delay_us(us as u32);
-    }
-}
-
-impl DelayUs<u16> for McycleDelay {
-    #[inline(always)]
-    fn delay_us(&mut self, us: u16) {
-        self.delay_us(us as u32)
-    }
-}
-
-impl DelayUs<u8> for McycleDelay {
-    #[inline(always)]
-    fn delay_us(&mut self, us: u8) {
-        self.delay_us(us as u32)
-    }
-}
-
-impl DelayMs<u32> for McycleDelay {
-    #[inline]
-    fn delay_ms(&mut self, ms: u32) {
-        self.delay_us((ms as u64) * 1000)
-    }
-}
-
-// Implemented for constructions like `delay.delay_ms(50_000);`
-impl DelayMs<i32> for McycleDelay {
-    #[inline(always)]
-    fn delay_ms(&mut self, ms: i32) {
-        assert!(ms >= 0);
-        self.delay_ms(ms as u32);
-    }
-}
-
-impl DelayMs<u16> for McycleDelay {
-    #[inline(always)]
-    fn delay_ms(&mut self, ms: u16) {
-        self.delay_ms(ms as u32)
-    }
-}
-
-impl DelayMs<u8> for McycleDelay {
-    #[inline(always)]
-    fn delay_ms(&mut self, ms: u8) {
-        self.delay_ms(ms as u32)
+        Ok(())
     }
 }

From ad9917552642c537f7aa7c4c3aac1fcdcab3fde3 Mon Sep 17 00:00:00 2001
From: Ales Katona <ales@katona.me>
Date: Sat, 30 Jul 2022 16:25:21 -0700
Subject: [PATCH 2/3] bump embedded-hal to v1.0.0-alpha.8

---
 Cargo.toml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Cargo.toml b/Cargo.toml
index 4b2fc637..99c94bd9 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -19,4 +19,4 @@ targets = [
 [dependencies]
 bare-metal = "1.0.0"
 bit_field = "0.10.0"
-embedded-hal = "1.0.0-alpha.7"
+embedded-hal = "1.0.0-alpha.8"

From 5b27b4b5c897ae503f28dff2d36d71ec34022dda Mon Sep 17 00:00:00 2001
From: Ales Katona <ales@katona.me>
Date: Sun, 31 Jul 2022 11:28:20 -0700
Subject: [PATCH 3/3] bump e-h version in changelog

---
 CHANGELOG.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 744197e0..af22d73a 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -12,7 +12,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Fix `asm::delay()` to ensure count register is always reloaded
 ### Changed
 
- - Use new `DelayUs` trait from `embedded-hal` `v1.0.0-alpha.7`
+ - Use new `DelayUs` trait from `embedded-hal` `v1.0.0-alpha.8`
    - NOTE: this removes `DelayMs` and `DelayUs` with `u64` version
 
 ## [v0.8.0] - 2022-04-20