diff --git a/CHANGELOG.md b/CHANGELOG.md index 88adc971..db74a328 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Revert #711 +- Add `defmt` impls for `TryFromInterruptError`, riscv interrupt enums - Fix calculating `modifiedWriteValues` bitmasks with field arrays - Fix building without `yaml` feature - Compatibility with `riscv` 0.12 and `riscv-rt` 0.13 diff --git a/src/generate/device.rs b/src/generate/device.rs index fdecb54b..ec2ef6c6 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -217,6 +217,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result { let mut mod_items = TokenStream::new(); + let defmt = config + .impl_defmt + .as_ref() + .map(|feature| quote!(#[cfg_attr(feature = #feature, derive(defmt::Format))])); + if let Some(c) = settings.riscv_config.as_ref() { if !c.core_interrupts.is_empty() { debug!("Rendering target-specific core interrupts"); @@ -48,6 +54,7 @@ pub fn render( mod_items.extend(quote! { /// Core interrupts. These interrupts are handled by the core itself. #[riscv::pac_enum(unsafe CoreInterruptNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum CoreInterrupt { #(#interrupts)* @@ -77,6 +84,7 @@ pub fn render( mod_items.extend(quote! { /// Exception sources in the device. #[riscv::pac_enum(unsafe ExceptionNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum Exception { #(#exceptions)* @@ -102,6 +110,7 @@ pub fn render( mod_items.extend(quote! { /// Priority levels in the device #[riscv::pac_enum(unsafe PriorityNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum Priority { #(#priorities)* @@ -124,6 +133,7 @@ pub fn render( mod_items.extend(quote! { /// HARTs in the device #[riscv::pac_enum(unsafe HartIdNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum Hart { #(#harts)* @@ -197,6 +207,7 @@ pub fn render( mod_items.extend(quote! { /// External interrupts. These interrupts are handled by the external peripherals. #[riscv::pac_enum(unsafe ExternalInterruptNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum ExternalInterrupt { #(#interrupts)*