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RB edesigns' truncate_to_available_data fails to truncate auxiliary information #408

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jordanh6 opened this issue Mar 7, 2024 · 1 comment
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@jordanh6
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jordanh6 commented Mar 7, 2024

MirrorRBDesign.truncate_to_available_data truncates the the edesign's circuit_lists, but it does not truncate idealout_lists. This means that the mapping between circuits and target bit strings is lost.

Example notebook attached.

Expected behavior: Returned edesign should have idealout_lists that contain exactly the idealouts of the circuits remaining in the truncated design.

Based on skimming the code I suspect other RB protocol edesigns have an analogous issue.

Environment:

  • pyGSTi v0.9.12.1
  • python 3.8

edesign-truncate-bug.zip

@jordanh6 jordanh6 added the bug A bug or regression label Mar 7, 2024
@sserita sserita modified the milestones: 0.9.12.2, 0.9.13 Apr 2, 2024
@sserita sserita modified the milestones: 0.9.13, 0.9.12.3 May 14, 2024
sserita added a commit that referenced this issue May 21, 2024
This derives truncation functions for ByDepthDesign and BenchmarkingDesign
such that paired list information (depths, circuits, idealouts)
are maintained through truncation.
sserita added a commit that referenced this issue May 21, 2024
Generalizes serialization/truncation for attributes
that are "paired" with the circuit lists in BenchmarkingDesigns.
This removes the code duplication in inherited classes
with more "paired" attributes,
such as CliffordRBDesign (with the new native gate info) and
BinaryRBDesign (with measurements/signs).
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sserita commented Jun 1, 2024

Closing as this is merged in develop with #443

@sserita sserita closed this as completed Jun 1, 2024
@sserita sserita added the fixed-but-not-in-release-yet Bug has been fixed, but isn't in an official release yet (just exists on a development branch) label Jun 1, 2024
@sserita sserita removed the fixed-but-not-in-release-yet Bug has been fixed, but isn't in an official release yet (just exists on a development branch) label Jun 11, 2024
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