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FAQ.md

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Digital Electronics 2 FAQ

Chisel

Here some common issues with Chisel constructs.

Extracting a bitfield

You can extract a subset of wires from a bus x like this:

x(n, m)

This will extract wire n down to m both included. It is important to know that n >= m, otherwise Chisel will throw a hard to understand error.

Missing .W

One possible error when defining constants with a dedicated width is missing the .W specifier for a width. E.g., 1.U(32) will not define a 32-bit wide constant representing 1. Instead, the expression (32) is interpreted as bit extraction from position 32, which results in a single bit constant of 0. Probably not what the original intention of the programmer was.

Error msgs

firrtl.passes.CheckFlows$WrongFlow: @[cmdx.sc xx:xx]: [module xxxx] Expression _T is used as a SinkFlow but can only be used as a SourceFlow.

You can't bind some wires of a output bus. Either none or all in one expression. A workaround is to declare a bus where you can bind part of the wires. Then bind this bus to the output bus

scala.MatchError: List(UInt<x>(0) ... UInt<x>(y)) (of class scala.collection.immutable.$colon$colon)

This error message usually indicates that you have declared an Enum with a wrong indication of number of elements.

Cannot reassign to read-only

This most likely happens when you are trying to assign a subfield of a bus.

class someClass extends Module {
  val io = IO(new Bundle {
    val y = Output(2.W)
})
//This is not legal Chisel3-code
io.y(0) := 0.U
io.y(1) := 1.U

}

To get around this, use extraction and concatenation, see the following SO post.

Alternatively, unpack your bus into a vector of booleans, modify it, and then repack it as a bus again, see the following entry from the Chisel Cookbook ("How do I do subword assignement?")

Understanding very long stack traces

You may sometimes meet a very long stack trace when you've made an error. This occurs when the error is not Chisel-specific but it is a Scala error. When you meet the long stack traces, most error msgs will be indented. Scroll up from the bottom, until you meet an unindented message

Exception in thread "main" ...
    (lots of indented messages)
Caused by: (THE REAL ERROR MESSAGE)
    (more indented messages)

In the second section of indented messages, you may see links highlighted in blue. These will take you to the portions of your code where the error has occured.

IndexOutOfBoundsException

Might occur when you're trying to do a sub-field assignment (see above) on a vector.

//Not valid code, do not copy
val myVec := Wire(Vec(1, UInt(16.W)))
myVec(2) := 0.U 

When accessing the above vector with 'myVec(2)', Chisel attempts to select the second vector myVec, and not the second bit of myVec(1).

Enum

A wrong number n in Enum(n) for FSM states can give a long error log.

IntelliJ

My file list is gone

Look on the very left of IntelliJ, and click "Project" to reopen your file view.

My terminal disappeared

Select View > Tool Windows > Terminal, or type Alt + F12 to reopen it. Alternatively, just use the "sbt shell". Commands run through the sbt shell should not be prefixed with sbt (instead of typing sbt "run", simply write run and hit enter.

Vivado

Error "Bitstream Generation failed"

Comes from a missing pin assignment in the .xdc file. Look for the blue text in the warning/error messages, this will tell you what pins are unconstrained.

Unable to connect to Basys3 board

Follow the instructions at this link. Make sure that you open your shell/command prompt as admin, and then navigate to the correct folder. I did not need to supply any command line arguments for this to work.