Short-Mid term features

[lispc]

Describe the feature you would like

1. (P0) upgrade halo2-libs and remove mix usage of challenge and halo2-libs "static" circuits. (Agg circuit / sig circuit / ecc circuit needs to be updated a lot. For agg circuit, there will be no "rlc keccak" module, we will use halo2-libs "static" keccak. For ecc/sig circuit, we will change rlc_input, rlc_ouput, .. lookup to many rows of MemoryOp input/output byte/word lookup)
2. (P0) chunking or continuation. (Circuit should never fail for any type any size tx). This can be completed either by splitting circuits vertically(then we can increase max k to 22 even 23, then split block into txs) or horizontally(chunking of pse, FSM of zksync-era).
3. (P0) use blob to reduce l2 tx gas fee
4. (P0) cancun new opcodes
5. (P1) Reduce usage of challenge: remove word_rlc and keccak_rlc.
6. (P1) access of l1 block header
7. (P1) Refactor sub circuit: we may need to add standalone "Arith" sub circuit and "Memory limb <=> bytes" sub circuit. Arith circuit is also useful for support "heavy computing l3s" like mimc / mixer with a lot of poseidon or mimc hash, a lot of mulmod addmod ops. Arith circuit can also be used to contrain limbs <=> bytes.
8. (P2) changes needed for "smaller field". We should not assume word being hi-lo, instead, use more general type abstraction.
9. (P2) exploration of spliting sub circuits. So if some circuits are not used, (eg sha256 / ecc), they will not incur proving overhead.
10. (P2) more efficient micro-op vm. and refactor precompiles

Additional context

No response

[0xShankar]

"I've been following the updates on zkEVM circuits closely, and I’m impressed by the progress on enhancing circuit performance, especially with improvements like the RecursionCircuit and BatchCircuit. One area I believe could further streamline development is focusing on modularizing common components across circuits. This would simplify maintenance and make it easier to introduce optimizations in a single place, benefiting the broader zkEVM ecosystem.

Also, introducing automated testing tools specifically for the prover-side circuits could reduce errors during integration and ensure consistency. I’d love to contribute by helping develop a testing framework to track performance across multiple zkRollups, as well as look into improving gadget modularity.

What’s the current focus for the next quarter, and how can I best assist in accelerating the zkEVM circuit optimizations?"