Hardware: Routing for the MicroZed MIO pins cannot achieve intended functionality

[c-porto]

MicroZed routing issue:

The Zynq Processing System (PS) has predetermined pin options for its peripheral controllers. Therefore any connection that expects to use them require to route the connections following the provided options. The FlatSat assigned these MIO pins, exposed by MicroZed, to be 2 CAN controllers and 2 I2C controllers, unfortunately the routing does conform to the predefined functions defined by the Zynq PS.

The figure below shows the MIO pins on the FlatSat schematic:

Comparing it to the possible available functions for each MIO pin in the SOM1B connector, presented in the image below,
its possible to see the problem mentioned before.

Possible Solution:

The solution would be changing the routing of the MIO pins, an option is proposed below:

• RXD_CHN_1 routed to MIO10
• TXD_CHN_1 routed to MIO11
• SCL_CHN_2 routed to MIO12
• SDA_CHN_2 routed to MIO13
• SCL_CHN_1 routed to MIO14
• SDA_CHN_1 routed to MIO15
• MIO0 and MIO9 are left as conventional GPIO's

Using this solution means that the second CAN channel (RXD_CHN_2 and TXD_CHN_2) would not be used, since MIO0 and MIO9 cannot be used by the Zynq PS CAN controllers. To enable its usage, those signals would need to be routed to pins that can be accessed by the Zynq Programmable Logic (PL), for instance two pins from Zynq's BANK13. The only issue with this approach is the necessity of a voltage translator in between them.