diff --git a/CMakeLists.txt b/CMakeLists.txt index 0053a4de..55de73c4 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -147,21 +147,24 @@ endif() if (INSTALL_IN_REPO) + target_compile_definitions(silice PRIVATE "FRAMEWORKS_DEFAULT_PATH=\"${CMAKE_SOURCE_DIR}/frameworks\"") + target_compile_definitions(libsilice PRIVATE "FRAMEWORKS_DEFAULT_PATH=\"${CMAKE_SOURCE_DIR}/frameworks\"") + install(TARGETS silice RUNTIME DESTINATION ${CMAKE_SOURCE_DIR}/bin) install(TARGETS libsilice ARCHIVE DESTINATION ${CMAKE_SOURCE_DIR}/lib) - add_definitions(-DFRAMEWORKS_DEFAULT_PATH=\"${CMAKE_SOURCE_DIR}/frameworks\") else() + target_compile_definitions(silice PRIVATE "FRAMEWORKS_DEFAULT_PATH=\"${CMAKE_INSTALL_PREFIX}/frameworks\"") + target_compile_definitions(libsilice PRIVATE "FRAMEWORKS_DEFAULT_PATH=\"${CMAKE_INSTALL_PREFIX}/frameworks\"") install(TARGETS silice RUNTIME DESTINATION bin/) install(TARGETS libsilice ARCHIVE DESTINATION bin/) - install(FILES bin/silice-make.py PERMISSIONS WORLD_EXECUTE OWNER_WRITE WORLD_READ DESTINATION bin/) - install(FILES bin/report-cycles.py PERMISSIONS WORLD_EXECUTE OWNER_WRITE WORLD_READ DESTINATION bin/) + install(PROGRAMS bin/silice-make.py DESTINATION bin/) + install(PROGRAMS bin/report-cycles.py DESTINATION bin/) install(FILES projects/ice-v/CPUs/ice-v.si DESTINATION share/silice/projects/ice-v/CPUs/) install(FILES projects/ice-v/CPUs/ice-v-dual.si DESTINATION share/silice/projects/ice-v/CPUs/) install(DIRECTORY frameworks DESTINATION share/silice/ USE_SOURCE_PERMISSIONS) install(DIRECTORY src/libs/LibSL-small DESTINATION share/silice/src/libs/) - add_definitions(-DFRAMEWORKS_DEFAULT_PATH=\"${CMAKE_INSTALL_PREFIX}/share/silice/frameworks\") endif() diff --git a/bin/silice-make.py b/bin/silice-make.py index 550d4663..f7684b67 100755 --- a/bin/silice-make.py +++ b/bin/silice-make.py @@ -77,7 +77,7 @@ def colored(str,clr,attrs=0): # - frameworks directory frameworks_dirs=list() -frameworks_dirs.append(os.path.realpath(os.path.join(make_dir,"../frameworks/"))) +frameworks_dirs.append(os.path.realpath(os.path.join(make_dir,"../share/silice/frameworks/"))) frameworks_dirs.append('/usr/local/share/silice/frameworks/') if platform.system() == "Windows": if sysconfig.get_platform().startswith("mingw"): diff --git a/compile_silice_linux.sh b/compile_silice_linux.sh index 9974a07a..9b75a35b 100755 --- a/compile_silice_linux.sh +++ b/compile_silice_linux.sh @@ -26,17 +26,11 @@ cd .. cd .. echo -e "\nInstalling python packages for building designs\n" -pip install --upgrade termcolor -pip install --upgrade edalize +pip3 install --upgrade termcolor +pip3 install --upgrade edalize echo " " echo " " -echo "==================================" -echo "Please compile and install:" -echo "- yosys" -echo "- trellis, icestorm, nextpnr" -echo "- verilator" -echo "- icarus verilog" -echo " " -echo "See also GetStarted_Linux.md" -echo "==================================" +echo "======================================" +echo " Please read GetStarted_Linux.md" +echo "======================================" diff --git a/frameworks/boards/icarus/icarus.v b/frameworks/boards/icarus/icarus.v index 99daec37..994953aa 100644 --- a/frameworks/boards/icarus/icarus.v +++ b/frameworks/boards/icarus/icarus.v @@ -133,7 +133,7 @@ M_main __main( ); always @* begin - if (done_main && ~rst_n) $finish; + if (done_main && rst_n) $finish; end endmodule diff --git a/install_dependencies_archlinux.sh b/install_dependencies_archlinux.sh index fe939781..f36d239e 100755 --- a/install_dependencies_archlinux.sh +++ b/install_dependencies_archlinux.sh @@ -1,3 +1,3 @@ #!/bin/bash -pacman -S jdk-openjdk git gcc make cmake pkg-config glfw riscv64-linux-gnu-gcc +pacman -S jdk-openjdk git gcc make cmake pkg-config glfw riscv64-linux-gnu-gcc python3 diff --git a/install_dependencies_debian_like.sh b/install_dependencies_debian_like.sh index 9a50bb05..57dccfa1 100755 --- a/install_dependencies_debian_like.sh +++ b/install_dependencies_debian_like.sh @@ -1,3 +1,4 @@ #!/bin/bash -sudo apt install default-jre default-jdk git gcc g++ make cmake pkg-config uuid uuid-dev libglfw3 libglfw3-dev gcc-riscv64-linux-gnu +sudo apt install default-jre default-jdk git gcc g++ make cmake pkg-config uuid uuid-dev libglfw3 libglfw3-dev gcc-riscv64-linux-gnu python3 + diff --git a/install_dependencies_fedora.sh b/install_dependencies_fedora.sh index e5179b41..07c45ced 100755 --- a/install_dependencies_fedora.sh +++ b/install_dependencies_fedora.sh @@ -1,3 +1,3 @@ #!/bin/bash -sudo dnf install -y git gcc g++ make cmake pkg-config uuid uuid-devel java-11-openjdk-devel iverilog glfw glfw-devel gcc-riscv64-linux-gnu perl-FindBin +sudo dnf install -y git gcc g++ make cmake pkg-config uuid uuid-devel java-11-openjdk-devel iverilog glfw glfw-devel gcc-riscv64-linux-gnu perl-FindBin python3 diff --git a/projects/ice-v/export/Makefile b/projects/ice-v/export/Makefile new file mode 100644 index 00000000..84c735b5 --- /dev/null +++ b/projects/ice-v/export/Makefile @@ -0,0 +1,15 @@ + +M_icev_cpu.v: export.si + # export the controller to verilog + silice export.si --output M_icev_cpu.v \ + --export icev_cpu \ + --frameworks_dir ../../../frameworks/ \ + --framework ../../../frameworks/boards/bare/bare.v + -D ICE40=1 \ + -D ICESTICK=1 \ + -D MEM_ADDR_SIGNED=0 \ + # clean up compiler log files + rm *.log *.lpp + +clean: + rm -rf build.* M_icev_cpu.* *.lpp abc.history diff --git a/projects/ice-v/export/export.si b/projects/ice-v/export/export.si new file mode 100644 index 00000000..1da91013 --- /dev/null +++ b/projects/ice-v/export/export.si @@ -0,0 +1,33 @@ +// CPU configuration +// -> memory address bus width +$$addrW = 12 +// -> memory interface +group bram_io +{ + uint4 wenable(0), + uint32 wdata(0), + uint32 rdata(0), + uint$addrW$ addr(0), // boot address +} +// include the CPU +$include('../CPUs/ice-v.si') +// wrapper to avoid manual configuration of the Silice interface +unit icev_cpu( + output! uint4 wenable(0), + // ^ no register + output! uint32 wdata(0), + input uint32 rdata(0), + output! uint$addrW$ addr(0), // boot address +) { + // instantiates the group for IO + bram_io mem_io; + // instantiates the CPU + rv32i_cpu cpu( mem <:> mem_io ); + // bind + always { + wenable = mem_io.wenable; // cpu wants to write + wdata = mem_io.wdata; // data cpu wants to write + addr = mem_io.addr; // address cpu wants to access + mem_io.rdata = rdata; // data received from memory + } +} \ No newline at end of file