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uvm reg adapter supports AXI4 access #17

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taichi-ishitani opened this issue Jul 24, 2020 · 0 comments
Open

uvm reg adapter supports AXI4 access #17

taichi-ishitani opened this issue Jul 24, 2020 · 0 comments
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enhancement New feature or request

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@taichi-ishitani
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Original issue is #16.

The uvm reg adapter needs to support not only AXI4-Lite but also AXI4.
To support AXI4, following changes are needed.

  • Set bust size and bust length fields
  • Set id field
  • Shift write and read data according to rw.n_bits and lower address bits
    • configuration object may be needed to get bus width
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