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Number Systems

System Value -x Negation Addition Overflow
Sign & Magnitude Invert first bit
1s Complement +ve: same as 2s
-ve: 2s + 1		 2^n - x - 1 Invert all bits If MSB carry out: +=1 Result opposite sign of A and B
2s Complement if x[i]==1: += 2^i
except 1st num: minus		 2^n - x Invert all bits + 1 Ignore MSB carry out MSB carry in != MSB carry out
Result opposite sign of A and B
Excess-n x-n
IEEE 754 (Sign) (1.Mantissa) x 2^Exponent Invert first bit 1: Sign
8: Ex-127 Exp		 ---
23: Mantissa
System -2 -1 0 1 2
Sign & Magnitude 10000010 10000001 00000000 00000001 00000010
1s Complement 11111101 11111110 0000/1111 00000001 00000010
2s Complement 11111110 11111111 00000000 00000001 00000010
Excess-127 01111101 01111110 01111111 10000000 10000001

MIPS

Operation RR1 RR2 WR WD Opr1 Opr2 Address Write Data
lw $a, x($b) $b $a $a Mem([$b] +x) [$b] x [$b] + x [$a]
beq $a,$b, immd $a $b $b ? [$a] [$b] [$a] - [$b] [$b]
sub $a, $b, $c $b $c $a [$b] – [$c] [$b] [$c] [$b] – [$c] [$c]
addi $a, $b, immd $b $a $a [$b] + immd [$b] immd [$b] + immd [$a]

MIPS

Control Datapath

Add: Chong Wen Hao BEQ: Chong Wen Hao LW: Chong Wen Hao SW: Chong Wen Hao

ALUcontrol ALU

Dependency Solution Inst Stall
Data None add 2
Data None lw 2
Data Fwd add 0
Data Fwd lw 1
Control None ALL 3
Dependency Solution Inst Stall
Control Early 1
Control Early add 2
Control Early lw 3
Control Predict YES 0
Control Delay ? 0

Boolean Algebra

Duality: If the AND/OR operators and 0/1 identity elements are interchanged, it remainds valid
x+1 = 1 -> x.0 = 0

Logic Circuits

NAND Logic

NOR Logic

SOP

  1. AND-OR
  2. NAND-NAND

POS

  1. OR-AND
  2. NOR-NOR

K2 Map

K3 Map

K4 Map

Half Adder Full Adder Magnitude Comparator

Functions using MSI

Demultiplexers are similar to a decoder (select) with enable (data)

Multiplexers are similar to a decoder (select) added with 2^n input lines (input)

Decode Functions Mux Functions

Sequential Logic

Flip Flop Characteristics Table Flip Flop Excitation Table

Cache

Write Policy Direct Mapped Cache Set Associative Cache Fully Associative Cache

Miss Description
Compulsory First access to a block
Conflict Block has been replaced in cache
Capacity Cache cannot contain all blocks
Replacement Policy
Least Recently Used
First In First Out
Random Replacement
Least Frequently Used

Links

IEEE 754 to Decimal
Decimal to IEEE 754
Hexadecimal-Binary-Decimal
XOR
Bitwise Calculator
MIPS to Hexadecimal