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splitwise-sim.patch
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diff --git a/.gitignore b/.gitignore
index d4adecd..ceb9039 100644
--- a/.gitignore
+++ b/.gitignore
@@ -6,4 +6,5 @@ results/
traces/
code_distributions.csv
conv_distributions.csv
-
+.idea
+venv
diff --git a/allocator.py b/allocator.py
index f8f842c..2948f73 100644
--- a/allocator.py
+++ b/allocator.py
@@ -51,10 +51,16 @@ class Allocator(ABC):
model = model_repo.get_model(model_architecture=model_architecture,
model_size=model_size,
model_parallelism=parallelism)
+
+ # instances inherit the name of the GPU processor
+ instance_name = None
+ for processor in processors:
+ if processor.processor_type.value == 2:
+ instance_name = processor.name
instance = Instance.from_config(instance_cfg=instance_cfg,
instance_id=next(self.total_instances),
application=self.application,
- name=processors[0].name,
+ name=instance_name,
tag=tag,
model=model,
processors=processors,
diff --git a/cluster.py b/cluster.py
index 4bca5ba..90b464d 100644
--- a/cluster.py
+++ b/cluster.py
@@ -6,6 +6,7 @@ from itertools import count
from hydra.utils import instantiate
import hardware_repo
+from processor import ProcessorType
from simulator import clock, schedule_event, cancel_event, reschedule_event
from server import Server
@@ -81,6 +82,52 @@ class Cluster:
lambda self=self, power=self.total_power: \
self.power_telemetry(0))
+ def task_logs(self):
+ task_logs = []
+ # self.servers is a dictionary of lists of servers. We need to iterate over the lists.
+ for sku in self.servers:
+ for server in self.servers[sku]:
+ cpu = [processor for processor in server.processors
+ if processor.processor_type == ProcessorType.CPU][0]
+ task_logs.append((server.server_id, [{
+ "tasks_total": cpu.total_task_count_log,
+ "tasks_oversubscribed": cpu.oversubscribed_task_count_log,
+ "T_ts": cpu.temp_T_ts,
+ "tasks_count": cpu.temp_running_tasks
+ }]))
+ return task_logs
+
+ def sleep_mgt_logs(self):
+ slp_mgt_logs = []
+ # self.servers is a dictionary of lists of servers. We need to iterate over the lists.
+ for sku in self.servers:
+ for server in self.servers[sku]:
+ cpu = [processor for processor in server.processors
+ if processor.processor_type == ProcessorType.CPU][0]
+ slp_mgt_logs.append((server.server_id, cpu.sleep_manager_logs))
+ return slp_mgt_logs
+
+ def cpu_core_usage(self):
+ """
+ Returns the CPU core usage of the cluster.
+ """
+ servers = []
+ # self.servers is a dictionary of lists of servers. We need to iterate over the lists.
+ for sku in self.servers:
+ for server in self.servers[sku]:
+ cpu = [processor for processor in server.processors
+ if processor.processor_type == ProcessorType.CPU][0]
+ cpu.trigger_state_update()
+ servers.append((server.server_id, cpu.core_activity_log))
+ return servers
+
+ def trigger_state_update(self):
+ for sku in self.servers:
+ for server in self.servers[sku]:
+ cpu = [processor for processor in server.processors
+ if processor.processor_type == ProcessorType.CPU][0]
+ cpu.trigger_state_update()
+
def run(self):
"""
Runs servers in the cluster.
diff --git a/configs/cluster/half_half-with-cpu.yaml b/configs/cluster/half_half-with-cpu.yaml
new file mode 100644
index 0000000..7a46532
--- /dev/null
+++ b/configs/cluster/half_half-with-cpu.yaml
@@ -0,0 +1,11 @@
+power_budget: 232000
+
+servers:
+ - sku: dgx-a100-with-cpu
+ count: 1
+ - sku: dgx-h100-with-cpu
+ count: 0
+
+interconnects:
+ - link: infiniband
+ topology: p2p
diff --git a/configs/hardware_repo/processors/dual-amd-rome-7742.yaml b/configs/hardware_repo/processors/dual-amd-rome-7742.yaml
new file mode 100644
index 0000000..2a9f0e7
--- /dev/null
+++ b/configs/hardware_repo/processors/dual-amd-rome-7742.yaml
@@ -0,0 +1,4 @@
+_target_: processor.CPU
+name: dual-amd-rome-7742
+memory_size: 0
+core_count: 128
\ No newline at end of file
diff --git a/configs/hardware_repo/processors/dual-xeon-platinum-8480c-112.yaml b/configs/hardware_repo/processors/dual-xeon-platinum-8480c-112.yaml
new file mode 100644
index 0000000..826834b
--- /dev/null
+++ b/configs/hardware_repo/processors/dual-xeon-platinum-8480c-112.yaml
@@ -0,0 +1,4 @@
+_target_: processor.CPU
+name: dual-xeon-platinum-8480c
+memory_size: 0
+core_count: 112
\ No newline at end of file
diff --git a/configs/hardware_repo/processors/dual-xeon-platinum-8480c-40.yaml b/configs/hardware_repo/processors/dual-xeon-platinum-8480c-40.yaml
new file mode 100644
index 0000000..6177bf7
--- /dev/null
+++ b/configs/hardware_repo/processors/dual-xeon-platinum-8480c-40.yaml
@@ -0,0 +1,4 @@
+_target_: processor.CPU
+name: dual-xeon-platinum-8480c
+memory_size: 0
+core_count: 40
diff --git a/configs/hardware_repo/processors/dual-xeon-platinum-8480c-80.yaml b/configs/hardware_repo/processors/dual-xeon-platinum-8480c-80.yaml
new file mode 100644
index 0000000..ec543d2
--- /dev/null
+++ b/configs/hardware_repo/processors/dual-xeon-platinum-8480c-80.yaml
@@ -0,0 +1,4 @@
+_target_: processor.CPU
+name: dual-xeon-platinum-8480c
+memory_size: 0
+core_count: 80
diff --git a/configs/hardware_repo/processors/dual-xeon-platinum-8480c.yaml b/configs/hardware_repo/processors/dual-xeon-platinum-8480c.yaml
new file mode 100644
index 0000000..6040205
--- /dev/null
+++ b/configs/hardware_repo/processors/dual-xeon-platinum-8480c.yaml
@@ -0,0 +1,4 @@
+_target_: processor.CPU
+name: dual-xeon-platinum-8480c
+memory_size: 0
+core_count: 112 # scaled
diff --git a/configs/hardware_repo/skus/dgx-a100-with-cpu.yaml b/configs/hardware_repo/skus/dgx-a100-with-cpu.yaml
new file mode 100644
index 0000000..0348772
--- /dev/null
+++ b/configs/hardware_repo/skus/dgx-a100-with-cpu.yaml
@@ -0,0 +1,9 @@
+_target_: server.Server
+name: dgx-a100
+tdp: 6500
+processors:
+ - name: a100-80gb
+ count: 8
+ - name: dual-amd-rome-7742
+ count: 1
+interconnects: {}
diff --git a/configs/hardware_repo/skus/dgx-h100-with-cpu-vm112.yaml b/configs/hardware_repo/skus/dgx-h100-with-cpu-vm112.yaml
new file mode 100644
index 0000000..a19fa39
--- /dev/null
+++ b/configs/hardware_repo/skus/dgx-h100-with-cpu-vm112.yaml
@@ -0,0 +1,9 @@
+_target_: server.Server
+name: dgx-h100
+tdp: 10200
+processors:
+ - name: h100-80gb
+ count: 8
+ - name: dual-xeon-platinum-8480c-112
+ count: 1
+interconnects: {}
diff --git a/configs/hardware_repo/skus/dgx-h100-with-cpu-vm40.yaml b/configs/hardware_repo/skus/dgx-h100-with-cpu-vm40.yaml
new file mode 100644
index 0000000..1aad043
--- /dev/null
+++ b/configs/hardware_repo/skus/dgx-h100-with-cpu-vm40.yaml
@@ -0,0 +1,9 @@
+_target_: server.Server
+name: dgx-h100
+tdp: 10200
+processors:
+ - name: h100-80gb
+ count: 8
+ - name: dual-xeon-platinum-8480c-40
+ count: 1
+interconnects: {}
diff --git a/configs/hardware_repo/skus/dgx-h100-with-cpu-vm80.yaml b/configs/hardware_repo/skus/dgx-h100-with-cpu-vm80.yaml
new file mode 100644
index 0000000..e968f8f
--- /dev/null
+++ b/configs/hardware_repo/skus/dgx-h100-with-cpu-vm80.yaml
@@ -0,0 +1,9 @@
+_target_: server.Server
+name: dgx-h100
+tdp: 10200
+processors:
+ - name: h100-80gb
+ count: 8
+ - name: dual-xeon-platinum-8480c-80
+ count: 1
+interconnects: {}
diff --git a/configs/hardware_repo/skus/dgx-h100-with-cpu.yaml b/configs/hardware_repo/skus/dgx-h100-with-cpu.yaml
new file mode 100644
index 0000000..c17b2fc
--- /dev/null
+++ b/configs/hardware_repo/skus/dgx-h100-with-cpu.yaml
@@ -0,0 +1,9 @@
+_target_: server.Server
+name: dgx-h100
+tdp: 10200
+processors:
+ - name: h100-80gb
+ count: 8
+ - name: dual-xeon-platinum-8480c
+ count: 1
+interconnects: {}
diff --git a/configs/start_state/splitwise-with-cpu.yaml b/configs/start_state/splitwise-with-cpu.yaml
new file mode 100644
index 0000000..6ad3fcc
--- /dev/null
+++ b/configs/start_state/splitwise-with-cpu.yaml
@@ -0,0 +1,23 @@
+# single application_id is allocated to all servers
+
+state_type: splitwise_${start_state.prompt.num_instances}_${start_state.token.num_instances}
+application_id: 0
+split_type: homogeneous
+prompt:
+ instance_type: Splitwise
+ max_batch_size: 512
+ max_batch_tokens: 2048
+ max_preemptions: 4
+ pipeline_parallelism: 1
+ tensor_parallelism: 8
+ num_instances: 1
+ instance_names: ["dgx-h100-with-cpu"]
+token:
+ instance_type: Splitwise
+ max_batch_size: 512
+ max_batch_tokens: 2048
+ max_preemptions: 4
+ pipeline_parallelism: 1
+ tensor_parallelism: 8
+ num_instances: 1
+ instance_names: ["dgx-a100-with-cpu"]
diff --git a/core_power.py b/core_power.py
new file mode 100644
index 0000000..9f33815
--- /dev/null
+++ b/core_power.py
@@ -0,0 +1,418 @@
+import math
+from enum import Enum
+import numpy as np
+
+# Approximate infinity value for the latency limit of the core wake-up time.
+# the requirement is to have an upper bound for all core idle state transition times.
+# we set to an hour, because all core transition times are practically less than that.
+APPROX_INFINITY_S = 60 * 60
+
+CPU_CORE_ADJ_INTERVAL = 1
+
+
+class CState:
+ state: str
+ target_residency_s: float
+ transition_time_s: float
+ power_w: float
+ p_state: str
+ temp: float
+
+ def __init__(self, state, target_residency_s, transition_time_s, power_w, p_state, temp):
+ self.state = state
+ self.target_residency_s = target_residency_s
+ self.transition_time_s = transition_time_s
+ self.power_w = power_w
+ self.p_state = p_state
+ self.temp = temp
+
+ def __str__(self):
+ return (
+ f"CState(state={self.state}, "
+ f"target_residency_s={self.target_residency_s}, "
+ f"transition_time_s={self.transition_time_s}, "
+ f"power_w={self.power_w})"
+ f"temp_c={self.temp})"
+ )
+
+
+class Temperatures(float, Enum):
+ C0_RTEVAL = 54.00
+ C0_POLL = 51.08
+ C6 = 48.00
+
+
+class CStates(Enum):
+ """Server CPU C-states from Table 1 of [1].
+ [1] J. H. Yahya et al., "AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive
+ Server Applications," 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), Chicago, IL, USA,
+ 2022, pp. 835-850, doi: 10.1109/MICRO56248.2022.00063. keywords: {Degradation;Program processors;Microarchitecture;
+ Coherence;Market research;Energy efficiency;Generators;Energy Efficiency;power management;Latency Sensitive applications},
+ """
+ C0 = CState('C0', 0.0, 0.0, 4.0, 'P1',
+ temp=Temperatures.C0_POLL) # active and executing instructions at highest performance state
+ C1 = CState('C1', 2e-6, 2e-6, 1.44, 'P1', temp=Temperatures.C0_POLL) # idle but online
+ C6 = CState('C6', 0.0006, 0.000133, 0.1, p_state=None, temp=Temperatures.C6) # deep sleep state
+
+
+c_state_data = {
+ # todo We approximate IPC to 1.0, and power values estimated from prior work [1].Nevertheless, both are not used
+ # for current experiments. Prior to that, it needs to be modelled properly.
+ # [1] Smejkal, T., Bierbaum, J., Oberhauser, T., Schirmeier, H., & Härtig, H. (2023, December). Sleep Well:
+ # Pragmatic Analysis of the Idle States of Intel Processors. In Proceedings of the IEEE/ACM 10th International
+ # Conference on Big Data Computing, Applications and Technologies (pp. 1-10).
+ 'dual-amd-rome-7742': {
+ 'C0': {
+ "state": "C0",
+ "transition_time_s": 0.0,
+ "target_residency_s": 0.0,
+ "core_power_w": 2.572,
+ "IPC": 1.0
+ },
+ 'C1': {
+ "state": "C1",
+ "transition_time_s": 2e-6,
+ "target_residency_s": 2e-6,
+ "core_power_w": 2.572 * 0.30,
+ "IPC": 0.0
+ },
+ 'C6': {
+ "state": "C6",
+ "transition_time_s": 0.000133,
+ "target_residency_s": 0.0006,
+ "core_power_w": 2.572 * 0.025,
+ "IPC": 0.0
+ },
+ },
+ 'dual-xeon-platinum-8480c': {
+ 'C0': {
+ "state": "C0",
+ "transition_time_s": 0.0,
+ "target_residency_s": 0.0,
+ "core_power_w": 4.0,
+ "IPC": 1.0
+ },
+ 'C1': {
+ "state": "C1",
+ "transition_time_s": 2e-6,
+ "target_residency_s": 2e-6,
+ "core_power_w": 4.0 * 0.30,
+ "IPC": 0.0
+ },
+ 'C6': {
+ "state": "C6",
+ "transition_time_s": 0.000133,
+ "target_residency_s": 0.0006,
+ "core_power_w": 4.0 * 0.025,
+ "IPC": 0.0
+ },
+ }
+}
+
+
+def get_c_states(cpu_model):
+ """Server CPU C-states.
+ To model idle states of server CPUs, we create a model based on specification values provided for Intel server CPUs.
+ [1] J. H. Yahya et al., "AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive
+ Server Applications," 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), Chicago, IL, USA,
+ 2022, pp. 835-850, doi: 10.1109/MICRO56248.2022.00063. keywords: {Degradation;Program processors;Microarchitecture;
+ Coherence;Market research;Energy efficiency;Generators;Energy Efficiency;power management;Latency Sensitive applications},
+
+ information: https://lenovopress.lenovo.com/lp1945-using-processor-idle-c-states-with-linux-on-thinksystem-servers
+ """
+
+ return c_state_data[cpu_model]
+
+
+'''specs
+DGX H100 - https://resources.nvidia.com/en-us-dgx-systems/ai-enterprise-dgx?xs=489753
+DGX A100 - https://images.nvidia.com/aem-dam/Solutions/Data-Center/nvidia-dgx-a100-datasheet.pdf
+'''
+machine_specs = {
+ 'dual-xeon-platinum-8480c': { # Dual Intel® Xeon® Platinum 8480C
+ 'cores': 112,
+ 'refresh_cycle_years': 3,
+ 'cpu_tdp_w': 700,
+ 'rest_of_pkg_power_w': 252,
+ 'c0_power_w': 4.0,
+ 'c6_power_w': 0.1,
+ # this is assumed to be a constant. rest_of_pkg_power_w + num_cores * c0_power = cpu_tdp_w
+ # C-state power values are approximated with Intel Skylake c-state idle power consumption
+ },
+ 'dual-amd-rome-7742': { # Dual AMD Rome 7742
+ 'cores': 128,
+ 'refresh_cycle_years': 3,
+ # https://mcomputers.cz/en/products-and-services/nvidia/dgx-systems/nvidia-dgx-a100/
+ 'cpu_tdp_w': 450,
+ 'rest_of_pkg_power_w': 117.2,
+ # idle_power is 130 W (https://www.anandtech.com/show/16778/amd-epyc-milan-review-part-2/3). assume idle is all cores at c6.
+ # num_cores * c6_power + rest_of_pkg_power_w = idle_power
+ 'c0_power_w': 2.6,
+ # num_cores * c0_power + rest_of_pkg_power_w = cpu_tdp_w
+ 'c1_power_w': 0.936,
+ # Approx. Intel skylake: C1 power is 0.36 times C6 power.
+ 'c6_power_w': 0.1,
+ # approximated with Intel skylake C6
+ },
+}
+
+
+def calculate_core_power(c_state, model):
+ return c_state.power_w
+
+
+def get_c_state_from_idle_governor(last_8_idle_durations_s=None, latency_limit_core_wake_s=APPROX_INFINITY_S):
+ """Implements Menu governer algorithm[1] to calculate the C-state.
+
+ There are several steps in selecting a c-state per-core. The Goal here is to correctly predict the idle duration of the
+ cpu, and select the appropriate c-state such that power saving and transition latency are balanced.
+
+ 1. Initial idle duration is predicted based on the next os scheduler event. In ours, we assume that all other system
+ services are executed using dedicated cores and cores handle LLM inference are dedicated to that task only. Thus,
+ scheduler events do not interrupt those cores.
+
+ 2. Predicted value is then adjusted for correction. For example, the predicted value is 50 ms. But typically cores
+ never stay idle for that long. So pre-calculated correction factor, say 0.8, is applied. eg: 50ms * 0.8 = 40ms. In
+ ours, we do not calculate that.
+
+ 3. Next pattern recognition. Last 8 idle durations observed are saved. If the variance of those 8 values are lower,
+ the average of those values is considered as a typical idle duration. Compared to that average, if the predicted
+ value so far is higher, then the average is taken as the idle duration (i.e. take min). In ours, since we do not
+ calculate the initial idle duration, we start from the typical idle duration calculation and take that as the idle
+ duration.
+
+ 4. Next, a latency limit is applied to help interactive workloads.
+
+ 5. Afterwards, the appropriate c-state is selected by comparing their target residency and transition latency with
+ the calculated idle duration.
+
+ [1] https://www.kernel.org/doc/html/v5.4/admin-guide/pm/cpuidle.html
+ """
+ idle_queue = last_8_idle_durations_s.copy()
+ if idle_queue is None:
+ idle_queue = []
+ predicted_idle_duration = APPROX_INFINITY_S
+ while len(idle_queue) > 0:
+ average = sum(idle_queue) / len(idle_queue)
+ variance = sum((x - average) ** 2 for x in idle_queue) / len(idle_queue)
+ standard_deviation = variance ** 0.5
+ if variance < 0.0004 or average > 6 * standard_deviation:
+ predicted_idle_duration = average
+ break
+ idle_queue.remove(max(idle_queue))
+
+ latency_limit = predicted_idle_duration
+ number_of_tasks_waiting_on_io = 0 # we assume LLM inference tasks are CPU bound
+ latency_limit_of_power_mgt_qos = latency_limit_core_wake_s
+ if number_of_tasks_waiting_on_io > 0:
+ latency_limit = latency_limit / number_of_tasks_waiting_on_io
+ latency_limit = min(latency_limit, latency_limit_of_power_mgt_qos)
+
+ c_states = [state.value for state in CStates if
+ state.value.state != "C0"] # C0 indicate active and executing instructions, which is not idle
+ chosen_c_state = list(filter(lambda x: x.state == "C1", c_states))[0] # default to C1 = idle but online
+
+ return chosen_c_state
+
+
+def calculate_WTTF(cpu_model, time_s, c_state, freq):
+ """
+ Placeholder function to calculate the Weighted Time to First Failure (WTTF) of the system [1].
+
+ [1] Zhao, J., Lim, K., Anderson, T., & Enright Jerger, N. (2023, July). The Case of Unsustainable CPU Affinity.
+ In Proceedings of the 2nd Workshop on Sustainable Computer Systems (pp. 1-7).
+
+ Returns:
+ - WTTF value.
+ """
+ c_state = get_c_states(cpu_model=cpu_model)[c_state]
+ '''Calculation of WTTF
+ WTTF = SUM(ipc * operating_frequency * delta_t)
+
+ IPC (Instructions per cycle): We estimate that per c-state.
+ operating_frequency: We do not model dynamic frequency. We assume servers are tuned to provide a constant
+ performance through a fixed cpu frequency.
+ '''
+ wttf = c_state['IPC'] * freq * time_s
+ return wttf
+
+
+ATLAS_PARAMS = {
+ # [1] M. Ansari et al., “ATLAS: Aging-Aware Task Replication for Multicore Safety-Critical Systems,”
+ # in 2023 IEEE 29th Real-Time and Embedded Technology and Applications Symposium (RTAS), San Antonio, TX,
+ # USA: IEEE, May 2023, pp. 223–234. doi: 10.1109/RTAS58335.2023.00025.
+ '130nm': {
+ 'Vdd': 1.3,
+ 'Vth': 0.2,
+ 't_ox': 2.25
+ },
+ '45nm': {
+ 'Vdd': 1.1,
+ 'Vth': 0.2,
+ 't_ox': 1.75
+ },
+ '32nm': {
+ 'Vdd': 1.0,
+ 'Vth': 0.22,
+ 't_ox': 1.65
+ },
+ '22nm': {
+ 'Vdd': 0.9,
+ 'Vth': 0.25,
+ 't_ox': 1.4
+ },
+ '14nm': {
+ 'Vdd': 0.8,
+ 'Vth': 0.31,
+ 't_ox': 0.9
+ },
+}
+
+
+def calc_long_term_vth_shift(vth_old, t_length, t_temp, n=0.17):
+ """
+ We use a recursive vth calculation model from,
+ Moghaddasi, I., Fouman, A., Salehi, M. E., & Kargahi, M. (2018). Instruction-level NBTI stress estimation and its
+ application in runtime aging prediction for embedded processors. IEEE Transactions on Computer-Aided Design of
+ Integrated Circuits and Systems, 38(8), 1427-1437.
+
+ Split time into each measurement interval. For each interval, time length and temperature is given.
+
+ t_length: time in seconds
+ t_temp: temperature in Celsius
+ """
+ ADH = calc_ADH(temp_celsius=t_temp)
+
+ f_1 = vth_old / ADH
+ f_2 = math.pow(f_1, 1 / n)
+ vth_new = ADH * math.pow((f_2 + t_length), n)
+ return vth_new
+
+
+def calc_ADH(temp_celsius=26.0, n=0.17):
+ """
+ Calculate the shift in threshold voltage.
+
+ Source: ATLAS paper.
+ """
+ temp_kelvin = temp_celsius + 273.15
+
+ lithography = '22nm'
+
+ K_B_boltzman_constant = 0.00008617
+ E_0 = 0.1897 # eV
+ B = 0.075 # nm/V
+ t_ox = ATLAS_PARAMS[lithography]['t_ox']
+ Vdd = ATLAS_PARAMS[lithography]['Vdd']
+
+ A_T_Vdd = (math.exp(-E_0 / (K_B_boltzman_constant * temp_kelvin))
+ * math.exp((B * Vdd) / (t_ox * K_B_boltzman_constant * temp_kelvin)))
+
+ """ATLAS: for 22nm, worstcase degradation is 30% after 10 years. Our system worst temperature is 54.
+ If a core continously operate at 54C with 1.0 stress (full utilization) for 10 years, then frequency should degrade by 30%.
+ Solving the delta_vth equation for this scenario yield following fitting parameter.
+ """
+ k_fitting_param = 1.06980863
+
+ # we assume that all tasks yield 1.0 stress (max utilization). Even not execute a task, if core is awake, it might serve floating sytem task.
+ # in our model, only forced sleep cores are truly having 0 stress. Caller should not call this function for sleeping cores.
+ Y = 1.0 # amount of stress.
+
+ # delta_vth = k_fitting_param * A_T_Vdd * math.pow(Y, n) * math.pow(t_elapsed_time, n)
+ ADH = k_fitting_param * A_T_Vdd * math.pow(Y, n)
+ return ADH
+
+
+def calc_aged_freq(initial_freq, cum_delta_vth):
+ """
+ Calculate the core frequency w.r.t. aging. initial frequency is the process variation induced initial frequency of
+ the core.
+ """
+ lithography = '22nm'
+ Vdd = ATLAS_PARAMS[lithography]['Vdd']
+ Vth = ATLAS_PARAMS[lithography]['Vth']
+
+ return initial_freq * (1 - (cum_delta_vth / (Vdd - Vth)))
+
+
+def gen_init_fq(n_cores=128):
+ """
+ Generates the initial frequencies for a given number of processor cores
+ based on process parameters modeled as a Gaussian distribution. The function
+ calculates the correlations of process parameters across a 2D grid of tiles
+ in each core and derives the maximum frequency (f_max) for each core.
+
+ Process variation model is derived from the following paper: Raghunathan, B., Turakhia, Y., Garg, S., & Marculescu,
+ D. (2013, March). Cherry-picking: Exploiting process
+ variations in dark-silicon homogeneous chip multi-processors. In 2013 Design, Automation & Test in Europe
+ Conference & Exhibition (DATE) (pp. 39-44). IEEE.
+
+ Args:
+ - n_cores (int, optional): The number of processor cores.
+
+ Returns:
+ - List[float]: A list of maximum frequencies (f_max) for the given number
+ of cores.
+
+ Attributes:
+ - f_nom (float): The nominal frequency of the processor in GHz, set to 2.25 GHz.
+ - N (int): The grid dimension for the core, set to 100 for a 100x100 grid.
+ - mu_p (float): Mean process parameter value derived from the nominal frequency.
+ - sig_p (float): Standard deviation of the process parameter, set as
+ 10% of mu_p.
+ """
+ f_nom = 2.25 # GHz
+
+ # We assume that critical paths are uniformly distributed across the core (all grid tiles).
+ N = 10 # 100x100 grid
+
+ """
+ K_dash = 1 and say no process variations. Then, f_max of the core = 1 * min (1 / process_parameter). No pro. para.
+ means f_max = 1/ pro.para. Then f_max must match nominal fq. Which derives, pro. para. = 1 / f_nominal. Without
+ variations, pro.para. should match the mean of the gaussian dst, to which pro.para is modelled. Thus, mu_p = 1 / f_nominal.
+ """
+ mu_p = 1.0 / f_nom
+ sig_p = 0.1 * mu_p # 10% of mu_p
+
+ fqs = []
+ for idx in range(n_cores):
+ # Grid point coordinates
+ x, y = np.meshgrid(np.arange(N), np.arange(N))
+ grid_points = np.column_stack([x.ravel(), y.ravel()]) # Shape (N*N, 2)
+
+ # Calculate pairwise Euclidean distances
+ distances = np.linalg.norm(grid_points[:, np.newaxis, :] - grid_points[np.newaxis, :, :], axis=2)
+
+ """
+ Estimate half-of die with half of N_chip. At that distance apart, correlation coefficient of pro. paras. are 0.1.
+ """
+ # From [1]: At halfway distance, the correlation is < 0.1. Solve the equation for that scenario to calculate
+ # alpha.
+ # [1] B. Raghunathan, Y. Turakhia, S. Garg, and D. Marculescu, “Cherry-Picking: Exploiting Process Variations
+ # in Dark-Silicon Homogeneous Chip Multi-Processors,” in Design, Automation & Test in Europe Conference &
+ # Exhibition (DATE), 2013, Grenoble, France: IEEE Conference Publications, 2013, pp. 39–44.
+ # doi: 10.7873/DATE.2013.023.
+ alpha = 4.60512 / N
+
+ correlation_matrix = np.exp(-1 * alpha * distances)
+
+ # Create covariance matrix
+ covariance_matrix = (sig_p ** 2) * correlation_matrix
+
+ # Generate samples using multivariate normal distribution
+ rho_vals = np.random.multivariate_normal(
+ mean=np.full(N * N, mu_p), # Mean vector
+ cov=covariance_matrix # Covariance matrix
+ )
+
+ # Reshape samples to match the grid shape
+ rho_vals = rho_vals.reshape(N, N)
+
+ # Take inverse of each value in the rho_vals
+ rho_vals = 1 / rho_vals
+
+ # Take minimum of the rho_vals
+ f_max = min(rho_vals.flatten())
+ fqs.append(f_max)
+
+ return fqs
diff --git a/core_residency.py b/core_residency.py
new file mode 100644
index 0000000..38ba560
--- /dev/null
+++ b/core_residency.py
@@ -0,0 +1,114 @@
+import random
+
+from scipy.stats import gaussian_kde
+import numpy as np
+import pandas as pd
+
+BW_ADJUST = 0.1
+
+
+def remove_overlap(df):
+ """We study isolated inference tasks. For example, this approach allows calculating CPU usage per-task, given all idle cores, which core to pick, etc."""
+ # Compute the end times
+ df['End'] = df['Timestamp'] + df['Runtime (s)']
+
+ # Sort the DataFrame by the start times
+ df_sorted = df.sort_values('Timestamp').reset_index(drop=True)
+
+ # Initialize variables for detecting overlaps
+ overlapping_indices = set()
+ active_intervals = []
+
+ for idx, row in df_sorted.iterrows():
+ current_start = row['Timestamp']
+ current_end = row['End']
+ current_index = idx
+
+ # Remove intervals that have ended
+ active_intervals = [interval for interval in active_intervals if interval['End'] > current_start]
+
+ # Check for overlaps with active intervals
+ for interval in active_intervals:
+ if interval['End'] > current_start:
+ overlapping_indices.add(current_index)
+ overlapping_indices.add(interval['Index'])
+
+ # Add the current interval to the active list
+ active_intervals.append({'Index': current_index, 'End': current_end})
+
+ # Remove overlapping rows
+ df_cleaned = df_sorted.drop(list(overlapping_indices)).reset_index(drop=True)
+
+ return df_cleaned
+
+
+def get_formatted_data(df):
+ df = remove_overlap(df)
+ df = df[df['Phase'].str.contains('start-inference')]
+ ret_df = pd.DataFrame()
+ ret_df['time'] = df['Timestamp']
+ ret_df['token_in'] = df['Number of Input Tokens']
+ ret_df['token_out'] = df['Output Token Limit']
+ ret_df['model'] = df['Model']
+ ret_df['runtime'] = df['Runtime (s)']
+ ret_df['core'] = df['CPU Core']
+ ret_df['gpus'] = df['Number of GPUs']
+ if 'GPU Energy (J)' in df.columns:
+ ret_df['gpu_power'] = df['GPU Energy (J)'] / df['Runtime (s)']
+ elif 'GPU Energy (mJ)' in df.columns:
+ ret_df['gpu_power'] = df['GPU Energy (mJ)'] / df['Runtime (s)']
+ if 'CPU Energy (J)' in df.columns:
+ ret_df['core_power'] = df['CPU Energy (J)'] / df['Runtime (s)']
+ return ret_df
+
+
+def core_id_sampler(df, bw_adjust=0.1):
+ # Fit KDE to the core data
+ core_data = df['core'].values
+ kde = gaussian_kde(core_data, bw_method=bw_adjust)
+
+ # Generator function to sample Core ID values
+ while True:
+ yield int(np.round(kde.resample(1)[0]))
+
+
+def task_schedule_linux(cpu_cores):
+ """Implements core assignment behavior observed in the energy inference project [1].
+
+ This function collects telemetry data from inference tasks [1] to observe CPU core residency. Based on the typical
+ operating system state of an inference server, it creates a probabilistic model to replicate core assignment behavior.
+
+ platform: https://www.lcrc.anl.gov/systems/swing
+
+ [1] https://github.com/grantwilkins/energy-inference.git
+ """
+ free_core_ids = [core.id for core in cpu_cores if core.task is None]
+
+ max_retries = len(free_core_ids)
+ core_id = None
+ retries = 0
+ while core_id is None:
+ core_id = get_core_id_of_argane_swing(num_cores=len(cpu_cores))
+ if core_id not in free_core_ids:
+ core_id = None
+ retries += 1
+ if retries >= max_retries:
+ if len(free_core_ids) > 0:
+ core_id = random.choice(free_core_ids)
+ else:
+ return None
+
+ return list(filter(lambda core: core.id == core_id, cpu_cores))[0]
+
+
+def get_core_id_of_argane_swing(num_cores):
+ TOTAL_CORES_OF_THE_SAMPLER_MODEL = 256
+ id = next(sampler)
+ # scale the core id
+ ratio = (num_cores / TOTAL_CORES_OF_THE_SAMPLER_MODEL)
+ scaled_id = id * ratio
+ return int(scaled_id)
+
+
+df_core_residency = get_formatted_data(pd.read_csv('data/infer-amd-swing-llama270b.csv'))
+sampler = core_id_sampler(df_core_residency, bw_adjust=BW_ADJUST)
diff --git a/cpu_configs.properties b/cpu_configs.properties
new file mode 100644
index 0000000..875dca8
--- /dev/null
+++ b/cpu_configs.properties
@@ -0,0 +1,2 @@
+# either linux or least-aged or proposed
+task_allocation_algo=proposed
\ No newline at end of file
diff --git a/data/infer-amd-swing-llama270b.csv b/data/infer-amd-swing-llama270b.csv
new file mode 100644
index 0000000..9d50331
--- /dev/null
+++ b/data/infer-amd-swing-llama270b.csv
@@ -0,0 +1,90 @@
+Timestamp,Phase,Runtime (s),GPU-0 Energy (mJ),GPU-1 Energy (mJ),GPU-2 Energy (mJ),GPU-3 Energy (mJ),Output Token Limit,Number of Input Tokens,Iteration,Model,Number of GPUs,Prompt,Total Number of Tokens,Batch Size,System,CPU Core,GPU-0 Total Memory (MB),GPU-0 Used Memory (MB),GPU-1 Total Memory (MB),GPU-1 Used Memory (MB),GPU-2 Total Memory (MB),GPU-2 Used Memory (MB),GPU-3 Total Memory (MB),GPU-3 Used Memory (MB),GPU Energy (J)
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+1715075362.893035,start-inference-A-256,68.46594738960266,6742139,6266122,6387543,6152840,256,8,256,Llama-2-70b-chat-hf,4,What is the largest city in France?,265,32,argonne-swing,88,40960,34517.6875,40960,35579.6875,40960,35579.6875,40960,31215.6875,25548644
+1715075431.3898075,start-inference-A-512,171.2092376,20676390,19710722,19903232,18292216,512,8,512,Llama-2-70b-chat-hf,4,What is the largest city in France?,521,32,argonne-swing,93,40960,36051.6875,40960,36009.6875,40960,36009.6875,40960,31969.6875,78582560
+1715075602.6541007,start-inference-A-1024,496.9145140647888,71897312,70043995,72335451,66663814,1024,8,1024,Llama-2-70b-chat-hf,4,What is the largest city in France?,1033,32,argonne-swing,213,40960,35785.6875,40960,37903.6875,40960,37903.6875,40960,34947.6875,280940572
+1715076099.6582267,start-inference-A-2048,1663.6726236343384,254217324,249102794,259971413,239795466,2048,8,2048,Llama-2-70b-chat-hf,4,What is the largest city in France?,2057,32,argonne-swing,223,40960,36313.6875,40960,40161.6875,40960,40161.6875,40960,37479.6875,1003086997
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+1715077765.2600179,start-inference-B-16,3.756755828857422,326534,299680,328825,314877,16,16,16,Llama-2-70b-chat-hf,4,Can you explain the difference between a simile an,37,32,argonne-swing,217,40960,34337.6875,40960,35467.6875,40960,35467.6875,40960,31071.6875,1269916
+1715077769.0439048,start-inference-B-32,7.370251655578613,636540,605459,623218,597605,32,16,32,Llama-2-70b-chat-hf,4,Can you explain the difference between a simile an,53,32,argonne-swing,92,40960,34371.6875,40960,35469.6875,40960,35469.6875,40960,31073.6875,2462822
+1715077776.4398093,start-inference-B-64,15.445990085601807,1371765,1275636,1324149,1262215,64,16,64,Llama-2-70b-chat-hf,4,Can you explain the difference between a simile an,85,32,argonne-swing,205,40960,34375.6875,40960,35493.6875,40960,35493.6875,40960,31097.6875,5233765
+1715077791.9225826,start-inference-B-128,32.24592971801758,2986722,2770622,2870493,2740372,128,16,128,Llama-2-70b-chat-hf,4,Can you explain the difference between a simile an,149,32,argonne-swing,90,40960,34395.6875,40960,35513.6875,40960,35513.6875,40960,31117.6875,11368209
+1715077824.203548,start-inference-B-256,74.23896551132202,7266812,6766073,6979260,6638778,256,16,256,Llama-2-70b-chat-hf,4,Can you explain the difference between a simile an,277,32,argonne-swing,81,40960,34549.6875,40960,35579.6875,40960,35579.6875,40960,31217.6875,27650923
+1715077898.4823086,start-inference-B-512,181.73884439468384,21772543,20779929,21111258,19025025,512,16,512,Llama-2-70b-chat-hf,4,Can you explain the difference between a simile an,533,32,argonne-swing,94,40960,36183.6875,40960,36009.6875,40960,36009.6875,40960,32035.6875,82688755
+1715078080,start-inference-B-1024,510.5407907962799,72598670,70934236,73211554,67634979,1024,16,1024,Llama-2-70b-chat-hf,4,Can you explain the difference between a simile an,1045,32,argonne-swing,206,40960,36041.6875,40960,37903.6875,40960,37903.6875,40960,35075.6875,284379439
+1715078590.9240522,start-inference-B-2048,1705.838897228241,263684233,257696601,267926405,246934407,2048,16,2048,Llama-2-70b-chat-hf,4,Can you explain the difference between a simile an,2069,32,argonne-swing,86,40960,36821.6875,40960,40161.6875,40960,40163.6875,40960,37735.6875,1036241646
+1715080296.8582938,start-inference-C-8,1.7841250896453857,165341,189892,205844,191366,8,32,8,Llama-2-70b-chat-hf,4,What are some effective strategies for managing st,46,32,argonne-swing,210,40960,34395.6875,40960,35495.6875,40960,35493.6875,40960,31095.6875,752443
+1715080298.6782002,start-inference-C-16,3.7326207160949707,324926,309997,321431,306270,16,32,16,Llama-2-70b-chat-hf,4,What are some effective strategies for managing st,54,32,argonne-swing,94,40960,34373.6875,40960,35469.6875,40960,35469.6875,40960,31073.6875,1262624
+1715080302.4377172,start-inference-C-32,7.543445825576782,665441,626198,645953,624172,32,32,32,Llama-2-70b-chat-hf,4,What are some effective strategies for managing st,70,32,argonne-swing,223,40960,34375.6875,40960,35493.6875,40960,35493.6875,40960,31095.6875,2561764
+1715080310.0075788,start-inference-C-64,15.815550327301025,1431679,1328036,1388689,1318639,64,32,64,Llama-2-70b-chat-hf,4,What are some effective strategies for managing st,102,32,argonne-swing,219,40960,34375.6875,40960,35493.6875,40960,35493.6875,40960,31095.6875,5467043
+1715080325.8512113,start-inference-C-128,34.55908179283142,3219704,2990782,3117129,2975067,128,32,128,Llama-2-70b-chat-hf,4,What are some effective strategies for managing st,166,32,argonne-swing,207,40960,34415.6875,40960,35513.6875,40960,35513.6875,40960,31115.6875,12302682
+1715080360.4408891,start-inference-C-256,77.28023028373718,7674768,7125961,7360549,6969522,256,32,256,Llama-2-70b-chat-hf,4,What are some effective strategies for managing st,294,32,argonne-swing,89,40960,34621.6875,40960,35579.6875,40960,35579.6875,40960,31253.6875,29130800
+1715080438,start-inference-C-512,186.14657831192017,22819113,21698112,22392665,20269131,512,32,512,Llama-2-70b-chat-hf,4,What are some effective strategies for managing st,550,32,argonne-swing,95,40960,36319.6875,40960,36009.6875,40960,36009.6875,40960,32103.6875,87179021
+1715080623.9662416,start-inference-C-1024,524.1773097515106,75644259,73680833,76174973,70197505,1024,32,1024,Llama-2-70b-chat-hf,4,What are some effective strategies for managing st,1062,32,argonne-swing,215,40960,36301.6875,40960,37903.6875,40960,37903.6875,40960,35205.6875,295697570
+1715081148.2505808,start-inference-C-2048,1727.4615771770477,267322003,261417827,271997418,250658169,2048,32,2048,Llama-2-70b-chat-hf,4,What are some effective strategies for managing st,2086,32,argonne-swing,223,40960,37335.6875,40960,40161.6875,40960,40161.6875,40960,37989.6875,1051395417
+1715082875.793112,start-inference-D-8,1.9541492462158203,196698,222549,245821,229322,8,64,8,Llama-2-70b-chat-hf,4,Imagine you are an expert travel guide for Japan.,86,32,argonne-swing,223,40960,34399.6875,40960,35511.6875,40960,35511.6875,40960,31111.6875,894390
+1715082877.7841594,start-inference-D-16,4.161132335662842,383511,361293,370660,349241,16,64,16,Llama-2-70b-chat-hf,4,Imagine you are an expert travel guide for Japan.,94,32,argonne-swing,93,40960,34375.6875,40960,35483.6875,40960,35483.6875,40960,31087.6875,1464705
+1715082881.9927895,start-inference-D-32,8.475521326065063,762618,722459,759124,715769,32,64,32,Llama-2-70b-chat-hf,4,Imagine you are an expert travel guide for Japan.,110,32,argonne-swing,199,40960,34375.6875,40960,35483.6875,40960,35483.6875,40960,31087.6875,2959970
+1715082890.4899068,start-inference-D-64,17.465486526489258,1624582,1517841,1588221,1513657,64,64,64,Llama-2-70b-chat-hf,4,Imagine you are an expert travel guide for Japan.,142,32,argonne-swing,192,40960,34395.6875,40960,35505.6875,40960,35505.6875,40960,31109.6875,6244301
+1715082907.9833405,start-inference-D-128,37.314305543899536,3615341,3375099,3486401,3323661,128,64,128,Llama-2-70b-chat-hf,4,Imagine you are an expert travel guide for Japan.,206,32,argonne-swing,222,40960,34429.6875,40960,35531.6875,40960,35531.6875,40960,31135.6875,13800502
+1715082945.3299658,start-inference-D-256,83.33809614181519,8529074,7937519,8141047,7712621,256,64,256,Llama-2-70b-chat-hf,4,Imagine you are an expert travel guide for Japan.,334,32,argonne-swing,218,40960,34855.6875,40960,35615.6875,40960,35615.6875,40960,31369.6875,32320261
+1715083028.7092874,start-inference-D-512,196.15468335151672,25086369,24099957,24470201,22388595,512,64,512,Llama-2-70b-chat-hf,4,Imagine you are an expert travel guide for Japan.,590,32,argonne-swing,84,40960,36599.6875,40960,36209.6875,40960,36207.6875,40960,32245.6875,96045122
+1715083224.9303362,start-inference-D-1024,548.0962138175964,80005994,78497568,81277606,74764324,1024,64,1024,Llama-2-70b-chat-hf,4,Imagine you are an expert travel guide for Japan.,1102,32,argonne-swing,87,40960,37105.6875,40960,38269.6875,40960,38269.6875,40960,35607.6875,314545492
+1715083773.1153352,start-inference-D-2048,1764.1998219490051,271139585,265877825,277317778,255848200,2048,64,2048,Llama-2-70b-chat-hf,4,Imagine you are an expert travel guide for Japan.,2126,32,argonne-swing,95,40960,38369.6875,40960,40863.6875,40960,40863.6875,40960,38509.6875,1070183388
+1715085537.3992963,start-inference-E-8,2.2586379051208496,283803,283134,292136,268529,8,128,8,Llama-2-70b-chat-hf,4,"As an AI language model, you possess the capabilit",162,32,argonne-swing,193,40960,34421.6875,40960,35531.6875,40960,35531.6875,40960,31131.6875,1127602
+1715085539.696113,start-inference-E-16,5.082648515701294,499667,463758,488857,469981,16,128,16,Llama-2-70b-chat-hf,4,"As an AI language model, you possess the capabilit",170,32,argonne-swing,90,40960,34427.6875,40960,35505.6875,40960,35505.6875,40960,31109.6875,1922263
+1715085544.8047857,start-inference-E-32,10.005360841751099,1007216,935573,976367,913734,32,128,32,Llama-2-70b-chat-hf,4,"As an AI language model, you possess the capabilit",186,32,argonne-swing,194,40960,34427.6875,40960,35529.6875,40960,35529.6875,40960,31133.6875,3832890
+1715085554.8378692,start-inference-E-64,19.87956142425537,2014967,1882269,1949808,1837168,64,128,64,Llama-2-70b-chat-hf,4,"As an AI language model, you possess the capabilit",218,32,argonne-swing,193,40960,34441.6875,40960,35531.6875,40960,35531.6875,40960,31135.6875,7684212
+1715085574.7495399,start-inference-E-128,42.31931924819946,4338602,4045946,4182528,3951032,128,128,128,Llama-2-70b-chat-hf,4,"As an AI language model, you possess the capabilit",282,32,argonne-swing,87,40960,34613.6875,40960,35575.6875,40960,35575.6875,40960,31249.6875,16518108
+1715085617.102171,start-inference-E-256,93.48313879966736,10508993,9708153,9926916,9142130,256,128,256,Llama-2-70b-chat-hf,4,"As an AI language model, you possess the capabilit",410,32,argonne-swing,95,40960,35233.6875,40960,35755.6875,40960,35755.6875,40960,31561.6875,39286192
+1715085710.6270745,start-inference-E-512,218.60136103630066,29922912,28757959,29442358,26834740,512,128,512,Llama-2-70b-chat-hf,4,"As an AI language model, you possess the capabilit",666,32,argonne-swing,86,40960,37379.6875,40960,36431.6875,40960,36429.6875,40960,32635.6875,114957969
+1715085929.3057342,start-inference-E-1024,590.1171305179596,87812820,86117658,89689266,82529331,1024,128,1024,Llama-2-70b-chat-hf,4,"As an AI language model, you possess the capabilit",1173,32,argonne-swing,215,40960,38235.6875,40960,38661.6875,40960,38661.6875,40960,36171.6875,346149075
+1715086519.5371015,start-inference-E-2048,1618.054609298706,251737713,246260117,256308573,236340294,2048,128,2048,Llama-2-70b-chat-hf,4,"As an AI language model, you possess the capabilit",2032,32,argonne-swing,194,40960,35307.6875,40960,39817.6875,40960,39815.6875,40960,36973.6875,990646697
+1715088137.680525,start-inference-F-8,2.8492166996002197,341290,364709,388779,340146,8,256,8,Llama-2-70b-chat-hf,4,/* An improved random number generation package.,275,32,argonne-swing,89,40960,34503.6875,40960,35577.6875,40960,35579.6875,40960,31213.6875,1434924
+1715088140.5676346,start-inference-F-16,6.322083473205566,685037,608515,653128,619576,16,256,16,Llama-2-70b-chat-hf,4,/* An improved random number generation package.,283,32,argonne-swing,210,40960,34551.6875,40960,35557.6875,40960,35557.6875,40960,31231.6875,2566256
+1715088146.9173205,start-inference-F-32,12.22777795791626,1376003,1287650,1288492,1198708,32,256,32,Llama-2-70b-chat-hf,4,/* An improved random number generation package.,299,32,argonne-swing,211,40960,34627.6875,40960,35575.6875,40960,35575.6875,40960,31269.6875,5150853
+1715088159.1782844,start-inference-F-64,25.002392053604126,2790293,2598693,2634034,2423547,64,256,64,Llama-2-70b-chat-hf,4,/* An improved random number generation package.,331,32,argonne-swing,217,40960,34791.6875,40960,35577.6875,40960,35577.6875,40960,31351.6875,10446567
+1715088184.215921,start-inference-F-128,50.73573327064514,5783109,5482069,5562491,5025025,128,256,128,Llama-2-70b-chat-hf,4,/* An improved random number generation package.,395,32,argonne-swing,210,40960,35071.6875,40960,35665.6875,40960,35665.6875,40960,31493.6875,21852694
+1715088235.0064907,start-inference-F-256,105.90170311927795,14252835,13647199,13960954,12248367,256,256,256,Llama-2-70b-chat-hf,4,/* An improved random number generation package.,523,32,argonne-swing,218,40960,35987.6875,40960,35991.6875,40960,35991.6875,40960,31951.6875,54109355
+1715088340.960123,start-inference-F-512,250.47814345359802,36608119,35916435,36929690,33620977,512,256,512,Llama-2-70b-chat-hf,4,/* An improved random number generation package.,779,32,argonne-swing,89,40960,38577.6875,40960,36789.6875,40960,36789.6875,40960,33247.6875,143075221
+1715088591.5095413,start-inference-F-1024,662.1383728981018,101576082,99422083,103742926,95233978,1024,256,1024,Llama-2-70b-chat-hf,4,/* An improved random number generation package.,1291,32,argonne-swing,90,40960,40247.6875,40960,39273.6875,40960,39275.6875,40960,37219.6875,399975069
+1715175931.5553977,start-inference-G-8,8.806884527206421,893874,931613,880284,768713,8,512,8,Llama-2-70b-chat-hf,4,/*This is a version (aka ptmalloc2) of malloc/free,549,32,argonne-swing,189,40960,34719.6875,40960,35617.6875,40960,35615.6875,40960,31387.6875,3474484
+1715175940.4107707,start-inference-G-16,7.640662670135498,1270391,1257004,1210272,1088589,16,512,16,Llama-2-70b-chat-hf,4,/*This is a version (aka ptmalloc2) of malloc/free,557,32,argonne-swing,62,40960,34721.6875,40960,35713.6875,40960,35713.6875,40960,31389.6875,4826256
+1715175948.0834312,start-inference-G-32,15.668142795562744,2599904,2580335,2406357,2233413,32,512,32,Llama-2-70b-chat-hf,4,/*This is a version (aka ptmalloc2) of malloc/free,573,32,argonne-swing,52,40960,34861.6875,40960,35713.6875,40960,35713.6875,40960,31459.6875,9820009
+1715175963.7924056,start-inference-G-64,31.107057571411133,5213871,5230144,4879655,4458001,64,512,64,Llama-2-70b-chat-hf,4,/*This is a version (aka ptmalloc2) of malloc/free,605,32,argonne-swing,62,40960,35153.6875,40960,35815.6875,40960,35815.6875,40960,31605.6875,19781671
+1715175994.9361777,start-inference-G-128,63.35720896720886,10641496,10740817,10035557,9325579,128,512,128,Llama-2-70b-chat-hf,4,/*This is a version (aka ptmalloc2) of malloc/free,669,32,argonne-swing,177,40960,35787.6875,40960,36039.6875,40960,36039.6875,40960,31921.6875,40743449
+1715176058.3485746,start-inference-G-256,138.1055645942688,22970056,23424043,21757112,20093233,256,512,256,Llama-2-70b-chat-hf,4,/*This is a version (aka ptmalloc2) of malloc/free,797,32,argonne-swing,56,40960,37245.6875,40960,36419.6875,40960,36419.6875,40960,32651.6875,88244444
+1715176196.510476,start-inference-G-512,318.3132631778717,52201365,53923205,49820066,45730590,512,512,512,Llama-2-70b-chat-hf,4,/*This is a version (aka ptmalloc2) of malloc/free,1053,32,argonne-swing,50,40960,40929.6875,40960,37515.6875,40960,37515.6875,40960,34495.6875,201675226
+1715176514.9005806,start-inference-G-1024,813.3415386676788,133787666,137487492,126891978,116647698,1024,512,1024,Llama-2-70b-chat-hf,4,/*This is a version (aka ptmalloc2) of malloc/free,1565,32,argonne-swing,58,40960,38663.6875,40960,40589.6875,40960,40587.6875,40960,39523.6875,514814834
+1715177328.3703966,start-inference-H-8,5.914596319198608,963891,991100,918679,816916,8,1024,8,Llama-2-70b-chat-hf,4,"/void _quicksort (void *const pbase, size_t total_",994,32,argonne-swing,130,40960,34933.6875,40960,35927.6875,40960,35927.6875,40960,31543.6875,3690586
+1715177334.3457808,start-inference-H-16,11.770387887954712,1910031,1982703,1846105,1652371,16,1024,16,Llama-2-70b-chat-hf,4,"/void _quicksort (void *const pbase, size_t total_",1002,32,argonne-swing,60,40960,35051.6875,40960,35919.6875,40960,35919.6875,40960,31661.6875,7391210
+1715177346.1523619,start-inference-H-32,23.46202016,3848474,3978416,3666921,3370422,32,1024,32,Llama-2-70b-chat-hf,4,"/void _quicksort (void *const pbase, size_t total_",1018,32,argonne-swing,191,40960,35299.6875,40960,35921.6875,40960,35919.6875,40960,31787.6875,14864233
+1715177369.6517172,start-inference-H-64,48.50747275352478,7973241,8243494,7639316,6956809,64,1024,64,Llama-2-70b-chat-hf,4,"/void _quicksort (void *const pbase, size_t total_",1050,32,argonne-swing,188,40960,35683.6875,40960,36095.6875,40960,36095.6875,40960,31917.6875,30812860
+1715177418.2172854,start-inference-H-128,100.39242172241211,16493405,17080068,15763534,14414452,128,1024,128,Llama-2-70b-chat-hf,4,"/void _quicksort (void *const pbase, size_t total_",1114,32,argonne-swing,60,40960,36749.6875,40960,36461.6875,40960,36461.6875,40960,32449.6875,63751459
+1715177518.6595223,start-inference-H-256,210.91123414039612,34880032,36023043,33231470,30522427,256,1024,256,Llama-2-70b-chat-hf,4,"/void _quicksort (void *const pbase, size_t total_",1242,32,argonne-swing,142,40960,39071.6875,40960,37059.6875,40960,37057.6875,40960,33611.6875,134656972
+1715177729.669116,start-inference-H-512,465.29207396507263,77609509,79551765,73376327,67469112,512,1024,512,Llama-2-70b-chat-hf,4,"/void _quicksort (void *const pbase, size_t total_",1498,32,argonne-swing,140,40960,38471.6875,40960,38659.6875,40960,38659.6875,40960,36319.6875,298006713
+1715178195.0459268,start-inference-H-1024,1122.7792809009552,186357601,191794550,176987871,162971971,1024,1024,1024,Llama-2-70b-chat-hf,4,"/void _quicksort (void *const pbase, size_t total_",2008,32,argonne-swing,3,40960,40185.6875,40960,37699.6875,40960,37699.6875,40960,33565.6875,718111993
+1715179317.8791382,start-inference-I-8,12.493916034698486,2038482,2114725,1969111,1821626,8,2048,8,Llama-2-70b-chat-hf,4,"#include <alloca.h>
+#include <limits.h>
+#include <",2142,32,argonne-swing,3,40960,35517.6875,40960,36121.6875,40960,36121.6875,40960,32117.6875,7943944
+1715179330.4198227,start-inference-I-16,24.775622367858887,4072825,4229200,3924548,3630259,16,2048,16,Llama-2-70b-chat-hf,4,"#include <alloca.h>
+#include <limits.h>
+#include <",2150,32,argonne-swing,128,40960,36047.6875,40960,36121.6875,40960,36121.6875,40960,32379.6875,15856832
+1715179355.2386158,start-inference-I-32,49.87935114,8175275,8507749,7858467,7254143,32,2048,32,Llama-2-70b-chat-hf,4,"#include <alloca.h>
+#include <limits.h>
+#include <",2166,32,argonne-swing,143,40960,36579.6875,40960,36481.6875,40960,36481.6875,40960,32645.6875,31795634
+1715179405.1592095,start-inference-I-64,99.69505358,16439816,17063459,15779491,14566065,64,2048,64,Llama-2-70b-chat-hf,4,"#include <alloca.h>
+#include <limits.h>
+#include <",2198,32,argonne-swing,15,40960,37385.6875,40960,36847.6875,40960,36849.6875,40960,33183.6875,63848831
+1715179504.9017742,start-inference-I-128,203.6235225200653,33423934,34809589,32167029,29661445,128,2048,128,Llama-2-70b-chat-hf,4,"#include <alloca.h>
+#include <limits.h>
+#include <",2262,32,argonne-swing,133,40960,39301.6875,40960,37219.6875,40960,37221.6875,40960,34005.6875,130061997
+1715179709,start-inference-I-256,417.9781768321991,68577251,71445906,66064207,61013953,256,2048,256,Llama-2-70b-chat-hf,4,"#include <alloca.h>
+#include <limits.h>
+#include <",2390,32,argonne-swing,0,40960,38447.6875,40960,38769.6875,40960,38769.6875,40960,36285.6875,267101317
\ No newline at end of file
diff --git a/executor.py b/executor.py
index 550232b..a08439c 100644
--- a/executor.py
+++ b/executor.py
@@ -3,6 +3,7 @@ import logging
from enum import IntEnum
from flow import Flow
+from instance import CpuTaskType, LINUX_RR_PROCESS_TIMESLICE
from node import NodeState
from simulator import clock, schedule_event, cancel_event, reschedule_event
from task import Task
@@ -34,6 +35,7 @@ class Executor():
self.submitted = []
# to cancel any events
self.completion_events = {}
+ self.cpu = None
def successors(self, node):
"""
@@ -55,6 +57,13 @@ class Executor():
"""
Submits the specified node for execution.
"""
+
+ # model cpu occupancy. note we do not model blocking time of mem. allocation for the inference flow.
+ cpu = self.cpu
+ c_id, overhead, age_scaling =cpu.assign_core_to_cpu_task(task=CpuTaskType.EXECUTOR_TASK)
+ runtime = CpuTaskType.EXECUTOR_TASK.value["overhead_time"] * age_scaling
+ schedule_event(runtime + overhead, lambda c_id=c_id: cpu.release_core_from_cpu_task(task_core_id=c_id))
+
if isinstance(node, Task):
self.submit_task(node)
elif isinstance(node, Flow):
@@ -66,6 +75,13 @@ class Executor():
"""
Submits the specified chain of Nodes for execution.
"""
+
+ # model cpu occupancy. note we do not model blocking time of mem. allocation for the inference flow.
+ cpu = self.cpu
+ c_id, overhead, age_scaling = cpu.assign_core_to_cpu_task(task=CpuTaskType.EXECUTOR_TASK)
+ runtime = CpuTaskType.EXECUTOR_TASK.value["overhead_time"] * age_scaling
+ schedule_event(runtime + overhead, lambda c_id=c_id: cpu.release_core_from_cpu_task(task_core_id=c_id))
+
for node in chain:
self.submit(node)
@@ -79,8 +95,15 @@ class Executor():
task.executor = self
self.submitted.append(task)
schedule_event(self.overheads.submit_task,
- lambda instance=instance,task=task: \
+ lambda instance=instance, task=task: \
instance.task_arrival(task))
+
+ # model cpu occupancy. note we do not model blocking time of mem. allocation for the inference flow.
+ cpu = self.cpu
+ c_id, overhead, age_scaling =cpu.assign_core_to_cpu_task(task=CpuTaskType.HANDLE_TASK_ARRIVAL)
+ runtime = (LINUX_RR_PROCESS_TIMESLICE * 2) * age_scaling
+ schedule_event(runtime + overhead, lambda c_id=c_id: cpu.release_core_from_cpu_task(task_core_id=c_id))
+
# if this is the first task in the chain, submit the chain
self.submit_chain(task.chain)
@@ -88,6 +111,13 @@ class Executor():
"""
Finishes the specified task.
"""
+
+ # model cpu occupancy. note we do not model blocking time of mem. allocation for the inference flow.
+ cpu = self.cpu
+ c_id, overhead, age_scaling = cpu.assign_core_to_cpu_task(task=CpuTaskType.EXECUTOR_TASK)
+ runtime = CpuTaskType.EXECUTOR_TASK.value["overhead_time"] * age_scaling
+ schedule_event(runtime + overhead, lambda c_id=c_id: cpu.release_core_from_cpu_task(task_core_id=c_id))
+
self.submitted.remove(task)
successor_nodes = list(self.successors(task))
# NOTE: assumes a single leaf node