From 5a6a19eb0e83865c8c178a8d4b2930a2a4e52be0 Mon Sep 17 00:00:00 2001 From: Vitor Antunes Date: Fri, 13 May 2016 22:58:06 +0100 Subject: [PATCH] Generic: Review use of variables in plugin * Support both buffer and global variables. * All "list" variables are now suffixed with `_lst`. * Add functions to get and set variables. * Deprecate `b:verilog_indent_modules` and `b:verilog_indent_preproc`. --- autoload/verilog_systemverilog.vim | 72 +++++++++++++++------- doc/tags | 11 ++-- doc/verilog_systemverilog.txt | 96 ++++++++++++------------------ indent/verilog_systemverilog.vim | 32 ++-------- plugin/verilog_systemverilog.vim | 8 +-- syntax/verilog_systemverilog.vim | 8 +-- test/run_test.vim | 10 ++-- 7 files changed, 109 insertions(+), 128 deletions(-) diff --git a/autoload/verilog_systemverilog.vim b/autoload/verilog_systemverilog.vim index 1b78168..484642b 100644 --- a/autoload/verilog_systemverilog.vim +++ b/autoload/verilog_systemverilog.vim @@ -441,7 +441,7 @@ endfunction " Verbose messaging " Only displays messages if b:verilog_verbose or g:verilog_verbose is defined function verilog_systemverilog#Verbose(message) - if exists("b:verilog_verbose") || exists("g:verilog_verbose") + if verilog_systemverilog#VariableExists("verilog_verbose") echom a:message endif endfunction @@ -450,22 +450,58 @@ endfunction " Pushes value to list only if new " Based on: http://vi.stackexchange.com/questions/6619/append-to-global-variable-and-completion function verilog_systemverilog#PushToVariable(variable, value) - if exists(a:variable) && len(split(a:variable, ',')) > 0 - exec 'let ' . a:variable . ' .= ",' . a:value . '"' - else - exec 'let ' . a:variable . ' = "' . a:value . '"' + let list = verilog_systemverilog#VariableGetValue(a:variable) + if (count(list, a:value) == 0) + call add(list, a:value) endif + call verilog_systemverilog#VariableSetValue(a:variable, list) endfunction function verilog_systemverilog#PopFromVariable(variable, value) - if exists(a:variable) - exec 'let list = split(' . a:variable . ', ",")' - if len(list) > 0 - exec 'let ' . a:variable . ' = "' . join(filter(list, 'v:val !=# a:value'), ',') . '"' - else - exec 'let ' . a:variable . ' = "' . a:value . '"' - endif + let list = verilog_systemverilog#VariableGetValue(a:variable) + call verilog_systemverilog#VariableSetValue(a:variable, filter(list, "v:val !=# a:value")) +endfunction + +" Get variable value +" Searches for both b:variable and g:variable, with this priority. +" If the variable name includes '_lst' it is automatically split into a +" list. +function verilog_systemverilog#VariableGetValue(variable) + if exists('b:' . a:variable) + let value = eval('b:' . a:variable) + elseif exists('g:' . a:variable) + let value = eval('g:' . a:variable) + else + let value = '' + endif + if a:variable =~ '_lst' + return split(value, ',') + else + return value + endif +endfunction + +" Set variable value +" Searches for both b:variable and g:variable, with this priority. +" If none exists, g: will be used +" If the variable name includes '_lst' the value argument is assumed to +" be a list. +function verilog_systemverilog#VariableSetValue(variable, value) + if a:variable =~ '_lst' + let value = join(a:value, ',') + else + let value = a:value endif + if exists('b:' . a:variable) + exec 'let b:' . a:variable . ' = value' + else + exec 'let g:' . a:variable . ' = value' + endif +endfunction + +" Checks for variable existence +function verilog_systemverilog#VariableExists(variable) + return exists('b:' . a:variable) || exists('g:' . a:variable) endfunction " }}} @@ -475,17 +511,9 @@ endfunction function verilog_systemverilog#CompleteCommand(lead, command, cursor) " Get list with current values in variable if (a:command =~ 'Folding') - if exists('g:verilog_syntax_fold') - let current_values = split(g:verilog_syntax_fold, ',') - else - let current_values = [] - endif + let current_values = verilog_systemverilog#VariableGetValue("verilog_syntax_fold_lst") elseif (a:command =~ 'Indent') - if exists('g:verilog_disable_indent') - let current_values = split(g:verilog_disable_indent, ',') - else - let current_values = [] - endif + let current_values = verilog_systemverilog#VariableGetValue("verilog_disable_indent_lst") endif " Create list with valid completion values depending on command type diff --git a/doc/tags b/doc/tags index 6903213..5da1da2 100644 --- a/doc/tags +++ b/doc/tags @@ -6,14 +6,17 @@ :VerilogFollowInstance verilog_systemverilog.txt /*:VerilogFollowInstance* :VerilogFollowPort verilog_systemverilog.txt /*:VerilogFollowPort* :VerilogGotoInstanceStart verilog_systemverilog.txt /*:VerilogGotoInstanceStart* +b:verilog_disable_indent_lst verilog_systemverilog.txt /*b:verilog_disable_indent_lst* b:verilog_dont_deindent_eos verilog_systemverilog.txt /*b:verilog_dont_deindent_eos* b:verilog_indent_assign_fix verilog_systemverilog.txt /*b:verilog_indent_assign_fix* -b:verilog_indent_modules verilog_systemverilog.txt /*b:verilog_indent_modules* -b:verilog_indent_preproc verilog_systemverilog.txt /*b:verilog_indent_preproc* b:verilog_indent_width verilog_systemverilog.txt /*b:verilog_indent_width* +b:verilog_syntax_fold_lst verilog_systemverilog.txt /*b:verilog_syntax_fold_lst* b:verilog_verbose verilog_systemverilog.txt /*b:verilog_verbose* -g:verilog_disable_indent verilog_systemverilog.txt /*g:verilog_disable_indent* -g:verilog_syntax_fold verilog_systemverilog.txt /*g:verilog_syntax_fold* +g:verilog_disable_indent_lst verilog_systemverilog.txt /*g:verilog_disable_indent_lst* +g:verilog_dont_deindent_eos verilog_systemverilog.txt /*g:verilog_dont_deindent_eos* +g:verilog_indent_assign_fix verilog_systemverilog.txt /*g:verilog_indent_assign_fix* +g:verilog_indent_width verilog_systemverilog.txt /*g:verilog_indent_width* +g:verilog_syntax_fold_lst verilog_systemverilog.txt /*g:verilog_syntax_fold_lst* g:verilog_verbose verilog_systemverilog.txt /*g:verilog_verbose* verilog-about verilog_systemverilog.txt /*verilog-about* verilog-commands verilog_systemverilog.txt /*verilog-commands* diff --git a/doc/verilog_systemverilog.txt b/doc/verilog_systemverilog.txt index 320e034..a3d3f0d 100644 --- a/doc/verilog_systemverilog.txt +++ b/doc/verilog_systemverilog.txt @@ -303,8 +303,9 @@ following mappings are added to your |vimrc|. ------------------------------------------------------------------------------ INDENT CONFIGURATION *verilog-config-indent* - *b:verilog_indent_width* + *b:verilog_indent_width* *g:verilog_indent_width* b:verilog_indent_width~ +g:verilog_indent_width~ Default: undefined Override normal |'shiftwidth'|. @@ -314,47 +315,9 @@ Example: let b:verilog_indent_width = 8 < - *b:verilog_indent_modules* -b:verilog_indent_modules~ -Default: undefined - - Increment indentation level after module port list. By default no - indentation exists and code is aligned with the {module} declaration at - column 0. - -Example: -> - let b:verilog_indent_modules = 1 -< - - *b:verilog_indent_preproc* -b:verilog_indent_preproc~ -Default: undefined - - Increment indentation level after preprocessor conditional ifdef/ifndef. - If disabled (default), code following these statements has the same - indentation level. - By default: -> - `ifdef DEFINITION - assign a = b; - `endif -< - When enbled: -> - `ifdef DEFINITION - assign a = b; - `endif -< - -Example: - -> - let b:verilog_indent_preproc = 1 -< - - *b:verilog_dont_deindent_eos* + *b:verilog_dont_deindent_eos* *g:verilog_dont_deindent_eos* b:verilog_dont_deindent_eos~ +g:verilog_dont_deindent_eos~ Default: undefined Disable de-indentation of the close parentheses of modules, functions, @@ -379,8 +342,9 @@ Example: let b:verilog_dont_deindent_eos = 1 < - *b:verilog_indent_assign_fix* + *b:verilog_indent_assign_fix* *g:verilog_indent_assign_fix* b:verilog_indent_assign_fix~ +g:verilog_indent_assign_fix~ Default: undefined Always indent lines following an assignment by a fixed amount. @@ -406,8 +370,9 @@ Example: let b:verilog_indent_assign_fix = 1 < - *g:verilog_disable_indent* -g:verilog_disable_indent~ + *b:verilog_disable_indent_lst* *g:verilog_disable_indent_lst* +b:verilog_disable_indent_lst~ +g:verilog_disable_indent_lst~ Default: undefined Disables indent for specific Verilog/SystemVerilog contexts. @@ -446,8 +411,9 @@ Example: ------------------------------------------------------------------------------ SYNTAX CONFIGURATION *verilog-config-syntax* - *g:verilog_syntax_fold* -g:verilog_syntax_fold~ + *b:verilog_syntax_fold_lst* *g:verilog_syntax_fold_lst* +b:verilog_syntax_fold_lst~ +g:verilog_syntax_fold_lst~ Default: undefined Enables syntax folding according to the configured values. @@ -501,22 +467,34 @@ Example: 6. Frequently Asked Questions *verilog-faq* ------------------------------------------------------------------------------ -How to enable/disable indenting in modules? - -There are two config variables for this. |b:verilog_indent_modules| (which -will be eventually deprecated) and the newer |g:verilog_disable_indent|. -Because of the existence of |b:verilog_indent_modules|, indenting in modules -is disabled by default. As well as this, because |b:verilog_indent_modules| is -a buffer variable, to ensure indenting in modules is always enabled you must -add the following to your |.vimrc|: +How to configure certain features only on some files? + +Many configurations support both buffer local and global variables, allowing +using default configurations together with local expections. This provides the +simplicity of using global variables that do not require |:autocmd| for users +that do not require exceptions, together with the versatily of buffer local +variables for those that need it. + +The following example allows using different settings for Verilog and +SystemVerilog files: + > - augroup systemverilog_settings_1 - au! - au Filetype verilog_systemverilog let b:verilog_indent_modules = 1 + let g:verilog_dont_deindent_eos=1 + augroup verilog_dont_deindent_eos + autocmd! + autocmd BufNewFile,BufRead *.sv let b:verilog_dont_deindent_eos=0 + augroup END +< +Another example that uses a different configuration for files inside a +specific folder: +> + let g:verilog_dont_deindent_eos=1 + augroup verilog_dont_deindent_eos + autocmd! + autocmd BufNewFile,BufRead */test/*.sv let b:verilog_dont_deindent_eos=0 augroup END < -The same also applies for |b:verilog_indent_preproc| (indentation of -preprocessor statements). +For more information regarding supported patterns check |autocmd-patterns|. ------------------------------------------------------------------------------ Why is opening verilog/systemverilog files so slow? diff --git a/indent/verilog_systemverilog.vim b/indent/verilog_systemverilog.vim index a8cc550..67acb10 100644 --- a/indent/verilog_systemverilog.vim +++ b/indent/verilog_systemverilog.vim @@ -7,13 +7,6 @@ " Inspired from script originally created by " Chih-Tsun Huang " -" Buffer Variables: -" b:verilog_indent_width : Indenting width. -" b:verilog_indent_modules : Indentation within module blocks. -" b:verilog_indent_preproc : Indent preprocessor statements. -" b:verilog_dont_deindent_eos : Don't de-indent the ); line in port lists -" and instances. -" b:verilog_indent_assign_fix : Indent assignments by fixed amount. " Only load this indent file when no other was loaded. if exists("b:did_indent") @@ -70,24 +63,10 @@ set cpo-=C function! GetVerilogSystemVerilogIndent() - if exists("g:verilog_disable_indent") - let s:verilog_disable_indent = split(g:verilog_disable_indent, ",") - else - let s:verilog_disable_indent = [] - endif - - if !exists('b:verilog_indent_modules') && - \ index(s:verilog_disable_indent, 'module') < 0 - let s:verilog_disable_indent += ['module'] - endif - - if !exists('b:verilog_indent_preproc') && - \ index(s:verilog_disable_indent, 'preproc') < 0 - let s:verilog_disable_indent += ['preproc'] - endif + let s:verilog_disable_indent = verilog_systemverilog#VariableGetValue('verilog_disable_indent_lst') - if exists('b:verilog_indent_width') - let s:offset = b:verilog_indent_width + if verilog_systemverilog#VariableExists('verilog_indent_width') + let s:offset = verilog_systemverilog#VariableGetValue('verilog_indent_width') else let s:offset = &sw endif @@ -102,8 +81,7 @@ function! GetVerilogSystemVerilogIndent() if s:curr_line =~ '^\s*)' let l:extra_offset = 0 if s:curr_line =~ '^\s*);\s*$' && - \ (exists('b:verilog_dont_deindent_eos') || - \ exists('g:verilog_dont_deindent_eos')) + \ verilog_systemverilog#VariableExists('verilog_dont_deindent_eos') let l:extra_offset = s:offset endif call verilog_systemverilog#Verbose("Indenting )") @@ -261,7 +239,7 @@ function! s:GetContextIndent() \ s:curr_line !~ s:vlog_comment && !s:IsComment(v:lnum) let l:open_offset = s:offset call verilog_systemverilog#Verbose("Increasing indent for an open statement.") - if (!exists("b:verilog_indent_assign_fix")) + if (!verilog_systemverilog#VariableExists("verilog_indent_assign_fix")) let l:look_for_open_assign = 1 endif endif diff --git a/plugin/verilog_systemverilog.vim b/plugin/verilog_systemverilog.vim index 6dc7839..05b723e 100644 --- a/plugin/verilog_systemverilog.vim +++ b/plugin/verilog_systemverilog.vim @@ -7,16 +7,16 @@ command! VerilogFollowPort call verilog_systemverilog#FollowInstanceSea command! VerilogGotoInstanceStart call verilog_systemverilog#GotoInstanceStart(line('.'), col('.')) command! -nargs=+ -complete=customlist,verilog_systemverilog#CompleteCommand \ VerilogFoldingAdd - \ call verilog_systemverilog#PushToVariable('g:verilog_syntax_fold', '') + \ call verilog_systemverilog#PushToVariable('verilog_syntax_fold_lst', '') command! -nargs=+ -complete=customlist,verilog_systemverilog#CompleteCommand \ VerilogFoldingRemove - \ call verilog_systemverilog#PopFromVariable('g:verilog_syntax_fold', '') + \ call verilog_systemverilog#PopFromVariable('verilog_syntax_fold_lst', '') command! -nargs=+ -complete=customlist,verilog_systemverilog#CompleteCommand \ VerilogDisableIndentAdd - \ call verilog_systemverilog#PushToVariable('g:verilog_disable_indent', '') + \ call verilog_systemverilog#PushToVariable('verilog_disable_indent_lst', '') command! -nargs=+ -complete=customlist,verilog_systemverilog#CompleteCommand \ VerilogDisableIndentRemove - \ call verilog_systemverilog#PopFromVariable('g:verilog_disable_indent', '') + \ call verilog_systemverilog#PopFromVariable('verilog_disable_indent_lst', '') " Configure tagbar " This requires a recent version of universal-ctags diff --git a/syntax/verilog_systemverilog.vim b/syntax/verilog_systemverilog.vim index 668c288..b33f7d5 100644 --- a/syntax/verilog_systemverilog.vim +++ b/syntax/verilog_systemverilog.vim @@ -131,12 +131,8 @@ endif syn keyword verilogObject super syn match verilogObject "\<\w\+\ze\(::\|\.\)" contains=verilogNumber -" Only enable folding if g:verilog_syntax_fold is defined -if exists("g:verilog_syntax_fold") - let s:verilog_syntax_fold=split(g:verilog_syntax_fold, ",") -else - let s:verilog_syntax_fold=[] -endif +" Only enable folding if verilog_syntax_fold_lst is defined +let s:verilog_syntax_fold=verilog_systemverilog#VariableGetValue("verilog_syntax_fold_lst") if index(s:verilog_syntax_fold, "task") >= 0 || index(s:verilog_syntax_fold, "all") >= 0 syn region verilogFold diff --git a/test/run_test.vim b/test/run_test.vim index 1ace1c3..51c53f6 100644 --- a/test/run_test.vim +++ b/test/run_test.vim @@ -5,7 +5,7 @@ function! RunTestFold() let test_result=0 " Enable all syntax folding - let g:verilog_syntax_fold="all" + let g:verilog_syntax_fold_lst="all" set foldmethod=syntax set noautochdir @@ -17,13 +17,13 @@ function! RunTestFold() echo '' " Test with "block_nested" - let g:verilog_syntax_fold="all,block_nested" + let g:verilog_syntax_fold_lst="all,block_nested" silent view! let test_result=TestFold(1) || test_result echo '' " Test with "block_named" - let g:verilog_syntax_fold="all,block_named" + let g:verilog_syntax_fold_lst="all,block_named" silent view! let test_result=TestFold(2) || test_result echo '' @@ -41,14 +41,12 @@ endfunction "----------------------------------------------------------------------- function! RunTestIndent() unlet! g:verilog_dont_deindent_eos - let g:verilog_disable_indent = "module" + let g:verilog_disable_indent_lst = "module" let test_result=0 " Open syntax indent test file silent edit test/indent.sv - let b:verilog_indent_preproc=1 - " Verify indent let test_result=TestIndent() || test_result echo ''