diff --git a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/autosar2simulink/AutoSARtoSimuLinkSwComponentTest.xtend b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/autosar2simulink/AutoSARtoSimuLinkSwComponentTest.xtend
index e85764f..89f24ec 100644
--- a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/autosar2simulink/AutoSARtoSimuLinkSwComponentTest.xtend
+++ b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/autosar2simulink/AutoSARtoSimuLinkSwComponentTest.xtend
@@ -86,6 +86,16 @@ class AutoSARtoSimuLinkSwComponentTest extends AbstractAutoSARToSimuLinkTest {
 		assertNoElementWithNameInRootModel(DEFAULT_Component_NAME)
 		
 	}
+	
+	@Test
+	def void testChangeId() {
+		createCompositeSWComponentInModel(DEFAULT_COMPOSITE_COMPONENT_NAME)
+		changeAutoSARView [
+			val component = claimAutoSARElement(CompositeSwComponent, DEFAULT_COMPOSITE_COMPONENT_NAME) as CompositeSwComponent
+			component.id = "newId"
+		]
+		assertCompositeSwComponentWithIdInRootModel("newId")
+	}
 		
 	
 }
\ No newline at end of file
diff --git a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/simulink2autosar/SimuLinkToAutoSARBlockTest.xtend b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/simulink2autosar/SimuLinkToAutoSARBlockTest.xtend
index f58e92a..1986609 100644
--- a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/simulink2autosar/SimuLinkToAutoSARBlockTest.xtend
+++ b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/simulink2autosar/SimuLinkToAutoSARBlockTest.xtend
@@ -74,5 +74,15 @@ class SimuLinkToAutoSARBlockTest extends AbstractSimuLinkToAutoSARTest {
 		
 	}
 	
+	@Test
+	def void testChangeId() {
+		createSubsystemInModel(DEFAUL_SUBSYSTEM_NAME)
+		changeSimuLinkView [
+			val subSystem = claimSimuLinkBlock(DEFAUL_SUBSYSTEM_NAME)
+			subSystem.id = "newId"
+		]
+		assertCompositeSwComponentWithIdInRootModel("newId")
+	}
+	
 	
 }
\ No newline at end of file
diff --git a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/AutoSARQueryUtil.xtend b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/AutoSARQueryUtil.xtend
index 00d5ded..c5edece 100644
--- a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/AutoSARQueryUtil.xtend
+++ b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/AutoSARQueryUtil.xtend
@@ -35,6 +35,13 @@ class AutoSARQueryUtil {
 		].claimOne
 	}
 	
+	static def <T extends AutoSARElement> SwComponent claimAutoSARElementById(View view, Class<T> element,
+		String elementId) {
+		view.getRootObjects(AutoSARModel).map[swcomponent].flatten.filter[
+		 	it.id == elementId
+		].claimOne
+	}
+	
 	static def <T extends AutoSARElement> CompositeSwComponent claimAutoSARCompositeSwComponent(View view, Class<T> element,
 		String elementName) {
 		
diff --git a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/SimuLinkAutoSARClassifierEqualityValidation.xtend b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/SimuLinkAutoSARClassifierEqualityValidation.xtend
index 1da2692..0fe1931 100644
--- a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/SimuLinkAutoSARClassifierEqualityValidation.xtend
+++ b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/SimuLinkAutoSARClassifierEqualityValidation.xtend
@@ -59,6 +59,10 @@ class SimuLinkAutoSARClassifierEqualityValidation {
 		assertElementWithName(SubSystem, CompositeSwComponent, compositeComponentName)
 	}
 	
+	def assertCompositeSwComponentWithIdInRootModel(String compositeComponentId){
+		assertElementWithId(SubSystem, CompositeSwComponent, compositeComponentId)
+	}
+	
 	
 	
 	/*
@@ -114,6 +118,18 @@ class SimuLinkAutoSARClassifierEqualityValidation {
 		]
 	}
 	
+	private def void assertElementWithId(
+		Class <? extends SimulinkElement> simulinkElement,
+		Class <? extends AutoSARElement> autoSARElement,
+		String id) {
+		viewExecutor.apply [
+			val SimulinkElement = claimSimuLinkElementById(simulinkElement, id)
+			
+			val AutoSARElement = claimAutoSARElementById(autoSARElement, id)
+			assertElementEquals(SimulinkElement , AutoSARElement )
+		]
+	}
+	
 	
 	def static dispatch void assertElementEquals(Block block, AtomicSwComponent component){
 		assertSimuLinkBlockEqualsAutoSARSwComponent(block,component)
diff --git a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/SimuLinkQueryUtil.xtend b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/SimuLinkQueryUtil.xtend
index 42580c6..36e0a09 100644
--- a/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/SimuLinkQueryUtil.xtend
+++ b/tests/tools.vitruv.applications.simulinkautosar.tests/src/tools/vitruv/applications/simulinkautosar/tests/util/SimuLinkQueryUtil.xtend
@@ -57,6 +57,13 @@ class SimuLinkQueryUtil {
 		].claimOne
 	}
 	
+	static def <T extends SimulinkElement> Block claimSimuLinkElementById(View view, Class<T> simuLinkType,
+		String elementId) {
+		getBlocksOfModel(view,elementId).filter[
+		 	it.id == elementId
+		].claimOne
+	}
+	
 	
 	static def claimSimuLinkBlockOfSubsystem(SubSystem subsystem, String blockname){
 		subsystem.subBlocks.filter[it.name == blockname].claimOne