diff --git a/tests/filecheck/dialects/arm/test_ops.mlir b/tests/filecheck/dialects/arm/test_ops.mlir
index 0f3f0a5e86..82cd85099d 100644
--- a/tests/filecheck/dialects/arm/test_ops.mlir
+++ b/tests/filecheck/dialects/arm/test_ops.mlir
@@ -17,6 +17,11 @@
 // CHECK-ASM: mul x3, x1, x2 # multiply s1 by s2
 %dss_mul = arm.dss.mul %x1, %x2 {"comment" = "multiply s1 by s2"} : (!arm.reg<x1>, !arm.reg<x2>) -> !arm.reg<x3>
 
+// CHECK-NEXT: arm.label "testlabel" {comment = "this is a label"}
+// CHECK-ASM: testlabel:                                       # this is a label
+arm.label "testlabel" {comment = "this is a label"}
+
 // CHECK-GENERIC: %x1 = "arm.get_register"() : () -> !arm.reg<x1>
 // CHECK-GENERIC: %ds_mov = "arm.ds.mov"(%x1) {comment = "move contents of s to d"} : (!arm.reg<x1>) -> !arm.reg<x2>
 // CHECK-GENERIC: %dss_mul = "arm.dss.mul"(%x1, %x2) {comment = "multiply s1 by s2"} : (!arm.reg<x1>, !arm.reg<x2>) -> !arm.reg<x3>
+// CHECK-GENERIC: "arm.label"() <{label = "testlabel"}> {comment = "this is a label"} : () -> ()
diff --git a/xdsl/dialects/arm/__init__.py b/xdsl/dialects/arm/__init__.py
index dbb2afbdba..9e2be4e784 100644
--- a/xdsl/dialects/arm/__init__.py
+++ b/xdsl/dialects/arm/__init__.py
@@ -8,7 +8,7 @@
 from xdsl.dialects.builtin import ModuleOp
 from xdsl.ir import Dialect
 
-from .ops import ARMOperation, DSMovOp, DSSMulOp, GetRegisterOp
+from .ops import ARMOperation, DSMovOp, DSSMulOp, GetRegisterOp, LabelOp
 from .register import IntRegisterType
 
 
@@ -26,6 +26,7 @@ def print_assembly(module: ModuleOp, output: IO[str]) -> None:
         GetRegisterOp,
         DSMovOp,
         DSSMulOp,
+        LabelOp,
     ],
     [
         IntRegisterType,
diff --git a/xdsl/dialects/arm/ops.py b/xdsl/dialects/arm/ops.py
index d942dc2943..687cd32d77 100644
--- a/xdsl/dialects/arm/ops.py
+++ b/xdsl/dialects/arm/ops.py
@@ -7,10 +7,16 @@
     irdl_op_definition,
     operand_def,
     opt_attr_def,
+    prop_def,
     result_def,
 )
 
-from .assembly import AssemblyInstructionArg, assembly_arg_str, assembly_line
+from .assembly import (
+    AssemblyInstructionArg,
+    append_comment,
+    assembly_arg_str,
+    assembly_line,
+)
 from .register import IntRegisterType
 
 
@@ -154,3 +160,39 @@ def __init__(
 
     def assembly_line_args(self):
         return (self.d, self.s1, self.s2)
+
+
+@irdl_op_definition
+class LabelOp(ARMOperation):
+    """
+    The label operation is used to emit text labels (e.g. loop:) that are used
+    as branch, unconditional jump targets and symbol offsets.
+    https://developer.arm.com/documentation/dui0801/l/Symbols--Literals--Expressions--and-Operators/Labels
+    """
+
+    name = "arm.label"
+    label = prop_def(StringAttr)
+    comment = opt_attr_def(StringAttr)
+
+    assembly_format = "$label attr-dict"
+
+    def __init__(
+        self,
+        label: str | StringAttr,
+        *,
+        comment: str | StringAttr | None = None,
+    ):
+        if isinstance(label, str):
+            label = StringAttr(label)
+        if isinstance(comment, str):
+            comment = StringAttr(comment)
+
+        super().__init__(
+            attributes={
+                "label": label,
+                "comment": comment,
+            },
+        )
+
+    def assembly_line(self) -> str | None:
+        return append_comment(f"{self.label.data}:", self.comment)