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SPICE Version 2G User's Guide
(10 Aug 1981)
A.Vladimirescu, Kaihe Zhang,
A.R.Newton, D.O.Pederson, A.Sangiovanni-Vincentelli
Department of Electrical Engineering and Computer Sciences
University of California
Berkeley, Ca., 94720
Acknowledgement: Dr. Richard Dowell and Dr. Sally Liu have con-
tributed to develop the present SPICE version. SPICE was origi-
nally developed by Dr. Lawrence Nagel and has been modified
extensively by Dr. Ellis Cohen.
SPICE is a general-purpose circuit simulation program for
nonlinear dc, nonlinear transient, and linear ac analyses. Cir-
cuits may contain resistors, capacitors, inductors, mutual induc-
tors, independent voltage and current sources, four types of
dependent sources, transmission lines, and the four most common
semiconductor devices: diodes, BJT's, JFET's, and MOSFET's.
SPICE has built-in models for the semiconductor devices, and
the user need specify only the pertinent model parameter values.
The model for the BJT is based on the integral charge model of
Gummel and Poon; however, if the Gummel- Poon parameters are not
specified, the model reduces to the simpler Ebers-Moll model. In
either case, charge storage effects, ohmic resistances, and a
current-dependent output conductance may be included. The diode
model can be used for either junction diodes or Schottky barrier
diodes. The JFET model is based on the FET model of Shichman and
Hodges. Three MOSFET models are implemented; MOS1 is described by
a square-law I-V characteristic MOS2 is an analytical model while
MOS3 is a semi-empirical model. Both MOS2 and MOS3 include
second-order effects such as channel length modulation, subthres-
hold conduction, scattering limited velocity saturation, small-
size effects and charge-controlled capacitances.
1. TYPES OF ANALYSIS
1.1. DC Analysis
The dc analysis portion of SPICE determines the dc operating
point of the circuit with inductors shorted and capacitors
opened. A dc analysis is automatically performed prior to a
transient analysis to determine the transient initial conditions,
and prior to an ac small-signal analysis to determine the linear-
ized, small-signal models for nonlinear devices. If requested,
the dc small-signal value of a transfer function (ratio of output
variable to input source), input resistance, and output resis-
tance will also be computed as a part of the dc solution. The dc
analysis can also be used to generate dc transfer curves: a
specified independent voltage or current source is stepped over a
user-specified range and the dc output variables are stored for
each sequential source value. If requested, SPICE also will
determine the dc small-signal sensitivities of specified output
variables with respect to circuit parameters. The dc analysis
options are specified on the .DC, .TF, .OP, and .SENS control
cards.
If one desires to see the small-signal models for nonlinear
devices in conjunction with a transient analysis operating point,
then the .OP card must be provided. The dc bias conditions will
be identical for each case, but the more comprehensive operating
point information is not available to be printed when transient
initial conditions are computed.
1.2. AC Small-Signal Analysis
The ac small-signal portion of SPICE computes the ac output
variables as a function of frequency. The program first computes
the dc operating point of the circuit and determines linearized,
small-signal models for all of the nonlinear devices in the cir-
cuit. The resultant linear circuit is then analyzed over a
user-specified range of frequencies. The desired output of an ac
small- signal analysis is usually a transfer function (voltage
gain, transimpedance, etc). If the circuit has only one ac
input, it is convenient to set that input to unity and zero
phase, so that output variables have the same value as the
transfer function of the output variable with respect to the
input.
The generation of white noise by resistors and semiconductor
devices can also be simulated with the ac small-signal portion of
SPICE. Equivalent noise source values are determined automati-
cally from the small-signal operating point of the circuit, and
the contribution of each noise source is added at a given summing
point. The total output noise level and the equivalent input
noise level are determined at each frequency point. The output
and input noise levels are normalized with respect to the square
root of the noise bandwidth and have the units Volts/rt Hz or
Amps/rt Hz. The output noise and equivalent input noise can be
printed or plotted in the same fashion as other output variables.
No additional input data are necessary for this analysis.
Flicker noise sources can be simulated in the noise analysis
by including values for the parameters KF and AF on the appropri-
ate device model cards.
The distortion characteristics of a circuit in the small-
signal mode can be simulated as a part of the ac small-signal
analysis. The analysis is performed assuming that one or two
signal frequencies are imposed at the input.
The frequency range and the noise and distortion analysis
parameters are specified on the .AC, .NOISE, and .DISTO control
lines.
1.3. Transient Analysis
The transient analysis portion of SPICE computes the tran-
sient output variables as a function of time over a user-
specified time interval. The initial conditions are automati-
cally determined by a dc analysis. All sources which are not
time dependent (for example, power supplies) are set to their dc
value. For large-signal sinusoidal simulations, a Fourier
analysis of the output waveform can be specified to obtain the
frequency domain Fourier coefficients. The transient time inter-
val and the Fourier analysis options are specified on the .TRAN
and .FOURIER control lines.
1.4. Analysis at Different Temperatures
All input data for SPICE is assumed to have been measured at
27 deg C (300 deg K). The simulation also assumes a nominal tem-
perature of 27 deg C. The circuit can be simulated at other tem-
peratures by using a .TEMP control line.
Temperature appears explicitly in the exponential terms of
the BJT and diode model equations. In addition, saturation
currents have a built-in temperature dependence. The temperature
dependence of the saturation current in the BJT models is deter-
mined by:
IS(T1) = IS(T0)*((T1/T0)**XTI)*exp(q*EG*(T1-T0)/(k*T1*T0))
where k is Boltzmann's constant, q is the electronic charge, EG
is the energy gap which is a model parameter, and XTI is the
saturation current temperature exponent (also a model parameter,
and usually equal to 3). The temperature dependence of forward
and reverse beta is according to the formula:
beta(T1)=beta(T0)*(T1/T0)**XTB
where T1 and T0 are in degrees Kelvin, and XTB is a user-supplied
model parameter. Temperature effects on beta are carried out by
appropriate adjustment to the values of BF, ISE, BR, and ISC.
Temperature dependence of the saturation current in the junction
diode model is determined by:
IS(T1) = IS(T0)*((T1/T0)**(XTI/N))*exp(q*EG*(T1-T0)/(k*N*T1*T0))
where N is the emission coefficient, which is a model parameter,
and the other symbols have the same meaning as above. Note that
for Schottky barrier diodes, the value of the saturation current
temperature exponent, XTI, is usually 2.
Temperature appears explicitly in the value of junction
potential, PHI, for all the device models. The temperature
dependence is determined by:
PHI(TEMP) = k*TEMP/q*log(Na*Nd/Ni(TEMP)**2)
where k is Boltzmann's constant, q is the electronic charge, Na
is the acceptor impurity density, Nd is the donor impurity den-
sity, Ni is the intrinsic concentration, and EG is the energy
gap.
Temperature appears explicitly in the value of surface
mobility, UO, for the MOSFET model. The temperature dependence
is determined by:
UO(TEMP) = UO(TNOM)/(TEMP/TNOM)**(1.5)
The effects of temperature on resistors is modeled by the for-
mula:
value(TEMP) = value(TNOM)*(1+TC1*(TEMP-TNOM)+TC2*(TEMP-TNOM)**2))
where TEMP is the circuit temperature, TNOM is the nominal tem-
perature, and TC1 and TC2 are the first- and second-order tem-
perature coefficients.
2. CONVERGENCE
Both dc and transient solutions are obtained by an iterative
process which is terminated when both of the following conditions
hold:
1) The nonlinear branch currents converge to within a tolerance
of 0.1 percent or 1 picoamp (1.0E-12 Amp), whichever is
larger.
2) The node voltages converge to within a tolerance of 0.1 per-
cent or 1 microvolt (1.0E-6 Volt), whichever is larger.
Although the algorithm used in SPICE has been found to be
very reliable, in some cases it will fail to converge to a solu-
tion. When this failure occurs, the program will print the node
voltages at the last iteration and terminate the job. In such
cases, the node voltages that are printed are not necessarily
correct or even close to the correct solution.
Failure to converge in the dc analysis is usually due to an
error in specifying circuit connections, element values, or model
parameter values. Regenerative switching circuits or circuits
with positive feedback probably will not converge in the dc
analysis unless the OFF option is used for some of the devices in
the feedback path, or the .NODESET card is used to force the cir-
cuit to converge to the desired state.
3. INPUT FORMAT
The input format for SPICE is of the free format type.
Fields on a card are separated by one or more blanks, a comma, an
equal (=) sign, or a left or right parenthesis; extra spaces are
ignored. A card may be continued by entering a + (plus) in
column 1 of the following card; SPICE continues reading begin-
ning with column 2.
A name field must begin with a letter (A through Z) and can-
not contain any delimiters. Only the first eight characters of
the name are used.
A number field may be an integer field (12, -44), a floating
point field (3.14159), either an integer or floating point number
followed by an integer exponent (1E-14, 2.65E3), or either an
integer or a floating point number followed by one of the follow-
ing scale factors:
T=1E12 G=1E9 MEG=1E6 K=1E3 MIL=25.4E-6
M=1E-3 U=1E-6 N=1E-9 P=1E-12 F=1E-15
Letters immediately following a number that are not scale factors
are ignored, and letters immediately following a scale factor are
ignored. Hence, 10, 10V, 10VOLTS, and 10HZ all represent the
same number, and M, MA, MSEC, and MMHOS all represent the same
scale factor. Note that 1000, 1000.0, 1000HZ, 1E3, 1.0E3, 1KHZ,
and 1K all represent the same number.
4. CIRCUIT DESCRIPTION
The circuit to be analyzed is described to SPICE by a set of
element cards, which define the circuit topology and element
values, and a set of control cards, which define the model param-
eters and the run controls. The first card in the input deck
must be a title card, and the last card must be a .END card. The
order of the remaining cards is arbitrary (except, of course,
that continuation cards must immediately follow the card being
continued).
Each element in the circuit is specified by an element card
that contains the element name, the circuit nodes to which the
element is connected, and the values of the parameters that
determine the electrical characteristics of the element. The
first letter of the element name specifies the element type. The
format for the SPICE element types is given in what follows. The
strings XXXXXXX, YYYYYYY, and ZZZZZZZ denote arbitrary
alphanumeric strings. For example, a resistor name must begin
with the letter R and can contain from one to eight characters.
Hence, R, R1, RSE, ROUT, and R3AC2ZY are valid resistor names.
Data fields that are enclosed in lt and gt signs '< >' are
optional. All indicated punctuation (parentheses, equal signs,
etc.) are required. With respect to branch voltages and
currents, SPICE uniformly uses the associated reference conven-
tion (current flows in the direction of voltage drop).
Nodes must be nonnegative integers but need not be numbered
sequentially. The datum (ground) node must be numbered zero.
The circuit cannot contain a loop of voltage sources and/or
inductors and cannot contain a cutset of current sources and/or
capacitors. Each node in the circuit must have a dc path to
ground. Every node must have at least two connections except for
transmission line nodes (to permit unterminated transmission
lines) and MOSFET substrate nodes (which have two internal con-
nections anyway).
5. TITLE CARD, COMMENT CARDS AND .END CARD
5.1. Title Card
Examples:
POWER AMPLIFIER CIRCUIT
TEST OF CAM CELL
This card must be the first card in the input deck. Its
contents are printed verbatim as the heading for each section of
output.
5.2. .END Card
Examples:
.END
This card must always be the last card in the input deck.
Note that the period is an integral part of the name.
5.3. Comment Card
General Form:
* <any comment>
Examples:
* RF=1K GAIN SHOULD BE 100
* MAY THE FORCE BE WITH MY CIRCUIT
The asterisk in the first column indicates that this card is
a comment card. Comment cards may be placed anywhere in the cir-
cuit description.
6. ELEMENT CARDS
6.1. Resistors
General form:
RXXXXXXX N1 N2 VALUE <TC=TC1<,TC2>>
Examples:
R1 1 2 100
RC1 12 17 1K TC=0.001,0.015
N1 and N2 are the two element nodes. VALUE is the resis-
tance (in ohms) and may be positive or negative but not zero.
TC1 and TC2 are the (optional) temperature coefficients; if not
specified, zero is assumed for both. The value of the resistor
as a function of temperature is given by:
value(TEMP) = value(TNOM)*(1+TC1*(TEMP-TNOM)+TC2*(TEMP-TNOM)**2))
6.2. Capacitors and Inductors
General form:
CXXXXXXX N+ N- VALUE <IC=INCOND>
LYYYYYYY N+ N- VALUE <IC=INCOND>
Examples:
CBYP 13 0 1UF
COSC 17 23 10U IC=3V
LLINK 42 69 1UH
LSHUNT 23 51 10U IC=15.7MA
N+ and N- are the positive and negative element nodes,
respectively. VALUE is the capacitance in Farads or the induc-
tance in Henries.
For the capacitor, the (optional) initial condition is the
initial (time-zero) value of capacitor voltage (in Volts). For
the inductor, the (optional) initial condition is the initial
(time-zero) value of inductor current (in Amps) that flows from
N+, through the inductor, to N-. Note that the initial condi-
tions (if any) apply 'only' if the UIC option is specified on the
.TRAN card.
Nonlinear capacitors and inductors can be described.
General form :
CXXXXXXX N+ N- POLY C0 C1 C2 ... <IC=INCOND>
LYYYYYYY N+ N- POLY L0 L1 L2 ... <IC=INCOND>
C0 C1 C2 ...(and L0 L1 L2 ...) are the coefficients of a
polynomial describing the element value. The capacitance is
expressed as a function of the voltage across the element while
the inductance is a function of the current through the inductor.
The value is computed as
value=C0+C1*V+C2*V**2+...
value=L0+L1*I+L2*I**2+...
where V is the voltage across the capacitor and I the
current flowing in the inductor.
6.3. Coupled (Mutual) Inductors
General form:
KXXXXXXX LYYYYYYY LZZZZZZZ VALUE
Examples:
K43 LAA LBB 0.999
KXFRMR L1 L2 0.87
LYYYYYYY and LZZZZZZZ are the names of the two coupled
inductors, and VALUE is the coefficient of coupling, K, which
must be greater than 0 and less than or equal to 1. Using the
'dot' convention, place a 'dot' on the first node of each induc-
tor.
6.4. Transmission Lines (Lossless)
General form:
TXXXXXXX N1 N2 N3 N4 Z0=VALUE <TD=VALUE> <F=FREQ <NL=NRMLEN>>
+ <IC=V1,I1,V2,I2>
Examples:
T1 1 0 2 0 Z0=50 TD=10NS
N1 and N2 are the nodes at port 1; N3 and N4 are the nodes
at port 2. Z0 is the characteristic impedance. The length of
the line may be expressed in either of two forms. The transmis-
sion delay, TD, may be specified directly (as TD=10ns, for exam-
ple). Alternatively, a frequency F may be given, together with
NL, the normalized electrical length of the transmission line
with respect to the wavelength in the line at the frequency F.
If a frequency is specified but NL is omitted, 0.25 is assumed
(that is, the frequency is assumed to be the quarter-wave fre-
quency). Note that although both forms for expressing the line
length are indicated as optional, one of the two must be speci-
fied.
Note that this element models only one propagating mode. If
all four nodes are distinct in the actual circuit, then two modes
may be excited. To simulate such a situation, two transmission-
line elements are required. (see the example in Appendix A for
further clarification.)
The (optional) initial condition specification consists of
the voltage and current at each of the transmission line ports.
Note that the initial conditions (if any) apply 'only' if the UIC
option is specified on the .TRAN card.
One should be aware that SPICE will use a transient time-
step which does not exceed 1/2 the minimum transmission line
delay. Therefore very short transmission lines (compared with
the analysis time frame) will cause long run times.
6.5. Linear Dependent Sources
SPICE allows circuits to contain linear dependent sources
characterized by any of the four equations
i=g*v v=e*v i=f*i v=h*i
where g, e, f, and h are constants representing transconductance,
voltage gain, current gain, and transresistance, respectively.
Note: a more complete description of dependent sources as imple-
mented in SPICE is given in Appendix B.
6.6. Linear Voltage-Controlled Current Sources
General form:
GXXXXXXX N+ N- NC+ NC- VALUE
Examples:
G1 2 0 5 0 0.1MMHO
N+ and N- are the positive and negative nodes, respectively.
Current flow is from the positive node, through the source, to
the negative node. NC+ and NC- are the positive and negative
controlling nodes, respectively. VALUE is the transconductance
(in mhos).
6.7. Linear Voltage-Controlled Voltage Sources
General form:
EXXXXXXX N+ N- NC+ NC- VALUE
Examples:
E1 2 3 14 1 2.0
N+ is the positive node, and N- is the negative node. NC+
and NC- are the positive and negative controlling nodes, respec-
tively. VALUE is the voltage gain.
6.8. Linear Current-Controlled Current Sources
General form:
FXXXXXXX N+ N- VNAM VALUE
Examples:
F1 13 5 VSENS 5
N+ and N- are the positive and negative nodes, respectively.
Current flow is from the positive node, through the source, to
the negative node. VNAM is the name of a voltage source through
which the controlling current flows. The direction of positive
controlling current flow is from the positive node, through the
source, to the negative node of VNAM. VALUE is the current gain.
6.9. Linear Current-Controlled Voltage Sources
General form:
HXXXXXXX N+ N- VNAM VALUE
Examples:
HX 5 17 VZ 0.5K
N+ and N- are the positive and negative nodes, respectively.
VNAM is the name of a voltage source through which the control-
ling current flows. The direction of positive controlling
current flow is from the positive node, through the source, to
the negative node of VNAM. VALUE is the transresistance (in
ohms).
6.10. Independent Sources
General form:
VXXXXXXX N+ N- <<DC> DC/TRAN VALUE> <AC <ACMAG <ACPHASE>>>
IYYYYYYY N+ N- <<DC> DC/TRAN VALUE> <AC <ACMAG <ACPHASE>>>
Examples:
VCC 10 0 DC 6
VIN 13 2 0.001 AC 1 SIN(0 1 1MEG)
ISRC 23 21 AC 0.333 45.0 SFFM(0 1 10K 5 1K)
VMEAS 12 9
N+ and N- are the positive and negative nodes, respectively.
Note that voltage sources need not be grounded. Positive current
is assumed to flow from the positive node, through the source, to
the negative node. A current source of positive value, will
force current to flow out of the N+ node, through the source, and
into the N- node. Voltage sources, in addition to being used for
circuit excitation, are the 'ammeters' for SPICE, that is, zero
valued voltage sources may be inserted into the circuit for the
purpose of measuring current. They will, of course, have no
effect on circuit operation since they represent short-circuits.
DC/TRAN is the dc and transient analysis value of the
source. If the source value is zero both for dc and transient
analyses, this value may be omitted. If the source value is
time-invariant (e.g., a power supply), then the value may option-
ally be preceded by the letters DC.
ACMAG is the ac magnitude and ACPHASE is the ac phase. The
source is set to this value in the ac analysis. If ACMAG is
omitted following the keyword AC, a value of unity is assumed.
If ACPHASE is omitted, a value of zero is assumed. If the source
is not an ac small-signal input, the keyword AC and the ac values
are omitted.
Any independent source can be assigned a time-dependent
value for transient analysis. If a source is assigned a time-
dependent value, the time-zero value is used for dc analysis.
There are five independent source functions: pulse, exponential,
sinusoidal, piece-wise linear, and single-frequency FM. If
parameters other than source values are omitted or set to zero,
the default values shown will be assumed. (TSTEP is the printing
increment and TSTOP is the final time (see the .TRAN card for
explanation)).
1. Pulse PULSE(V1 V2 TD TR TF PW PER)
Examples:
VIN 3 0 PULSE(-1 1 2NS 2NS 2NS 50NS 100NS)
parameters default values units
V1 (initial value) Volts or Amps
V2 (pulsed value) Volts or Amps
TD (delay time) 0.0 seconds
TR (rise time) TSTEP seconds
TF (fall time) TSTEP seconds
PW (pulse width) TSTOP seconds
PER(period) TSTOP seconds
A single pulse so specified is described by the following
table:
time value
0 V1
TD V1
TD+TR V2
TD+TR+PW V2
TD+TR+PW+TF V1
TSTOP V1
Intermediate points are determined by linear interpolation.
2. Sinusoidal SIN(VO VA FREQ TD THETA)
Examples:
VIN 3 0 SIN(0 1 100MEG 1NS 1E10)
parameters default value units
VO (offset) Volts or Amps
VA (amplitude) Volts or Amps
FREQ (frequency) 1/TSTOP Hz
TD (delay) 0.0 seconds
THETA (damping factor) 0.0 1/seconds
The shape of the waveform is described by the following
table:
time value
0 to TD VO
TD to TSTOP VO + VA*exp(-(time-TD)*THETA)*
sine(twopi*FREQ*(time+TD))
3. Exponential EXP(V1 V2 TD1 TAU1 TD2 TAU2)
Examples:
VIN 3 0 EXP(-4 -1 2NS 30NS 60NS 40NS)
parameters default values units
V1 (initial value) Volts or Amps
V2 (pulsed value) Volts or Amps
TD1 (rise delay time) 0.0 seconds
TAU1 (rise time constant) TSTEP seconds
TD2 (fall delay time) TD1+TSTEP seconds
TAU2 (fall time constant) TSTEP seconds
The shape of the waveform is described by the following
table:
time value
0 to TD1 V1
TD1 to TD2 V1+(V2-V1)*(1-exp(-(time-TD1)/TAU1))
TD2 to TSTOP V1+(V2-V1)*(1-exp(-(time-TD1)/TAU1))
+(V1-V2)*(1-exp(-(time-TD2)/TAU2))
4. Piece-Wise Linear PWL(T1 V1 <T2 V2 T3 V3 T4 V4 ...>)
Examples:
VCLOCK 7 5 PWL(0 -7 10NS -7 11NS -3 17NS -3 18NS -7 50NS -7)
Parameters and default values
Each pair (Ti, Vi) specifies that the value of the source is
Vi (in Volts or Amps) at time=Ti. The value of the source at
intermediate values of time is determined by using linear
interpolation on the input values.
5. Single-Frequency FM SFFM(VO VA FC MDI FS)
Examples:
V1 12 0 SFFM(0 1M 20K 5 1K)
parameters default values units
VO (offset) Volts or Amps
VA (amplitude) Volts or Amps
FC (carrier frequency) 1/TSTOP Hz
MDI (modulation index)
FS (signal frequency) 1/TSTOP Hz
The shape of the waveform is described by the following
equation:
value = VO + VA*sine((twopi*FC*time) + MDI*sine(twopi*FS*time))
7. SEMICONDUCTOR DEVICES
The elements that have been described to this point typi-
cally require only a few parameter values to specify completely
the electrical characteristics of the element. However, the
models for the four semiconductor devices that are included in
the SPICE program require many parameter values. Moreover, many
devices in a circuit often are defined by the same set of device
model parameters. For these reasons, a set of device model
parameters is defined on a separate .MODEL card and assigned a
unique model name. The device element cards in SPICE then refer-
ence the model name. This scheme alleviates the need to specify
all of the model parameters on each device element card.
Each device element card contains the device name, the nodes
to which the device is connected, and the device model name. In
addition, other optional parameters may be specified for each
device: geometric factors and an initial condition.
The area factor used on the diode, BJT and JFET device card
determines the number of equivalent parallel devices of a speci-
fied model. The affected parameters are marked with an asterisk
under the heading 'area' in the model descriptions below.
Several geometric factors associated with the channel and the
drain and source diffusions can be specified on the MOSFET device
card.
Two different forms of initial conditions may be specified
for devices. The first form is included to improve the dc con-
vergence for circuits that contain more than one stable state.
If a device is specified OFF, the dc operating point is deter-
mined with the terminal voltages for that device set to zero.
After convergence is obtained, the program continues to iterate
to obtain the exact value for the terminal voltages. If a cir-
cuit has more than one dc stable state, the OFF option can be
used to force the solution to correspond to a desired state. If
a device is specified OFF when in reality the device is conduct-
ing, the program will still obtain the correct solution (assuming
the solutions converge) but more iterations will be required
since the program must independently converge to two separate
solutions. The .NODESET card serves a similar purpose as the OFF
option. The .NODESET option is easier to apply and is the pre-
ferred means to aid convergence.
The second form of initial conditions are specified for use
with the transient analysis. These are true 'initial conditions'
as opposed to the convergence aids above. See the description of
the .IC card and the .TRAN card for a detailed explanation of
initial conditions.
7.1. Junction Diodes
General form:
DXXXXXXX N+ N- MNAME <AREA> <OFF> <IC=VD>
Examples:
DBRIDGE 2 10 DIODE1
DCLMP 3 7 DMOD 3.0 IC=0.2
N+ and N- are the positive and negative nodes, respectively.
MNAME is the model name, AREA is the area factor, and off indi-
cates an (optional) starting condition on the device for dc
analysis. If the area factor is omitted, a value of 1.0 is
assumed. The (optional) initial condition specification using
IC=VD is intended for use with the UIC option on the .TRAN card,
when a transient analysis is desired starting from other than the
quiescent operating point.
7.2. Bipolar Junction Transistors (BJT's)
General form:
QXXXXXXX NC NB NE <NS> MNAME <AREA> <OFF> <IC=VBE,VCE>
Examples:
Q23 10 24 13 QMOD IC=0.6,5.0
Q50A 11 26 4 20 MOD1
NC, NB, and NE are the collector, base, and emitter nodes,
respectively. NS is the (optional) substrate node. If unspeci-
fied, ground is used. MNAME is the model name, AREA is the area
factor, and OFF indicates an (optional) initial condition on the
device for the dc analysis. If the area factor is omitted, a
value of 1.0 is assumed. The (optional) initial condition
specification using IC=VBE,VCE is intended for use with the UIC
option on the .TRAN card, when a transient analysis is desired
starting from other than the quiescent operating point. See the
.IC card description for a better way to set transient initial
conditions.
7.3. Junction Field-Effect Transistors (JFET's)
General form:
JXXXXXXX ND NG NS MNAME <AREA> <OFF> <IC=VDS,VGS>
Examples:
J1 7 2 3 JM1 OFF
ND, NG, and NS are the drain, gate, and source nodes,
respectively. MNAME is the model name, AREA is the area factor,
and OFF indicates an (optional) initial condition on the device
for dc analysis. If the area factor is omitted, a value of 1.0
is assumed. The (optional) initial condition specification,
using IC=VDS,VGS is intended for use with the UIC option on the
.TRAN card, when a transient analysis is desired starting from
other than the quiescent operating point (see the .IC card for a
better way to set initial conditions).
7.4. MOSFET's
General form:
MXXXXXXX ND NG NS NB MNAME <L=VAL> <W=VAL> <AD=VAL> <AS=VAL>
+ <PD=VAL> <PS=VAL> <NRD=VAL> <NRS=VAL> <OFF> <IC=VDS,VGS,VBS>
Examples:
M1 24 2 0 20 TYPE1
M31 2 17 6 10 MODM L=5U W=2U
M31 2 16 6 10 MODM 5U 2U
M1 2 9 3 0 MOD1 L=10U W=5U AD=100P AS=100P PD=40U PS=40U
M1 2 9 3 0 MOD1 10U 5U 2P 2P
ND, NG, NS, and NB are the drain, gate, source, and bulk (sub-
strate) nodes, respectively. MNAME is the model name. L and W
are the channel length and width, in meters. AD and AS are the
areas of the drain and source diffusions, in sq-meters. Note
that the suffix U specifies microns (1E-6 m) and P sq-microns
(1E-12 sq-m). If any of L, W, AD, or AS are not specified,
default values are used. The user may specify the values to be
used for these default parameters on the .OPTIONS card. The use
of defaults simplifies input deck preparation, as well as the
editing required if device geometries are to be changed. PD and
PS are the perimeters of the drain and source junctions, in
meters. NRD and NRS designate the equivalent number of squares
of the drain and source diffusions; these values multiply the
sheet resistance RSH specified on the .MODEL card for an accurate
representation of the parasitic series drain and source resis-
tance of each transistor. PD and PS default to 0.0 while NRD and
NRS to 1.0. OFF indicates an (optional) initial condition on the
device for dc analysis. The (optional) initial condition specif-
ication using IC=VDS,VGS,VBS is intended for use with the UIC
option on the .TRAN card, when a transient analysis is desired
starting from other than the quiescent operating point. See the
.IC card for a better and more convenient way to specify tran-
sient initial conditions.
7.5. .MODEL Card
General form:
.MODEL MNAME TYPE(PNAME1=PVAL1 PNAME2=PVAL2 ... )
Examples:
.MODEL MOD1 NPN BF=50 IS=1E-13 VBF=50
The .MODEL card specifies a set of model parameters that
will be used by one or more devices. MNAME is the model name,
and type is one of the following seven types:
NPN NPN BJT model
PNP PNP BJT model
D diode model
NJF N-channel JFET model
PJF P-channel JFET model
NMOS N-channel MOSFET model
PMOS P-channel MOSFET model
Parameter values are defined by appending the parameter
name, as given below for each model type, followed by an equal
sign and the parameter value. Model parameters that are not
given a value are assigned the default values given below for
each model type.
7.6. Diode Model
The dc characteristics of the diode are determined by the
parameters IS and N. An ohmic resistance, RS, is included.
Charge storage effects are modeled by a transit time, TT, and a
nonlinear depletion layer capacitance which is determined by the
parameters CJO, VJ, and M. The temperature dependence of the
saturation current is defined by the parameters EG, the energy
and XTI, the saturation current temperature exponent. Reverse
breakdown is modeled by an exponential increase in the reverse
diode current and is determined by the parameters BV and IBV
(both of which are positive numbers).
name parameter units default example area
IS saturation current A 1.0E-14 1.0E-14 *
RS ohmic resistance Ohm 0 10 *
N emission coefficient - 1 1.0
TT transit-time sec 0 0.1Ns
CJO 0-bias junction capacitance F 0 2PF *
VJ junction potential V 1 0.6
M grading coefficient - 0.5 0.5
EG activation energy eV 1.11 1.11 Si
0.69 Sbd
0.67 Ge
XTI saturation-current temp. exp - 3.0 3.0 jn
2.0 Sbd
KF flicker noise coefficient - 0
AF flicker noise exponent - 1
FC coefficient for forward-bias - 0.5
depletion capacitance formula
BV reverse breakdown voltage V infinite 40.0
IBV current at breakdown voltage A 1.0E-3
7.7. BJT Models (both NPN and PNP)
The bipolar junction transistor model in SPICE is an adapta-
tion of the integral charge control model of Gummel and Poon.
This modified Gummel-Poon model extends the original model to
include several effects at high bias levels. The model will
automatically simplify to the simpler Ebers-Moll model when cer-
tain parameters are not specified. The parameter names used in
the modified Gummel-Poon model have been chosen to be more easily
understood by the program user, and to reflect better both physi-
cal and circuit design thinking.
The dc model is defined by the parameters IS, BF, NF, ISE,
IKF, and NE which determine the forward current gain characteris-
tics, IS, BR, NR, ISC, IKR, and NC which determine the reverse
current gain characteristics, and VAF and VAR which determine the
output conductance for forward and reverse regions. Three ohmic
resistances RB, RC, and RE are included, where RB can be high
current dependent. Base charge storage is modeled by forward and
reverse transit times, TF and TR, the forward transit time TF
being bias dependent if desired, and nonlinear depletion layer
capacitances which are determined by CJE, VJE, and MJE for the
B-E junction , CJC, VJC, and MJC for the B-C junction and CJS,
VJS, and MJS for the C-S (Collector-Substrate) junction. The
temperature dependence of the saturation current, IS, is deter-
mined by the energy-gap, EG, and the saturation current tempera-
ture exponent, XTI. Additionally base current temperature depen-
dence is modeled by the beta temperature exponent XTB in the new
model.
The BJT parameters used in the modified Gummel-Poon model
are listed below. The parameter names used in earlier versions of
SPICE2 are still accepted.
Modified Gummel-Poon BJT Parameters.
name parameter units default example area
IS transport saturation current A 1.0E-16 1.0E-15 *
BF ideal maximum forward beta - 100 100
NF forward current emission coef. - 1.0 1
VAF forward Early voltage V infinite 200
IKF corner for forward beta
high current roll-off A infinite 0.01 *
ISE B-E leakage saturation current A 0 1.0E-13 *
NE B-E leakage emission coef. - 1.5 2
BR ideal maximum reverse beta - 1 0.1
NR reverse current emission coef. - 1 1
VAR reverse Early voltage V infinite 200
IKR corner for reverse beta
high current roll-off A infinite 0.01 *
ISC B-C leakage saturation current A 0 1.0E-13 *
NC B-C leakage emission coef. - 2 1.5
RB zero bias base resistance Ohms 0 100 *
IRB current where base resistance
falls halfway to its min value A infinite 0.1 *
RBM minimum base resistance
at high currents Ohms RB 10 *
RE emitter resistance Ohms 0 1 *
RC collector resistance Ohms 0 10 *
CJE B-E 0-bias depletion capacitance F 0 2PF *
VJE B-E built-in potential V 0.75 0.6
MJE B-E junction exponential factor - 0.33 0.33
TF ideal forward transit time sec 0 0.1Ns
XTF coef. for bias dependence of TF - 0
VTF voltage describing VBC
dependence of TF V infinite
ITF high-current parameter
for effect on TF A 0 *
PTF excess phase at
freq=1.0/(TF*2PI) Hz deg 0
CJC B-C 0-bias depletion capacitance F 0 2PF *
VJC B-C built-in potential V 0.75 0.5
MJC B-C junction exponential factor - 0.33 0.5
XCJC fraction of B-C depletion
capacitance connected to
internal base node - 1
TR ideal reverse transit time sec 0 10Ns
CJS zero-bias collector-substrate
capacitance F 0 2PF *
VJS substrate junction
built-in potential V 0.75
MJS substrate junction
exponential factor - 0 0.5
XTB forward and reverse beta
temperature exponent - 0
EG energy gap for temperature
effect on IS eV 1.11
XTI temp. exponent for effect on IS - 3
KF flicker-noise coefficient - 0
AF flicker-noise exponent - 1
FC coefficient for forward-bias
depletion capacitance formula - 0.5
7.8. JFET Models (both N and P Channel)
The JFET model is derived from the FET model of Shichman and
Hodges. The dc characteristics are defined by the parameters VTO
and BETA, which determine the variation of drain current with
gate voltage, LAMBDA, which determines the output conductance,
and IS, the saturation current of the two gate junctions. Two
ohmic resistances, RD and RS, are included. Charge storage is