lpc11xx.cfg

#
# NXP lpc11xx family
#

source [find target/swj-dp.tcl]

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME lpc11uxx
}

if { [info exists ENDIAN] } {
	set _ENDIAN $ENDIAN
} else {
	set _ENDIAN little
}

# Work-area is a space in RAM used for flash programming
# By default use 6kB
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x1800
}

if { [info exists CPUTAPID] } {
	set _CPUTAPID $CPUTAPID
} else {
	set _CPUTAPID 0x00000000
}

if { [info exists CPUROMSIZE] } {
   set _CPUROMSIZE $CPUROMSIZE
} else {
  error "_CPUROMSIZE not set. Please do not include lpc11xx.cfg directly."
}
# CCLK is the core clock frequency in KHz
if { [info exists CCLK] } {
   set _CCLK $CCLK
} else {
  set _CCLK 12000
}

if { [info exists TRANSPORT] } {
   set _TRANSPORT $TRANSPORT
} else {
  # Default to the SWD transport used by ST-Link v2.
  set _TRANSPORT hla_swd
}

transport select $_TRANSPORT

if { $_TRANSPORT == "hla_swd" } {
   hla newtap $_CHIPNAME cpu -expected-id $_CPUTAPID
   set _TARGETTYPE hla_target
} else {
   error "_TRANSPORT can only be hla_swd"
}

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME $_TARGETTYPE -chain-position $_TARGETNAME

$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
# The LPC11xx devices have 4/8/16kB of flash memory, managed by ROM code
# (including a boot loader which verifies the flash exception table's checksum).
# ISR Vector 7 contains the checksum
#
# note: the lpc2000.c code knows about the lpc1700 variant
# .... calc_checksum inserts a checksum into the flash signature vector
#
#flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME lpc1700 $_CCLK calc_checksum

$_TARGETNAME configure -event reset-init {
# Do not remap 0x0000-0x0200 to anything but the flash (i.e. select
# "User Flash Mode" where interrupt vectors are _not_ remapped,
# and reside in flash instead).
#
# Table 8. System memory remap register (SYSMEMREMAP, address 0x4004 8000) bit description
# Bit Symbol Value Description
# 1:0 MAP          System memory remap
#            0x0   Boot Loader Mode. Interrupt vectors are re-mapped to Boot ROM.
#            0x1   User RAM Mode. Interrupt vectors are re-mapped to Static RAM.
#            0x2   User Flash Mode. Interrupt vectors are not re-mapped and reside in Flash.
# 31:2 -     -     Reserved.
	mww 0x40048000 0x02
	echo "event: reset-init"
}