lint fixes

10x-Engineers · Nov 25, 2024 · b03a986 · b03a986
1 parent e2d1af8
commit b03a986
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Showing 2 changed files with 18 additions and 18 deletions.
diff --git a/core/id_stage.sv b/core/id_stage.sv
@@ -111,22 +111,22 @@ module id_stage #(
 
   logic              [CVA6Cfg.NrIssuePorts-1:0]       is_illegal;
   logic              [CVA6Cfg.NrIssuePorts-1:0]       is_illegal_cmp;
-  logic [CVA6Cfg.NrIssuePorts-1:0]       is_illegal_cvxif,is_illegal_cvxif_zcmp,is_illegal_cvxif_zcmt;
+  logic [CVA6Cfg.NrIssuePorts-1:0]  is_illegal_cvxif, is_illegal_cvxif_zcmp, is_illegal_cvxif_zcmt;
   logic [CVA6Cfg.NrIssuePorts-1:0][31:0] instruction;
   logic [CVA6Cfg.NrIssuePorts-1:0][31:0] compressed_instr;
-  logic [CVA6Cfg.NrIssuePorts-1:0][31:0] instruction_cvxif,instruction_cvxif_zcmp,instruction_cvxif_zcmt;
-  logic [CVA6Cfg.NrIssuePorts-1:0]       is_compressed;
-  logic [CVA6Cfg.NrIssuePorts-1:0]       is_compressed_cmp;
-  logic [CVA6Cfg.NrIssuePorts-1:0]       is_compressed_cvxif,is_compressed_cvxif_zcmp,is_compressed_cvxif_zcmt;
+  logic [CVA6Cfg.NrIssuePorts-1:0][31:0] instruction_cvxif, instruction_cvxif_zcmp, instruction_cvxif_zcmt;
+  logic [CVA6Cfg.NrIssuePorts-1:0]  is_compressed;
+  logic [CVA6Cfg.NrIssuePorts-1:0]  is_compressed_cmp;
+  logic [CVA6Cfg.NrIssuePorts-1:0]  is_compressed_cvxif,  is_compressed_cvxif_zcmp, is_compressed_cvxif_zcmt;
 
-  logic [CVA6Cfg.NrIssuePorts-1:0]       is_macro_instr_i;
-  logic stall_instr_fetch;
+  logic [CVA6Cfg.NrIssuePorts-1:0]  is_macro_instr_i;
+  logic                             stall_instr_fetch;
   logic stall_macro_deco, stall_macro_deco_zcmp, stall_macro_deco_zcmt ;
-  logic is_last_macro_instr_o;
-  logic is_double_rd_macro_instr_o;
-  logic [CVA6Cfg.NrIssuePorts-1:0]       is_zcmt_instr_i;
-  branchpredict_sbe_t                    branch_predict;
-  logic is_zcmt;
+  logic                                           is_last_macro_instr_o;
+  logic                                           is_double_rd_macro_instr_o;
+  logic               [CVA6Cfg.NrIssuePorts-1:0]  is_zcmt_instr_i;
+  branchpredict_sbe_t                             branch_predict;
+  logic                                           is_zcmt;
   logic is_zcmt_q, is_zcmt_n, is_zcmt_o2;
 
   assign is_zcmt_n = is_zcmt_o2;

diff --git a/core/zcmt_decoder.sv b/core/zcmt_decoder.sv
@@ -75,10 +75,10 @@ module zcmt_decoder #(
             zcmt_instr_type = JALT;
             index = instr_i[9:2];
           end else begin
-              zcmt_instr_type = NOT_ZCMT;  //NOT ZCMT instruction
-              illegal_instr_o = 1'b1;
-              instr_o_reg     = instr_i;
-            end
+            zcmt_instr_type = NOT_ZCMT;  //NOT ZCMT instruction
+            illegal_instr_o = 1'b1;
+            instr_o_reg     = instr_i;
+          end
         end
         default: begin
           illegal_instr_o = 1'b1;
@@ -167,7 +167,7 @@ module zcmt_decoder #(
           state_d = JUMP;
         end else begin
           state_d = TABLE_FETCH;
-          end
+        end
       end
       JUMP: begin
         if (issue_ack_i) begin
@@ -180,7 +180,7 @@ module zcmt_decoder #(
             };  //- jal pc_offset, x0
           end else if (zcmt_instr_type == JALT) begin
             instr_o_reg = {
-             jump_add[20], jump_add[10:1], jump_add[11], jump_add[19:12], 5'h1, riscv::OpcodeJal
+              jump_add[20], jump_add[10:1], jump_add[11], jump_add[19:12], 5'h1, riscv::OpcodeJal
             };
           end