fix error2

10x-Engineers · Dec 10, 2024 · c9ca8d4 · c9ca8d4
1 parent 65b4f93
commit c9ca8d4
Showing 1 changed file with 8 additions and 8 deletions.
diff --git a/core/id_stage.sv b/core/id_stage.sv
@@ -127,7 +127,7 @@ module id_stage #(
   logic stall_macro_deco, stall_macro_deco_zcmp, stall_macro_deco_zcmt;
   logic                                          is_last_macro_instr_o;
   logic                                          is_double_rd_macro_instr_o;
-  logic               [CVA6Cfg.NrIssuePorts-1:0] is_zcmt_instr_i;
+  logic                                          is_zcmt_instr_i;
   branchpredict_sbe_t                            branch_predict;
 
   if (CVA6Cfg.RVC) begin
@@ -143,7 +143,7 @@ module id_stage #(
           .illegal_instr_o (is_illegal[i]),
           .is_compressed_o (is_compressed[i]),
           .is_macro_instr_o(is_macro_instr_i[i]),
-          .is_zcmt_instr_o (is_zcmt_instr_i[i])
+          .is_zcmt_instr_o (is_zcmt_instr_i)
       );
     end
     if (CVA6Cfg.RVZCMP || (CVA6Cfg.RVZCMT & ~CVA6Cfg.MmuPresent)) begin //MMU should be off when using ZCMT 
@@ -174,7 +174,7 @@ module id_stage #(
       ) zcmt_decoder_i (
           .instr_i        (compressed_instr[0]),
           .pc_i           (fetch_entry_i[0].address),
-          .is_zcmt_instr_i(is_zcmt_instr_i[0]),
+          .is_zcmt_instr_i(is_zcmt_instr_i),
           .clk_i          (clk_i),
           .rst_ni         (rst_ni),
           .instr_o        (instruction_cvxif_zcmt),
@@ -188,10 +188,10 @@ module id_stage #(
           .req_port_o     (dcache_req_ports_o)
       );
 
-      assign instruction_cvxif[0] = is_zcmt_instr_i[0] ? instruction_cvxif_zcmt : instruction_cvxif_zcmp;
-      assign is_illegal_cvxif[0] = is_zcmt_instr_i[0] ? is_illegal_cvxif_zcmt :  is_illegal_cvxif_zcmp;
-      assign is_compressed_cvxif[0] = is_zcmt_instr_i[0] ? is_compressed_cvxif_zcmt : is_compressed_cvxif_zcmp;
-      assign stall_macro_deco = is_zcmt_instr_i[0] ? stall_macro_deco_zcmt : stall_macro_deco_zcmp;
+      assign instruction_cvxif[0] = is_zcmt_instr_i ? instruction_cvxif_zcmt : instruction_cvxif_zcmp;
+      assign is_illegal_cvxif[0] = is_zcmt_instr_i ? is_illegal_cvxif_zcmt :  is_illegal_cvxif_zcmp;
+      assign is_compressed_cvxif[0] = is_zcmt_instr_i ? is_compressed_cvxif_zcmt : is_compressed_cvxif_zcmp;
+      assign stall_macro_deco = is_zcmt_instr_i ? stall_macro_deco_zcmt : stall_macro_deco_zcmp;
       if (CVA6Cfg.SuperscalarEn) begin
         assign instruction_cvxif[CVA6Cfg.NrIssuePorts-1] = '0;
         assign is_illegal_cvxif[CVA6Cfg.NrIssuePorts-1] = '0;
@@ -280,7 +280,7 @@ module id_stage #(
         .pc_i                      (fetch_entry_i[i].address),
         .is_compressed_i           (is_compressed_cmp[i]),
         .is_macro_instr_i          (is_macro_instr_i[i]),
-        .is_zcmt_i                 (is_zcmt_instr_i[i]),
+        .is_zcmt_i                 (is_zcmt_instr_i),
         .is_last_macro_instr_i     (is_last_macro_instr_o),
         .is_double_rd_macro_instr_i(is_double_rd_macro_instr_o),
         .is_illegal_i              (is_illegal_cmp[i]),