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Resolve gcc undef warnings #79

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merged 6 commits into from
Nov 30, 2023
Merged

Resolve gcc undef warnings #79

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7e48808
resolve gcc undef warnings
Nov 6, 2023
5b4ee48
Add remaining gcc def guards
Nov 8, 2023
bae4a39
Merge branch 'main' into dev-gcc
JonatanAntoni Nov 24, 2023
1b1f411
Merge branch 'main' into dev-gcc
JonatanAntoni Nov 27, 2023
d4d4ce7
add missing operators
Nov 29, 2023
65eeeb8
Merge branch 'main' into dev-gcc
JonatanAntoni Nov 30, 2023
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76 changes: 38 additions & 38 deletions CMSIS/Core/Include/m-profile/cmsis_gcc_m.h
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Original file line number Diff line number Diff line change
Expand Up @@ -179,7 +179,7 @@ __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
#define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section(".vectors")))
#endif

#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
#ifndef __STACK_SEAL
#define __STACK_SEAL __StackSeal
#endif
Expand Down Expand Up @@ -908,7 +908,7 @@ __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Control Register (non-secure)
\details Returns the content of the non-secure Control Register when in secure mode.
Expand Down Expand Up @@ -936,7 +936,7 @@ __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Control Register (non-secure)
\details Writes the given value to the non-secure Control Register when in secure state.
Expand Down Expand Up @@ -1006,7 +1006,7 @@ __STATIC_FORCEINLINE uint32_t __get_PSP(void)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Process Stack Pointer (non-secure)
\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
Expand All @@ -1033,7 +1033,7 @@ __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Process Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
Expand All @@ -1060,7 +1060,7 @@ __STATIC_FORCEINLINE uint32_t __get_MSP(void)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Main Stack Pointer (non-secure)
\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
Expand All @@ -1087,7 +1087,7 @@ __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Main Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
Expand All @@ -1100,7 +1100,7 @@ __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
#endif


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Stack Pointer (non-secure)
\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
Expand Down Expand Up @@ -1141,7 +1141,7 @@ __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Priority Mask (non-secure)
\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
Expand All @@ -1168,7 +1168,7 @@ __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Priority Mask (non-secure)
\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
Expand Down Expand Up @@ -1218,7 +1218,7 @@ __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Base Priority (non-secure)
\details Returns the current value of the non-secure Base Priority register when in secure state.
Expand All @@ -1245,7 +1245,7 @@ __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Base Priority (non-secure)
\details Assigns the given value to the non-secure Base Priority register when in secure state.
Expand Down Expand Up @@ -1284,7 +1284,7 @@ __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Fault Mask (non-secure)
\details Returns the current value of the non-secure Fault Mask register when in secure state.
Expand All @@ -1311,7 +1311,7 @@ __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Fault Mask (non-secure)
\details Assigns the given value to the non-secure Fault Mask register when in secure state.
Expand All @@ -1338,9 +1338,9 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
*/
__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
{
#if (((__ARM_ARCH_8M_MAIN__ < 1) && \
(__ARM_ARCH_8_1M_MAIN__ < 1) ) && \
(__ARM_FEATURE_CMSE < 3) )
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
/* without main extensions, the non-secure PSPLIM is RAZ/WI */
return (0U);
#else
Expand All @@ -1350,7 +1350,7 @@ __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
#endif
}

#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Process Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Expand All @@ -1361,8 +1361,8 @@ __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
{
#if ((__ARM_ARCH_8M_MAIN__ < 1) && \
(__ARM_ARCH_8_1M_MAIN__ < 1) )
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
/* without main extensions, the non-secure PSPLIM is RAZ/WI */
return (0U);
#else
Expand All @@ -1385,9 +1385,9 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
*/
__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
{
#if (((__ARM_ARCH_8M_MAIN__ < 1) && \
(__ARM_ARCH_8_1M_MAIN__ < 1) ) && \
(__ARM_FEATURE_CMSE < 3) )
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
/* without main extensions, the non-secure PSPLIM is RAZ/WI */
(void)ProcStackPtrLimit;
#else
Expand All @@ -1396,7 +1396,7 @@ __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Process Stack Pointer (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Expand All @@ -1407,8 +1407,8 @@ __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
*/
__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
{
#if ((__ARM_ARCH_8M_MAIN__ < 1) && \
(__ARM_ARCH_8_1M_MAIN__ < 1) )
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
/* without main extensions, the non-secure PSPLIM is RAZ/WI */
(void)ProcStackPtrLimit;
#else
Expand All @@ -1428,9 +1428,9 @@ __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
*/
__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
{
#if (((__ARM_ARCH_8M_MAIN__ < 1) && \
(__ARM_ARCH_8_1M_MAIN__ < 1) ) && \
(__ARM_FEATURE_CMSE < 3) )
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
/* without main extensions, the non-secure MSPLIM is RAZ/WI */
return (0U);
#else
Expand All @@ -1441,7 +1441,7 @@ __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Expand All @@ -1452,8 +1452,8 @@ __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
{
#if ((__ARM_ARCH_8M_MAIN__ < 1) && \
(__ARM_ARCH_8_1M_MAIN__ < 1) )
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
/* without main extensions, the non-secure MSPLIM is RAZ/WI */
return (0U);
#else
Expand All @@ -1475,9 +1475,9 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
*/
__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
{
#if (((__ARM_ARCH_8M_MAIN__ < 1) && \
(__ARM_ARCH_8_1M_MAIN__ < 1) ) && \
(__ARM_FEATURE_CMSE < 3) )
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
/* without main extensions, the non-secure MSPLIM is RAZ/WI */
(void)MainStackPtrLimit;
#else
Expand All @@ -1486,7 +1486,7 @@ __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
}


#if (__ARM_FEATURE_CMSE == 3)
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Expand All @@ -1497,8 +1497,8 @@ __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
*/
__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
{
#if ((__ARM_ARCH_8M_MAIN__ < 1) && \
(__ARM_ARCH_8_1M_MAIN__ < 1) )
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
/* without main extensions, the non-secure MSPLIM is RAZ/WI */
(void)MainStackPtrLimit;
#else
Expand Down
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