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Network packet parser generator

Python 51 13 Updated Sep 11, 2020

Unit testing for cocotb

Python 153 72 Updated Jan 4, 2025

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

Python 1,864 531 Updated Jan 23, 2025

Icarus Verilog

C++ 3 2 Updated Nov 20, 2018

Data Plane Development Kit

C 3 2 Updated Aug 12, 2020

Verilog AXI stream components for FPGA implementation

Python 767 234 Updated Aug 7, 2024

Verilog AXI components for FPGA implementation

Verilog 1,590 467 Updated Dec 7, 2023

使用 VSCode 舒适地开发 Verilog

29 3 Updated Aug 11, 2020

SDN手册

Shell 1,200 263 Updated Jul 23, 2021

Open source FPGA-based NIC and platform for in-network compute

Verilog 1,785 427 Updated Jul 5, 2024
VHDL 24 13 Updated Dec 10, 2023
Verilog 16 9 Updated Mar 10, 2021
Verilog 53 18 Updated Jun 27, 2022

针对 LiteLoaderQQNT 的安装脚本

Python 1,520 56 Updated Jan 10, 2025

Nonebot2 群管插件,不仅仅是踢禁改

Python 143 17 Updated Jan 2, 2025

现代化的基于 NTQQ 的 Bot 协议端实现

TypeScript 3,117 225 Updated Jan 22, 2025
62 35 Updated Nov 22, 2019

🍭 Cnblogs theme _ Basic theme : SimpleMemory

CSS 3,662 1,520 Updated Dec 9, 2024

Beautify-cnblogs博客园样式美化

HTML 69 36 Updated Dec 15, 2024

PCI express simulation framework for Cocotb

Python 145 49 Updated Nov 28, 2023

The RIFFA development repository

Verilog 795 317 Updated Jun 11, 2024

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

C 3,989 674 Updated Jan 14, 2025

Verilog Ethernet components for FPGA implementation

Verilog 2,399 718 Updated Jul 18, 2024

Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核

Batchfile 514 100 Updated Sep 14, 2023

A SATA host (HBA) core based on Xilinx FPGA with GTH to read/write hard disk. 一个基于Xilinx FPGA中的GTH的SATA host控制器,用来读写硬盘。

SystemVerilog 91 29 Updated Sep 14, 2023

An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…

Verilog 666 112 Updated Dec 6, 2024
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