The under developed plNIC will provide encryption, DMA, buffering techniques, CRC error checking and RTOS(FreeRTOS).
This PLM has fairly simple application and interface circuit, Though it is not provided with enough and clear documentations. Here is the pinout:
As it's shown; there is 9 pins in total and that pins 1 and 2 are connected to AC powerline(No matter you connect phase wire or neutral wire to pin 1 or 2), pins 3, 4 and 5 provides power and pin 6 and 7 are used for data communication.
The designed schematic of plNIC is shown bellow:
Note Due to Hi-Z state of pins, if using pin headers and detachable connections in my implementation of this schema, I recommend using a pull-up resistor on the base pin of transistors. So to pull the base pin to a logical one by default.
BOM for every plNIC is as follows:
| Reference | Value | Footprint | Qty |
|---|---|---|---|
| C1, C2 | 10pF | 2 | |
| C4 | 10uF | 1 | |
| C3, C5, C7 | 0.1uF | 3 | |
| C9 | 10nF | 1 | |
| C10 | 4.7uF | 1 | |
| C8, C13 | 100nF | 2 | |
| C6, C15 | 1uF | 2 | |
| D1 | YELLOW | 1 | |
| D2 | GREEN | 1 | |
| D3 | RED | 1 | |
| D4 | 1N4001 | Diode_THT:D_DO-41_SOD81_P10.16mm_Horizontal | 1 |
| J1 | Screw_Terminal_01x02 | 1 | |
| J3 | UART_DEBUG | 1 | |
| J4 | SW_DEBUG | 1 | |
| J5 | plNIC Interface | 1 | |
| JP1 | Jumper | 1 | |
| Q1, Q2 | BC327 | Package_TO_SOT_THT:TO-92_Inline | 2 |
| R1, R2 | 10k | 2 | |
| R3 | 1k | 1 | |
| R4 | 2k | 1 | |
| R5, R6 | 150 | 2 | |
| R7 | 330 | 1 | |
| R8, R9 | 3K2 | 2 | |
| SW1 | SW_Push | 1 | |
| TH1 | 800mA PTC | 1 | |
| U1 | STM32F030C8Tx | Package_QFP:LQFP-48_7x7mm_P0.5mm | 1 |
| U2 | LF33_TO220 | Package_TO_SOT_THT:TO-220-3_Vertical | 1 |
| U3 | LM7805_TO220 | Package_TO_SOT_THT:TO-220-3_Vertical | 1 |
| U4 | KQ130-F | 1 | |
| Y1 | 32.768Hz | 1 |
Implementation Specific parts:
| Reference | Value | Footprint | Qty |
|---|---|---|---|
| Hole Board | 9cm * 7cm double sided | 1 | |
| SMD to DIP | QFN48 to DIP package converter | 1 |
The discussed plNIC soldered on double sided hole board as bellow:
Warning Although the datasheet states that leaving MODE pin in Hi-Z is fine, I suggest you not to do this. Using Custom mode and pulling the pin to the ground is a much better approach. After mentioned adjustment two awkward problems encountered were solved. Which were noisy transmissions and power supply problem.
Warning The ambiguous insufficient documentation of this Chinese modem, which I provided in Docs/Texts, states that the maximum current crossing the modem is about 300mA. Though my tests reveal effectively more current passing it. This misinformation made me use a heat sink after board soldering, which was a trouble, as it gets necessary. So be careful about it.
Note This website has useful information to calculate Total Thermal Resistance(θJA(TOTAL)) and need of heat sink: https://www.petervis.com/electronics/Voltage_Regulator_Heatsink/Heatsink_for_TO-220_Voltage_Regulator.html
Based on the above explanation, version 1.4 of plNIC board designed and looks like this:
Note There is also another neat approach to this problem. The problem should get solved by using multiple (2 should be enough) LM7805 regulators in parallel to supply current to this current beast. (However I've not tested, It is a more promising solution because you should not need heat sinks and can lower the input voltage, as well)