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denisty reduced
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Asma-Mohsin committed Dec 7, 2024
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2 changes: 1 addition & 1 deletion openlane/user_project_wrapper/config.json
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
"FP_TAP_HORIZONTAL_HALO": 50, "//": "no cell placed between IPs",
"RUN_KLAYOUT_XOR": 0, "//": "please remove it later",
"QUIT_ON_SYNTH_CHECKS": 0,
"PL_TARGET_DENSITY": 0.8,
"PL_TARGET_DENSITY": 0.55,
"ROUTING_CORES": 10,
"CLOCK_PERIOD": 40,
"CLOCK_PORT": "wb_clk_i",
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138 changes: 138 additions & 0 deletions openlane/user_project_wrapper/macro_placement_original.cfg
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eFPGA_top_i.eFPGA_inst.Tile_X0Y2_W_IO 220 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y3_W_IO 220 2245 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y4_W_IO 220 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y5_W_IO 220 1785 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y6_W_IO 220 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y7_W_IO 220 1325 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y8_W_IO 220 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y9_W_IO 220 865 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y10_W_IO 220 635 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y11_W_IO 220 405 N
eFPGA_top_i.eFPGA_inst.Tile_X0Y12_W_IO 220 175 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y0_N_term_single 305 3024 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y1_LUT4AB 305 2705 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y2_LUT4AB 305 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y3_LUT4AB 305 2245 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y4_LUT4AB 305 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y5_LUT4AB 305 1785 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y6_LUT4AB 305 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y7_LUT4AB 305 1325 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y8_LUT4AB 305 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y9_LUT4AB 305 865 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y10_LUT4AB 305 635 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y11_LUT4AB 305 405 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y12_LUT4AB 305 175 N
eFPGA_top_i.eFPGA_inst.Tile_X1Y13_S_term_single 305 100 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y0_N_term_single 540 3024 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y1_LUT4AB 540 2705 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y2_LUT4AB 540 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y3_LUT4AB 540 2245 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y4_LUT4AB 540 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y5_LUT4AB 540 1785 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y6_LUT4AB 540 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y7_LUT4AB 540 1325 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y8_LUT4AB 540 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y9_LUT4AB 540 865 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y10_LUT4AB 540 635 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y11_LUT4AB 540 405 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y12_LUT4AB 540 175 N
eFPGA_top_i.eFPGA_inst.Tile_X2Y13_S_term_single 540 100 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y0_N_term_single2 770 3024 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y1_RegFile 770 2705 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y2_RegFile 770 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y3_RegFile 770 2245 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y4_RegFile 770 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y5_RegFile 770 1785 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y6_RegFile 770 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y7_RegFile 770 1325 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y8_RegFile 770 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y9_RegFile 770 865 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y10_RegFile 770 635 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y11_RegFile 770 405 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y12_RegFile 770 175 N
eFPGA_top_i.eFPGA_inst.Tile_X3Y13_S_term_single2 770 100 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y0_N_term_single 1010 3024 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y1_LUT4AB 1010 2705 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y2_LUT4AB 1010 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y3_LUT4AB 1010 2245 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y4_LUT4AB 1010 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y5_LUT4AB 1010 1785 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y6_LUT4AB 1010 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y7_LUT4AB 1010 1325 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y8_LUT4AB 1010 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y9_LUT4AB 1010 865 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y10_LUT4AB 1010 635 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y11_LUT4AB 1010 405 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y12_LUT4AB 1010 175 N
eFPGA_top_i.eFPGA_inst.Tile_X4Y13_S_term_single 1010 100 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y0_N_term_single 1240 3024 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y1_LUT4AB 1240 2705 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y2_LUT4AB 1240 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y3_LUT4AB 1240 2245 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y4_LUT4AB 1240 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y5_LUT4AB 1240 1785 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y6_LUT4AB 1240 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y7_LUT4AB 1240 1325 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y8_LUT4AB 1240 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y9_LUT4AB 1240 865 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y10_LUT4AB 1240 635 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y11_LUT4AB 1240 405 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y12_LUT4AB 1240 175 N
eFPGA_top_i.eFPGA_inst.Tile_X5Y13_S_term_single 1240 100 N
eFPGA_top_i.eFPGA_inst.Tile_X6Y0_N_term_DSP 1480 3024 N
eFPGA_top_i.eFPGA_inst.Tile_X6Y1_DSP 1480 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X6Y3_DSP 1480 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X6Y5_DSP 1480 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X6Y7_DSP 1480 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X6Y9_DSP 1480 635 N
eFPGA_top_i.eFPGA_inst.Tile_X6Y11_DSP 1480 175 N
eFPGA_top_i.eFPGA_inst.Tile_X6Y13_S_term_DSP 1480 100 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y0_N_term_single 1715 3024 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y1_LUT4AB 1715 2705 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y2_LUT4AB 1715 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y3_LUT4AB 1715 2245 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y4_LUT4AB 1715 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y5_LUT4AB 1715 1785 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y6_LUT4AB 1715 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y7_LUT4AB 1715 1325 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y8_LUT4AB 1715 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y9_LUT4AB 1715 865 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y10_LUT4AB 1715 635 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y11_LUT4AB 1715 405 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y12_LUT4AB 1715 175 N
eFPGA_top_i.eFPGA_inst.Tile_X7Y13_S_term_single 1715 100 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y0_N_term_single 1945 3024 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y1_LUT4AB 1945 2705 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y2_LUT4AB 1945 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y3_LUT4AB 1945 2245 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y4_LUT4AB 1945 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y5_LUT4AB 1945 1785 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y6_LUT4AB 1945 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y7_LUT4AB 1945 1325 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y8_LUT4AB 1945 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y9_LUT4AB 1945 865 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y10_LUT4AB 1945 635 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y11_LUT4AB 1945 405 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y12_LUT4AB 1945 175 N
eFPGA_top_i.eFPGA_inst.Tile_X8Y13_S_term_single 1945 100 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y0_N_term_RAM_IO 2175 3024 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y1_RAM_IO 2175 2705 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y2_RAM_IO 2175 2475 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y3_RAM_IO 2175 2245 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y4_RAM_IO 2175 2015 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y5_RAM_IO 2175 1785 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y6_RAM_IO 2175 1555 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y7_RAM_IO 2175 1325 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y8_RAM_IO 2175 1095 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y9_RAM_IO 2175 865 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y10_RAM_IO 2175 635 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y11_RAM_IO 2175 405 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y12_RAM_IO 2175 175 N
eFPGA_top_i.eFPGA_inst.Tile_X9Y13_S_term_RAM_IO 2175 100 N
eFPGA_top_i.Inst_BlockRAM_5.memory_cell 2345 2502 N
eFPGA_top_i.Inst_BlockRAM_4.memory_cell 2345 2042 N
eFPGA_top_i.Inst_BlockRAM_3.memory_cell 2345 1582 N
eFPGA_top_i.Inst_BlockRAM_2.memory_cell 2345 1122 N
eFPGA_top_i.Inst_BlockRAM_1.memory_cell 2345 662 N
eFPGA_top_i.Inst_BlockRAM_0.memory_cell 2345 202 N

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