fixup! OpenSSL: Regen aarch64 assembly for Morello

CTSRD-CHERI · Jul 3, 2024 · 04ec972 · 04ec972
1 parent 3a026cd
commit 04ec972
Showing 1 changed file with 4 additions and 4 deletions.
diff --git a/sys/crypto/openssl/aarch64/armv8-mont.S b/sys/crypto/openssl/aarch64/armv8-mont.S
@@ -911,7 +911,7 @@ bn_mul8x_mont_neon:
 #ifdef __CHERI_PURE_CAPABILITY__
 	add	PTR(3),PTR(3),x12,lsl#2	// rewind PTR(3)
 	sub	PTR(1),PTRN(sp),#0
-	cmp	x0,x0				// clear carry flag
+	cmn	x0,xzr				// clear carry flag
 #else
 	sub	PTR(3),PTR(3),x5,lsl#2		// rewind PTR(3)
 	subs	PTR(1),PTRN(sp),#0		// clear carry flag
@@ -1818,7 +1818,7 @@ __bn_mul4x_mont:
 	ldp	x16,x17,[PTR(3),#8*2]
 #ifdef __CHERI_PURE_CAPABILITY__
 	add	PTR(3),PTR(3),#8*4
-	cmp	x0,x0			// clear carry bit
+	cmn	x0,xzr			// clear carry bit
 #else
 	adds	PTR(3),PTR(3),#8*4		// clear carry bit
 #endif
@@ -1969,7 +1969,7 @@ __bn_mul4x_mont:
 	ldp	x16,x17,[PTR(3),#8*2]
 #ifdef __CHERI_PURE_CAPABILITY__
 	add	PTR(3),PTR(3),#8*4
-	cmp	x0,x0			// clear carry bit
+	cmn	x0,xzr			// clear carry bit
 #else
 	adds	PTR(3),PTR(3),#8*4		// clear carry bit
 #endif
@@ -2140,7 +2140,7 @@ __bn_mul4x_mont:
 	ldp	x8,x9,[PTR(1),#8*2]
 #ifdef __CHERI_PURE_CAPABILITY__
 	add	PTR(1),PTR(1),#8*4
-	cmp	x0,x0			// clear carry flag
+	cmn	x0,xzr			// clear carry bit
 #else
 	adds	PTR(1),PTR(1),#8*4		// clear carry bit
 #endif