Add exception handling and exception messages

Emin017 · May 11, 2024 · a91d5a3 · a91d5a3
1 parent 2b881a3
commit a91d5a3
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Showing 5 changed files with 23 additions and 23 deletions.
diff --git a/src/cpu/decode.zig b/src/cpu/decode.zig
@@ -18,17 +18,9 @@ const print = @import("../common.zig").print;
 const cpu = @import("./cpu.zig");
 const utils = @import("../util.zig");
 
-const DECODE_TYPE = enum {
-    TYPE_I,
-    TYPE_U,
-    TYPE_S,
-    TYPE_J,
-    TYPE_R,
-    TYPE_B,
-    TYPE_C,
-    TYPE_N,
+pub const decodeError = error{
+    InvalidInstruction,
 };
-
 pub const Decode = struct {
     pc: vaddr_t,
     snpc: vaddr_t, // static next pc
@@ -92,7 +84,7 @@ pub const Instruction = union(enum) {
         return switch (opcode) {
             0b0010011 => DecodePattern(.addi, TypeI.decode(inst)),
             0b1110011 => DecodePattern(.ebreak, TypeEnv.decode(inst)),
-            else => unreachable,
+            else => decodeError.InvalidInstruction,
         };
     }
 };
diff --git a/src/cpu/exu.zig b/src/cpu/exu.zig
@@ -20,12 +20,11 @@ const isa = @import("../arch/rv64.zig");
 
 var halt = false;
 
-pub fn exu_cycle() void {
+pub fn exu_cycle() anyerror!void {
     const inst: u32 = ifu.inst_fetch(c.cpu.pc, &M.memory);
-    var failed: anyerror = undefined;
     const inst_test: ?decode.Instruction = decode.Instruction.decode32(inst) catch |err| {
-        failed = err;
-        return;
+        std.debug.print("Unknown instruction: {x}\n", .{inst});
+        return err;
     };
     const exu = isa.inst2exu(inst_test.?);
     const ret = exu(inst_test.?);

diff --git a/src/cpu/ifu.zig b/src/cpu/ifu.zig
@@ -12,8 +12,13 @@ const std = @import("std");
 const vaddr = @import("../arch/rv64.zig").vaddr;
 pub const Mem = @import("../mem.zig").MEM;
 
-pub fn inst_fetch(pc: u64, M: *const [1024]u8) u32 {
-    const inst_ptr = M[pc .. pc + 4];
+pub fn paddr(addr: u64) u64 {
+    return addr - Mem.base;
+}
+
+pub fn inst_fetch(pc: u64, M: *const [Mem.size]u8) u32 {
+    const addr = paddr(pc);
+    const inst_ptr = M[addr .. addr + 4];
     var inst: u32 = 0;
     for (inst_ptr, 0..) |ptr, i| {
         inst += @as(u32, ptr) << @intCast(i * 8);

diff --git a/src/main.zig b/src/main.zig
@@ -16,13 +16,15 @@ const initMemory = @import("mem.zig").initMem;
 pub const reg_display = @import("cpu/reg.zig").reg_display;
 pub const inst_cycle = @import("cpu/exu.zig").exu_cycle;
 
-comptime {}
-
-pub fn main() void {
-    c.cpu.pc = 0;
+pub fn main() anyerror!void {
+    c.cpu.pc = 0x80000000;
     initMemory();
     while (!halt()) {
-        inst_cycle();
+        inst_cycle() catch |err| {
+            std.debug.print("Error in instruction cycle !\n", .{});
+            std.debug.print("Error TYPE ID: {}\n", .{err});
+            break;
+        };
         c.cpu.pc += 4;
     }
     reg_display();

diff --git a/src/mem.zig b/src/mem.zig
@@ -11,8 +11,10 @@
 const std = @import("std");
 
 pub const MEM = struct {
+    pub const base = 0x80000000;
+    pub const size = 0x8000000;
     pub const img: [28]u8 = [_]u8{ 0x13, 0x05, 0x00, 0x00, 0x93, 0x05, 0x10, 0x04, 0x73, 0x00, 0x10, 0x00, 0x13, 0x05, 0x10, 0x00, 0x93, 0x05, 0x00, 0x00, 0x73, 0x00, 0x10, 0x00, 0x6f, 0x00, 0x00, 0x00 };
-    pub var memory = std.mem.zeroes([1024]u8);
+    pub var memory = std.mem.zeroes([size]u8);
     pub fn read(addr: u64) u32 {
         return @as(u32, memory[addr][0..4]);
     }