instcountci: Remove split restore/save from mm7

FEX-Emu · Oct 8, 2024 · c44e378 · c44e378
1 parent 3333d3a
commit c44e378
Show file tree

Hide file tree

Showing 4 changed files with 34 additions and 46 deletions.
diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json
@@ -11424,7 +11424,7 @@
       ]
     },
     "frstor [rax]": {
-      "ExpectedInstructionCount": 99,
+      "ExpectedInstructionCount": 98,
       "Comment": [
         "0xdd !11b /4"
       ],
@@ -11516,22 +11516,21 @@
         "add w21, w21, #0x1 (1)",
         "and w21, w21, #0x7",
         "ldur q3, [x4, #88]",
-        "and v2.16b, v3.16b, v2.16b",
+        "and v3.16b, v3.16b, v2.16b",
         "add x0, x28, x21, lsl #4",
-        "str q2, [x0, #1040]",
+        "str q3, [x0, #1040]",
         "add w21, w21, #0x1 (1)",
         "and w21, w21, #0x7",
-        "ldur d2, [x4, #98]",
-        "ldr h3, [x4, #106]",
-        "mov v2.h[4], v3.h[0]",
+        "ldur q3, [x4, #98]",
+        "and v2.16b, v3.16b, v2.16b",
         "add x0, x28, x21, lsl #4",
         "str q2, [x0, #1040]",
         "msr nzcv, x23",
         "strb w20, [x28, #1298]"
       ]
     },
     "fnsave [rax]": {
-      "ExpectedInstructionCount": 111,
+      "ExpectedInstructionCount": 109,
       "Comment": [
         "0xdd !11b /6"
       ],
@@ -11635,9 +11634,7 @@
         "and w20, w20, #0x7",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
-        "stur d2, [x4, #98]",
-        "dup v2.8h, v2.h[4]",
-        "str h2, [x4, #106]",
+        "stur q2, [x4, #98]",
         "mov w20, #0x37f",
         "strh w20, [x28, #1296]",
         "strb wzr, [x28, #1019]",

diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json
@@ -6227,7 +6227,7 @@
       ]
     },
     "frstor [rax]": {
-      "ExpectedInstructionCount": 317,
+      "ExpectedInstructionCount": 316,
       "Comment": [
         "0xdd !11b /4"
       ],
@@ -6485,7 +6485,7 @@
         "add w21, w21, #0x1 (1)",
         "and w21, w21, #0x7",
         "ldur q3, [x4, #88]",
-        "and v2.16b, v3.16b, v2.16b",
+        "and v3.16b, v3.16b, v2.16b",
         "mrs x0, nzcv",
         "str w0, [x28, #1000]",
         "stp x4, x7, [x28, #280]",
@@ -6498,8 +6498,8 @@
         "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64",
         "str x30, [x0], #16",
         "ldrh w0, [x28, #1296]",
-        "mov x1, v2.d[0]",
-        "umov w2, v2.h[4]",
+        "mov x1, v3.d[0]",
+        "umov w2, v3.h[4]",
         "ldr x3, [x28, #1448]",
         "blr x3",
         "ldr w4, [x28, #1000]",
@@ -6511,14 +6511,13 @@
         "ld1 {v2.2d, v3.2d}, [sp], #32",
         "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
         "ldr x30, [sp], #16",
-        "mov v2.8b, v0.8b",
+        "mov v3.8b, v0.8b",
         "add x0, x28, x21, lsl #4",
-        "str d2, [x0, #1040]",
+        "str d3, [x0, #1040]",
         "add w21, w21, #0x1 (1)",
         "and w21, w21, #0x7",
-        "ldur d2, [x4, #98]",
-        "ldr h3, [x4, #106]",
-        "mov v2.h[4], v3.h[0]",
+        "ldur q3, [x4, #98]",
+        "and v2.16b, v3.16b, v2.16b",
         "mrs x0, nzcv",
         "str w0, [x28, #1000]",
         "stp x4, x7, [x28, #280]",
@@ -6552,7 +6551,7 @@
       ]
     },
     "fnsave [rax]": {
-      "ExpectedInstructionCount": 334,
+      "ExpectedInstructionCount": 332,
       "Comment": [
         "0xdd !11b /6"
       ],
@@ -6872,9 +6871,7 @@
         "eor v2.16b, v2.16b, v2.16b",
         "mov v2.d[0], x0",
         "mov v2.h[4], w1",
-        "stur d2, [x4, #98]",
-        "dup v2.8h, v2.h[4]",
-        "str h2, [x4, #106]",
+        "stur q2, [x4, #98]",
         "rbit w1, w21",
         "lsr w1, w1, #30",
         "mrs x0, fpcr",

diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json
@@ -11439,7 +11439,7 @@
       ]
     },
     "frstor [rax]": {
-      "ExpectedInstructionCount": 99,
+      "ExpectedInstructionCount": 98,
       "Comment": [
         "0xdd !11b /4"
       ],
@@ -11531,22 +11531,21 @@
         "add w21, w21, #0x1 (1)",
         "and w21, w21, #0x7",
         "ldur q3, [x4, #88]",
-        "and v2.16b, v3.16b, v2.16b",
+        "and v3.16b, v3.16b, v2.16b",
         "add x0, x28, x21, lsl #4",
-        "str q2, [x0, #1040]",
+        "str q3, [x0, #1040]",
         "add w21, w21, #0x1 (1)",
         "and w21, w21, #0x7",
-        "ldur d2, [x4, #98]",
-        "ldr h3, [x4, #106]",
-        "mov v2.h[4], v3.h[0]",
+        "ldur q3, [x4, #98]",
+        "and v2.16b, v3.16b, v2.16b",
         "add x0, x28, x21, lsl #4",
         "str q2, [x0, #1040]",
         "msr nzcv, x23",
         "strb w20, [x28, #1298]"
       ]
     },
     "fnsave [rax]": {
-      "ExpectedInstructionCount": 111,
+      "ExpectedInstructionCount": 109,
       "Comment": [
         "0xdd !11b /6"
       ],
@@ -11650,9 +11649,7 @@
         "and w20, w20, #0x7",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
-        "stur d2, [x4, #98]",
-        "dup v2.8h, v2.h[4]",
-        "str h2, [x4, #106]",
+        "stur q2, [x4, #98]",
         "mov w20, #0x37f",
         "strh w20, [x28, #1296]",
         "strb wzr, [x28, #1019]",

diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json
@@ -6266,7 +6266,7 @@
       ]
     },
     "frstor [rax]": {
-      "ExpectedInstructionCount": 317,
+      "ExpectedInstructionCount": 316,
       "Comment": [
         "0xdd !11b /4"
       ],
@@ -6524,7 +6524,7 @@
         "add w21, w21, #0x1 (1)",
         "and w21, w21, #0x7",
         "ldur q3, [x4, #88]",
-        "and v2.16b, v3.16b, v2.16b",
+        "and v3.16b, v3.16b, v2.16b",
         "mrs x0, nzcv",
         "str w0, [x28, #1000]",
         "stp x4, x7, [x28, #280]",
@@ -6537,8 +6537,8 @@
         "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64",
         "str x30, [x0], #16",
         "ldrh w0, [x28, #1296]",
-        "mov x1, v2.d[0]",
-        "umov w2, v2.h[4]",
+        "mov x1, v3.d[0]",
+        "umov w2, v3.h[4]",
         "ldr x3, [x28, #1448]",
         "blr x3",
         "ldr w4, [x28, #1000]",
@@ -6550,14 +6550,13 @@
         "ld1 {v2.2d, v3.2d}, [sp], #32",
         "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64",
         "ldr x30, [sp], #16",
-        "mov v2.8b, v0.8b",
+        "mov v3.8b, v0.8b",
         "add x0, x28, x21, lsl #4",
-        "str d2, [x0, #1040]",
+        "str d3, [x0, #1040]",
         "add w21, w21, #0x1 (1)",
         "and w21, w21, #0x7",
-        "ldur d2, [x4, #98]",
-        "ldr h3, [x4, #106]",
-        "mov v2.h[4], v3.h[0]",
+        "ldur q3, [x4, #98]",
+        "and v2.16b, v3.16b, v2.16b",
         "mrs x0, nzcv",
         "str w0, [x28, #1000]",
         "stp x4, x7, [x28, #280]",
@@ -6591,7 +6590,7 @@
       ]
     },
     "fnsave [rax]": {
-      "ExpectedInstructionCount": 334,
+      "ExpectedInstructionCount": 332,
       "Comment": [
         "0xdd !11b /6"
       ],
@@ -6911,9 +6910,7 @@
         "eor v2.16b, v2.16b, v2.16b",
         "mov v2.d[0], x0",
         "mov v2.h[4], w1",
-        "stur d2, [x4, #98]",
-        "dup v2.8h, v2.h[4]",
-        "str h2, [x4, #106]",
+        "stur q2, [x4, #98]",
         "rbit w1, w21",
         "lsr w1, w1, #30",
         "mrs x0, fpcr",