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@Georges760
Georges760 committed Apr 27, 2023
1 parent 49486c5 commit 82adfe1
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Showing 4 changed files with 117 additions and 49 deletions.
68 changes: 46 additions & 22 deletions bm13xx.go
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,18 @@ import (
"time"
)

type Nonce uint32

// Every nonce returned by chip (except those sent by opencore) encodes address of the
// chip and core that computed it, because of the way they divide the search space.
func (n Nonce) Chip() byte {
return byte((n >> 2) & 0x3f)
}

func (n Nonce) Core() byte {
return byte((n >> 24) & 0x7f)
}

type Asic struct {
Regs map[RegAddr]uint32
CoreRegs map[CoreRegID]uint16
Expand Down Expand Up @@ -70,12 +82,12 @@ func (c *Chain) chipIndex(chipAddr byte) (int, error) {
return 0, fmt.Errorf("not found")
}

func (c *Chain) Init(increment byte) error {
func (c *Chain) Init(increment byte) (int, error) {
if increment == 0 {
return fmt.Errorf("increment must be greater than 0")
return 0, fmt.Errorf("increment must be greater than 0")
}
if len(c.Asics) > 0 {
return fmt.Errorf("already enumerated")
return 0, fmt.Errorf("already enumerated")
}
// Enumerate the chips
c.ReadRegister(true, 0, ChipAddress)
Expand All @@ -85,13 +97,13 @@ func (c *Chain) Init(increment byte) error {
if err == io.EOF {
break
}
return err
return 0, err
}
if regAddr != byte(ChipAddress) {
return fmt.Errorf("bad regAddr")
return 0, fmt.Errorf("bad regAddr")
}
if chipAddr != 0x00 {
return fmt.Errorf("bad chipAddr")
return 0, fmt.Errorf("bad chipAddr")
}
a := Asic{}
a.Regs = make(map[RegAddr]uint32)
Expand All @@ -102,39 +114,51 @@ func (c *Chain) Init(increment byte) error {
// ChainInactive 3 times
for i := 0; i < 3; i++ {
c.Inactive()
time.Sleep(30 * time.Millisecond)
}
// Gives new ChipAddresses
if len(c.Asics)-1*int(increment) > 255 {
return fmt.Errorf("too many chips or too big increment")
return 0, fmt.Errorf("too many chips or too big increment")
}
newChipAddr := byte(0)
for i := range c.Asics {
err := c.SetChipAddr(newChipAddr)
if err != nil {
return err
return 0, err
}
c.Asics[i].Regs[ChipAddress] += uint32(newChipAddr)
newChipAddr += increment
time.Sleep(30 * time.Millisecond)
}
time.Sleep(120 * time.Millisecond)
// Init Ordered Clock
// Init gekko style
c.WriteRegister(true, 0, ClockOrderControl0, 0)
time.Sleep(10 * time.Millisecond)
c.WriteRegister(true, 0, ClockOrderControl1, 0)
time.Sleep(100 * time.Millisecond)
c.WriteRegister(true, 0, OrderedClockEnable, 0)
time.Sleep(100 * time.Millisecond)
c.WriteRegister(true, 0, OrderedClockEnable, 0xFF)
c.WriteRegister(true, 0, OrderedClockEnable, 1)
time.Sleep(50 * time.Millisecond)
c.WriteRegister(true, 0, CoreRegisterControl, 0x80008074)
time.Sleep(10 * time.Millisecond)
c.WriteRegister(true, 0, CoreRegisterControl, 0x800080B4)
time.Sleep(5 * time.Millisecond)
c.WriteRegister(true, 0, TicketMask, 0xFC)
time.Sleep(10 * time.Millisecond)
// c.WriteRegister(true, 0, MiscControl, 0x1A01)
c.WriteRegister(true, 0, MiscControl, 0x2001)
c.WriteRegister(true, 0, TicketMask, 0xF0)
time.Sleep(100 * time.Millisecond)
return nil
c.WriteRegister(true, 0, MiscControl, 0x6131)
return 1500000, nil

// Init T17 style
// time.Sleep(120 * time.Millisecond)
// c.WriteRegister(true, 0, ClockOrderControl0, 0)
// c.WriteRegister(true, 0, ClockOrderControl1, 0)
// time.Sleep(100 * time.Millisecond)
// c.WriteRegister(true, 0, OrderedClockEnable, 0)
// time.Sleep(100 * time.Millisecond)
// c.WriteRegister(true, 0, OrderedClockEnable, 0xFF)
// time.Sleep(10 * time.Millisecond)
// c.WriteRegister(true, 0, CoreRegisterControl, 0x800080B4)
// time.Sleep(5 * time.Millisecond)
// c.WriteRegister(true, 0, TicketMask, 0xFC)
// time.Sleep(10 * time.Millisecond)
// // c.WriteRegister(true, 0, MiscControl, 0x1A01)
// c.WriteRegister(true, 0, MiscControl, 0x2001)
// time.Sleep(100 * time.Millisecond)
// return 3000000, nil
}

func (c *Chain) ReadAllRegisters(chipIndex int) error {
Expand Down
65 changes: 53 additions & 12 deletions examples/RegisterMessing/main.go
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@ func main() {
defer p.Close()
p.SetReadTimeout(100 * time.Millisecond)
p.SetFlowControl(term.HARDWARE)
// p.SetRaw()
// try a Reset
err = p.SetRTS(true)
if err != nil {
Expand All @@ -32,29 +33,68 @@ func main() {
time.Sleep(100 * time.Millisecond)
p.SetSpeed(*pBaud)
chain := bm13xx.NewChain(p, true, 25000000)
err = chain.Init(8)
baud, err := chain.Init(8)
if err != nil {
log.Fatalln(err)
}
time.Sleep(time.Second)
p.SetSpeed(3000000) // 3.125 MBps on the line
p.SetSpeed(baud)
time.Sleep(200 * time.Millisecond)
chain.ReadRegister(true, 0, bm13xx.CoreRegisterControl)
time.Sleep(200 * time.Millisecond)
chain.ReadRegister(false, 0, bm13xx.CoreRegisterControl)
time.Sleep(200 * time.Millisecond)
chain.WriteRegister(false, 0, bm13xx.CoreRegisterControl, 0x80008501)
time.Sleep(time.Millisecond)
chain.WriteRegister(false, 0, bm13xx.CoreRegisterControl, 0x6FF)
time.Sleep(2 * time.Millisecond)
chain.WriteRegister(false, 0, bm13xx.CoreRegisterControl, 0x80008500)

// Chip Core messing
// chain.ReadRegister(true, 0, bm13xx.CoreRegisterControl)
// time.Sleep(200 * time.Millisecond)
// chain.ReadRegister(false, 0, bm13xx.CoreRegisterControl)
// time.Sleep(200 * time.Millisecond)
// chain.WriteRegister(false, 0, bm13xx.CoreRegisterControl, 0x80008501)
// time.Sleep(time.Millisecond)
// chain.WriteRegister(false, 0, bm13xx.CoreRegisterControl, 0x6FF)
// time.Sleep(2 * time.Millisecond)
// chain.WriteRegister(false, 0, bm13xx.CoreRegisterControl, 0x80008500)

// Mining Testing
chain.WriteRegister(true, 0, bm13xx.Pll0Divider, 0x0F0F0F00)
time.Sleep(10 * time.Millisecond)
chain.WriteRegister(true, 0, bm13xx.Pll0Divider, 0x0F0F0F00)
time.Sleep(10 * time.Millisecond)
chain.WriteRegister(true, 0, bm13xx.PLL0Parameter, 0x40A00225) // 25MHz * 0x0A0 / 0x02 / 2 / 5 = 200MHz
time.Sleep(10 * time.Millisecond)
chain.WriteRegister(true, 0, bm13xx.PLL0Parameter, 0x40A00225)
time.Sleep(10 * time.Millisecond)
chain.ReadRegister(true, 0, bm13xx.PLL0Parameter)
chain.GetResponse()
time.Sleep(30 * time.Millisecond)
// example job from Skot bm1397_protocol.md
// chain.SendJob(4, 0, 0x170689A3, 0x640AA82F, 0xE8C51C6F, []bm13xx.Midstate{
// {0x99, 0xCE, 0x15, 0xA2, 0xDE, 0xDF, 0x61, 0x49, 0x77, 0x90, 0x69, 0x84, 0x1C, 0x8A, 0x0C, 0xE0, 0xA0, 0x30, 0xE4, 0x0A, 0xCB, 0xA6, 0xA5, 0xFB, 0x33, 0x19, 0x30, 0x5D, 0xE2, 0x46, 0xEF, 0x18},
// {0x1D, 0x63, 0x63, 0xEB, 0xE7, 0xBA, 0xD9, 0x8D, 0x4B, 0xCA, 0xFE, 0x9C, 0x4F, 0x45, 0xF6, 0x45, 0xFA, 0x71, 0xA0, 0x1E, 0x8C, 0xB8, 0x2D, 0x68, 0xDC, 0x6C, 0xB8, 0x4E, 0x25, 0x39, 0x8C, 0x50},
// {0xFA, 0x7E, 0x2E, 0xC6, 0xC8, 0x08, 0x61, 0xB9, 0xA5, 0x89, 0x90, 0x71, 0xC4, 0x75, 0x56, 0xE4, 0x78, 0x85, 0x35, 0x22, 0x65, 0x51, 0xEA, 0x68, 0xEB, 0xF8, 0x96, 0xB0, 0xCA, 0x40, 0x77, 0xD4},
// {0x0C, 0xAF, 0x1B, 0xD4, 0x47, 0x37, 0x85, 0xBB, 0x39, 0x6A, 0x22, 0xC3, 0x9C, 0x23, 0x56, 0xE7, 0xCE, 0xB6, 0x57, 0x4C, 0x1F, 0xA3, 0xA9, 0x9A, 0xD3, 0xC1, 0xA0, 0x17, 0x79, 0x1F, 0xBC, 0x38},
// })
chain.SendJob(48, 0, 0x17079E15, 0x638E3275, 0x995F3ED7, []bm13xx.Midstate{
{0x03, 0x53, 0x4B, 0x27, 0xC1, 0xBD, 0xF5, 0x47, 0x07, 0xCA, 0xD9, 0x13, 0xB9, 0x69, 0x07, 0x01, 0x57, 0xC7, 0xFC, 0xDB, 0x48, 0xE3, 0xE0, 0xAB, 0x48, 0x7C, 0xE3, 0xA7, 0xDD, 0xFA, 0x2F, 0xA0},
{0xED, 0x30, 0x1B, 0x59, 0x82, 0x15, 0xAB, 0xAC, 0x77, 0xEF, 0xEC, 0xD4, 0xF8, 0x3D, 0x95, 0x62, 0x1A, 0x5F, 0x4D, 0xCB, 0xB4, 0x18, 0x01, 0x88, 0xF3, 0x43, 0x30, 0xE0, 0xC9, 0xE2, 0xFD, 0x50},
{0x55, 0x98, 0x13, 0xE0, 0x1E, 0x9C, 0x88, 0x28, 0x4E, 0xD3, 0x3E, 0xCE, 0x92, 0xA4, 0x82, 0xBA, 0x37, 0xA0, 0x47, 0x8A, 0x42, 0x87, 0xBE, 0xCD, 0xC5, 0xE1, 0x0A, 0x48, 0xBA, 0x4E, 0x41, 0x08},
{0xB9, 0x2A, 0xA7, 0x52, 0x8F, 0xBE, 0x92, 0x59, 0x98, 0x2E, 0x59, 0x5B, 0xBB, 0x10, 0x28, 0xC7, 0x67, 0x89, 0x81, 0x49, 0x06, 0x51, 0xDA, 0x52, 0xA4, 0x59, 0xE6, 0x5C, 0x05, 0x77, 0xF5, 0xC4},
})
chain.ReadRegister(false, 0, bm13xx.HashRate)
chain.GetResponse()
chain.ReadRegister(false, 0, bm13xx.HashCountingNumber)
chain.GetResponse()
chain.ReadRegister(false, 0, bm13xx.HashRate)
chain.GetResponse()
chain.ReadRegister(false, 0, bm13xx.HashCountingNumber)
chain.GetResponse()

// Register Dump
// chain.ReadAllRegisters(0)
// chain.ReadAllCoreRegisters(0, 0)
// chain.ReadUnknownRegisters(0)
// fmt.Println("INITIAL REGISTERS MAP")
// chain.DumpChipRegiters(0, false)
time.Sleep(time.Second)
// // test Resgiter Writability

// test Resgiter Writability
// fmt.Println("INVERT ALL REGISTERS VALUES")
// fmt.Println("-------------------------------------")
// if len(chain.Asics) >= 1 {
Expand Down Expand Up @@ -114,6 +154,7 @@ func main() {
// fmt.Println("-------------------------------------")
// }
// }

// Test Chip Address
// fmt.Println("CHIP ADDRESS")
// fmt.Println("-------------------------------------")
Expand Down
11 changes: 7 additions & 4 deletions lowlevel.go
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@ package bm13xx
import (
"encoding/binary"
"fmt"
"time"

"github.com/snksoft/crc"
)
Expand Down Expand Up @@ -50,6 +51,7 @@ func (c *Chain) sendCommand(cmd cmd, all bool, chipAddr byte, regAddr byte, data

func (c *Chain) SetChipAddr(chipAddr byte) error {
_, err := c.sendCommand(setChipAddr, false, chipAddr, 0, nil)
time.Sleep(30 * time.Millisecond)
return err
}

Expand Down Expand Up @@ -92,6 +94,7 @@ func (c *Chain) GetResponse() (uint32, byte, byte, error) {

func (c *Chain) Inactive() error {
_, err := c.sendCommand(chainInactive, true, 0, 0, nil)
time.Sleep(30 * time.Millisecond)
return err
}

Expand All @@ -100,13 +103,13 @@ type Midstate [32]byte
func (c *Chain) SendJob(jobID byte, startingNonce uint32, nBits uint32, nTime uint32, merkelRoot uint32, midstates []Midstate) error {
var data []byte
value := make([]byte, 4)
binary.BigEndian.PutUint32(value, startingNonce)
binary.LittleEndian.PutUint32(value, startingNonce)
data = append(data, value...)
binary.BigEndian.PutUint32(value, nBits)
binary.LittleEndian.PutUint32(value, nBits)
data = append(data, value...)
binary.BigEndian.PutUint32(value, nTime)
binary.LittleEndian.PutUint32(value, nTime)
data = append(data, value...)
binary.BigEndian.PutUint32(value, merkelRoot)
binary.LittleEndian.PutUint32(value, merkelRoot)
data = append(data, value...)
for _, midstate := range midstates {
data = append(data, midstate[:]...)
Expand Down
22 changes: 11 additions & 11 deletions registers.go
View file
Original file line number Diff line number Diff line change
Expand Up @@ -94,7 +94,7 @@ const (
HashCountingNumber RegAddr = 0x10
TicketMask RegAddr = 0x14
MiscControl RegAddr = 0x18
SomeTempRelated RegAddr = 0x1C
I2CControl RegAddr = 0x1C
OrderedClockEnable RegAddr = 0x20
FastUARTConfiguration RegAddr = 0x28
UARTRelay RegAddr = 0x2C
Expand Down Expand Up @@ -127,7 +127,7 @@ const (
)

var allRegisters []RegAddr = []RegAddr{ChipAddress, HashRate, PLL0Parameter, ChipNonceOffset, HashCountingNumber,
TicketMask, MiscControl, SomeTempRelated, OrderedClockEnable, FastUARTConfiguration, UARTRelay, TicketMask2,
TicketMask, MiscControl, I2CControl, OrderedClockEnable, FastUARTConfiguration, UARTRelay, TicketMask2,
CoreRegisterControl, CoreRegisterValue, ExternalTemperatureSensorRead,
ErrorFlag, NonceErrorCounter, NonceOverflowCounter, AnalogMuxControl, IoDriverStrenghtConfiguration,
TimeOut, PLL1Parameter, PLL2Parameter, PLL3Parameter, OrderedClockMonitor, Pll0Divider, Pll1Divider,
Expand Down Expand Up @@ -192,16 +192,16 @@ func DumpAsicReg(regAddr RegAddr, regVal uint32, debug bool) {
fmt.Printf(" BIT[3:2] Reserved = %01X\n", (regVal>>2)&0x03)
}
fmt.Printf(" BIT[1:0] HASHRATE_TWS = %01X\n", regVal&0x03)
case SomeTempRelated:
case I2CControl:
fmt.Printf("Some Temperature Related : 0x%08X\n", regVal)
fmt.Printf(" BIT[31] SOMETHING = %01X\n", (regVal>>31)&0x01)
fmt.Printf(" BIT[30:27] Reserved? = %01X\n", (regVal>>27)&0x0f)
fmt.Printf(" BIT[26:25] SOMETHING = %01X\n", (regVal>>25)&0x03)
fmt.Printf(" BIT[24] SOMETHING = %01X\n", (regVal>>24)&0x01)
fmt.Printf(" BIT[23:17] SOMETHING = %02X\n", (regVal>>17)&0x3f)
fmt.Printf(" BIT[16] Reserved? = %01X\n", (regVal>>16)&0x01)
fmt.Printf(" BIT[15:8] REG = %02X\n", (regVal>>8)&0xff)
fmt.Printf(" BIT[7:0] TEMP_SENSOR_TYPE = %02X\n", regVal&0xff)
fmt.Printf(" BIT[31] BUSY = %d\n", (regVal>>31)&0x01)
fmt.Printf(" BIT[30:27] Reserved = %01X\n", (regVal>>27)&0x0f)
fmt.Printf(" BIT[26:25] SOME_FLAGS = %01X\n", (regVal>>25)&0x03)
fmt.Printf(" BIT[24] DO_CMD = %01X\n", (regVal>>24)&0x01)
fmt.Printf(" BIT[23:17] I2C_ADDR = %02X\n", (regVal>>17)&0x3f)
fmt.Printf(" BIT[16] RD#_WR = %01X\n", (regVal>>16)&0x01)
fmt.Printf(" BIT[15:8] I2C_REG_ADDR = %02X\n", (regVal>>8)&0xff)
fmt.Printf(" BIT[7:0] I2C_REG_VAL = %02X\n", regVal&0xff)
case OrderedClockEnable:
fmt.Printf("Ordered Clock Enable : 0x%08X\n", regVal)
if debug {
Expand Down

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