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EE, CS, IC, FPGA, learning
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EE, CS, IC, FPGA, learning
  • Tsinghua University
  • Beijing

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@thu-nics

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  1. gnn-acceleration-framework-with-FPGA gnn-acceleration-framework-with-FPGA Public

    including compiler to encode DGL GNN model to instructions, runtime software to transfer data and control the accelerator, and hardware verilog code that can be implemented on FPGA

    SystemVerilog 11 9

  2. RTL_library_of_basic_hardware_units RTL_library_of_basic_hardware_units Public

    Here are some implementations of basic hardware units in RTL language (verilog for now), which can be used for area/power evaluation and support the hardware design tradeoff.

    Verilog 10 7

  3. face_recognation_with_caffe_and_DPU face_recognation_with_caffe_and_DPU Public

    Face Recognition Application based on CPU Version of Caffe and FPGA accelerator based on PCIE Interface, programed with python, C++, multithread, opencv2

    C++ 4 1

  4. Program_Design-Tetris Program_Design-Tetris Public

    Tetris program running in cmd line of windows system, written in C++. Windows命令行游戏,俄罗斯方块

    C++

  5. Gaussian_noise_on_LeNet_experiment Gaussian_noise_on_LeNet_experiment Public

    Gaussian noise on Lenet experiment with pytorch. Lenet神经网络上的高斯噪声传播实验.

    Jupyter Notebook

  6. my_configs my_configs Public

    my config files of bash, vim, tmux.

    Shell 1