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Merge branch 'doc-update'
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jjts committed Dec 13, 2021
2 parents 3c04dc7 + 83c81c3 commit ad1d256
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14 changes: 12 additions & 2 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,10 @@ pc-emul-clean:
fpga-build:
make -C $(BOARD_DIR) build

fpga-build-all:
make fpga-build BOARD=CYCLONEV-GT-DK
make fpga-build BOARD=AES-KU040-DB-G

fpga-run:
make -C $(BOARD_DIR) all TEST_LOG="$(TEST_LOG)"

Expand All @@ -60,6 +64,10 @@ fpga-test:
fpga-clean:
make -C $(BOARD_DIR) clean clean-testlog

fpga-clean-all:
make fpga-clean BOARD=CYCLONEV-GT-DK
make fpga-clean BOARD=AES-KU040-DB-G


#
# SYNTHESIZE AND SIMULATE ASIC
Expand Down Expand Up @@ -121,6 +129,8 @@ test-asic-clean:
make asic-clean ASIC_NODE=umc130

test-doc:
make fpga-clean-all
make fpga-build-all
make doc-test DOC=pb
make doc-test DOC=presentation

Expand All @@ -133,8 +143,8 @@ test: test-clean test-pc-emul test-sim test-fpga test-doc
test-clean: test-pc-emul-clean test-sim-clean test-fpga-clean test-asic-clean test-doc-clean


#generic clean
clean:
#generic clean
clean:
make pc-emul-clean
make sim-clean
make fpga-clean
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28 changes: 14 additions & 14 deletions document/presentation/presentation.tex
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@@ -1,9 +1,9 @@
\documentclass [xcolor=svgnames, t] {beamer}
\documentclass [xcolor=svgnames, t] {beamer}
\usepackage[utf8]{inputenc}
\usepackage[T1]{fontenc}
\usepackage{booktabs, comment}
\usepackage[absolute, overlay]{textpos}
\useoutertheme{infolines}
\usepackage{booktabs, comment}
\usepackage[absolute, overlay]{textpos}
\useoutertheme{infolines}
\setbeamercolor{title in head/foot}{bg=internationalorange}
\setbeamercolor{author in head/foot}{bg=dodgerblue}
\usepackage{csquotes}
Expand All @@ -19,7 +19,7 @@
\hypersetup{
colorlinks=true,
linkcolor=blue,
filecolor=magenta,
filecolor=magenta,
urlcolor=cyan,
}

Expand Down Expand Up @@ -48,7 +48,7 @@
\begin{document}

\begin{frame}
\titlepage
\titlepage
\end{frame}

%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Expand Down Expand Up @@ -92,7 +92,7 @@
\begin{center}
\begin{itemize}
\item Use a Linux real or virtual machine (see the README file to download a VM)
\item Make sure you a {\bf stable} version of the open source Icarus Verilog simulator (\url{iverilog.icarus.com}) is installed locally or on some remote server
\item Make sure a {\bf stable} version of the open source Icarus Verilog simulator (\url{iverilog.icarus.com}) is installed locally or on some remote server
\item Make sure you have FPGA build tools installed locally or on some remote server
\item Make sure you have an FPGA board attached to your Linux machine or to some remote server
\item Set up {\bf ssh} access key to GitHub (\url{github.com}) (using https will ask for your password many times)
Expand All @@ -111,11 +111,11 @@
{\tt \tiny git submodule update ----init ----recursive}
\item Add the Timer IP core to the list of peripherals in the {\tt ./config.mk} file:\\
{\tt PERIPHERALS:=UART {\em TIMER}}
\item An IP core can be integrated into IOb-SoC if it provides the following files:
\item An IP core can be integrated into IOb-SoC if it provides the following files:
\begin{itemize}
\item CORE\_REPO/hardware/hardware.mk
\item CORE\_REPO/software/embedded/embedded.mk
\item CORE\_REPO/software/embedded/pc.mk
\item CORE\_REPO/software/pc-emul/pc.mk
\end{itemize}
\item Study these files and its references in the Timer IP core repository.
\end{itemize}
Expand All @@ -129,7 +129,7 @@
#include "periphs.h"
#include "iob-uart.h"
#include "printf.h"

#include "iob_timer.h"

int main()
Expand Down Expand Up @@ -213,8 +213,8 @@
| IOb-Console |
+-----------------------------------------------+

BaudRate = 115200
StopBits = 1
BaudRate = 115200
StopBits = 1
Parity = None

IOb-Console: connecting...
Expand All @@ -234,13 +234,13 @@
\end{tiny}
\end{frame}

\begin{frame}{Conclusion}
\begin{frame}{Conclusion}
\begin{itemize}
\item A tutorial on creating a simple SoC using IOb-SoC has been presented
\item The addition of an example peripheral IP core has been illustrated
\item A simple firmware that uses the IP core driver functions has been explained
\item RTL simulation of the system running the firmware has been demonstrated
\item FPGA board running of the system running the firmware has been demonstrated
\item FPGA board running of the system running the firmware has been demonstrated
\end{itemize}
\end{frame}

Expand Down

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